FAN800D2TF [FAIRCHILD]

2-Channel Motor Drive; 2通道马达驱动器
FAN800D2TF
型号: FAN800D2TF
厂家: FAIRCHILD SEMICONDUCTOR    FAIRCHILD SEMICONDUCTOR
描述:

2-Channel Motor Drive
2通道马达驱动器

驱动器 驱动电子器件 驱动程序和接口 接口集成电路 光电二极管 CD
文件: 总14页 (文件大小:211K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
www.fairchildsemi.com  
FAN8002D2  
2-Channel Motor Drive  
Features  
Description  
• 2-Channel BTL driver with mute circuit  
• Built-in 2-regulator  
• Built-in 2-comparator  
The FAN8002D is a monolithic integrated circuit, suitable  
for a 2-ch motor driver which drives the focus actuator,  
tracking actuator.  
• Built-in thermal shutdown circuit  
• Built-in mute circuit  
• Built-in switch circuit  
• Built-in OP-AMP circuit  
• Operating supply voltage: 4.5~13.2V  
• Corresponds to 3.6V DSP  
28-SSOPH-300  
Ordering Information  
Device  
Package  
Operating Temperature  
35°C ~ 85°C  
FAN8002D2 28-SSOPH-300  
FAN800D2TF 28-SSOPH-300  
35°C ~ 85°C  
Rev. 1.0.1  
Jul. 2000.  
©2000 Fairchild Semiconductor International  
FAN8002D2  
Pin Assignments  
FIN  
(GND)  
27  
26  
25  
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
28  
FAN8002D2  
1
2
3
6
7
4
5
8
9
12  
10  
11  
13  
14  
FIN  
(GND)  
Pin Definitions  
Pin Number  
Pin Name  
I/O  
Pin Function Description  
1
2
COUT1  
CIN1-  
CIN1+  
CIN2+  
CIN2-  
COUT2  
RSTIN  
SWOUT  
PVCC1  
REG1  
REG2  
PVCC2  
DO1-  
O
I
Comparator1 Output  
Comparator1 (-) Input  
Comparator1 (+) Input  
Comparator2 (+) Input  
Comparator2 (-) Input  
Comparator2 Output  
Reset Input  
3
I
4
I
5
I
6
O
I
7
8
O
-
Switch Output  
9
Power Supply1 (Reg,switch Part)  
Regulator1 Output  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
O
O
-
Regulator2 Output  
Power Supply 2 ( Drive Power Output Part)  
Drive1 Output (-)  
O
O
O
O
-
DO1+  
DO2+  
DO2-  
Drive1 Output (+)  
Drive1 Output (+)  
Drive1 Output (-)  
PGND  
IN2  
Power Ground  
I
CH2 Drive Input  
IN1  
I
CH1 Drive Input  
VREF  
I
Reference Voltage  
REG2  
CONT  
21  
22  
I
I
Regulator2 On/off Control  
Drive Mute  
MUTE  
Rev. 1.0.1  
Jul. 2000.  
2
FAN8002D2  
Pin Definitions (Continued)  
Pin Number  
Pin Name  
RSTOUT  
CRST  
I/O  
Pin Function Description  
23  
24  
25  
26  
27  
28  
O
-
Reset Output  
Reset Capacitor  
Opamp Output  
Opamp Input -  
Opamp Input +  
OPOUT  
OPIN -  
-
-
OPIN +  
SVCC  
-
-
Signal Supply (Comparator, Reset, Opamp Drive Pre-amp Part)  
Block Diagram  
FIN  
(GND)  
28  
27  
26  
25  
24  
23  
22  
21  
17  
16  
15  
20  
19  
18  
+
DRIVER  
Mute  
REG2  
Control  
+
+
-
-
+
-
-
PVCC1  
Switch  
+
-
I/V-Convertor  
TSD  
I/V-Convertor  
-
+
VREG  
Pref  
Regulator1  
Regulator2  
Comparator1  
-
Comparator2  
-
+
-
+
-
+
-
+
-
+
+
1
2
3
4
5
6
13  
7
8
9
12  
10  
11  
14  
FIN  
(GND)  
Rev. 1.0.1  
Jul. 2000.  
3
FAN8002D2  
Equivalent Circuits  
Comparator Output  
Comparator Input  
1
6
2.5kΩ  
1kΩ  
3
5
2
4
23Ω  
23Ω  
Reset Input & Reset Capacitor  
Switch Output  
10kΩ  
1kΩ  
65kΩ  
23Ω  
7
24  
8
80kΩ  
30kΩ  
23Ω  
23Ω  
2kΩ  
30kΩ  
Regulator Output  
Btl Driver Output  
10kΩ  
10  
11  
15  
16  
13  
14  
1.7kΩ  
5kΩ  
20kΩ  
Vref & Btl Driver Input  
Reg2 & Switch Control Input  
1kΩ  
14kΩ  
14kΩ  
18  
19  
21  
20  
50kΩ  
50kΩ  
30kΩ  
30kΩ  
23Ω  
23Ω  
Rev. 1.0.1  
Jul. 2000.  
4
FAN8002D2  
Equivalent Circuits (Continued)  
Mute Input  
Reset Output  
23  
50kΩ  
23Ω  
22  
23Ω  
20kΩ  
50kΩ  
Op-amp Output  
Op-amp Input  
8kΩ  
27  
26  
25  
23Ω  
23Ω  
23Ω  
Absolute Maximum Ratings (Ta = 25 °C)  
Parameter  
Maximum supply voltage  
Power dissipation  
Symbol  
Value  
15  
1.4note  
Unit  
V
V
CCmax  
P
d
W
Operating temperature range  
Storage temperature range  
T
-35 ~ +85  
-55 ~ +150  
°C  
°C  
opr  
T
stg  
NOTE:  
1. When mounted on a 76.2mm × 114mm × 1.57mm PCB (Phenolic resin material).  
2. Power dissipation reduces 11.2mW/°C for using above Ta = 25°C  
3. Do not exceed Pd and SOA(Safe operating area).  
PD (temporary)  
Pd (mW)  
2,000  
1,200  
SOA  
400  
0
0
25  
50  
85 100  
125  
150  
175  
Ambient Temperature, Ta (°C)  
Rev. 1.0.1  
Jul. 2000.  
5
FAN8002D2  
Recommended Operating Conditions  
Parameter  
Signal Supply Voltage  
Power Supply Voltage 1  
Power Supply Voltage 2  
Symbol  
SVCC  
Min.  
4.5  
Typ.  
Max.  
13.2  
Unit  
V
-
-
-
PVCC1  
PVCC2  
4.5  
SVCC  
SVCC  
V
4.0  
V
Electrical Characteristics  
(Unless otherwise specified, Ta = 25 °C, V  
= VM12 = VM3,4 = 5V,Vref=1.65V, Comparator out=Hi-Z)  
CC  
Parameter  
Quiescent Current 1  
Quiescent Current 2  
Quiescent Current 3  
Quiescent Current 4  
DRIVE PART  
Symbol  
Conditions  
Min.  
Typ. Max.  
Unit  
mA  
mA  
mA  
mA  
I
I
I
V
V
V
V
=Vref, Pin21=0V, Pin22=5V  
= Vref, Pin21=5V, Pin22=5V  
= Vref, Pin21=5V, Pin22=0V  
= Vref, Pin21=0V, Pin22=0V  
-
-
-
-
9
19  
15  
6
-
CC1  
CC2  
CC3  
IN  
IN  
IN  
IN  
-
-
-
Icc4  
Output Offset Voltage  
Maximum output voltage1  
Maximum output voltage2  
Closed loop voltage gain  
Mute on voltage  
V
V
= Vref  
-50  
3.1  
-
3.5  
4.0  
12  
-
+50  
-
mV  
V
OO  
IN  
V
V
SV =5V, R =24ohm,  
CC  
OM1  
OM2  
L
SV =12V, R =24ohm  
CC  
3.6  
-
V
L
G
V =0.1Vrms, f=1KHz, Rext=0  
IN  
10.5  
GND  
2
13.5  
0.5  
Vcc  
dB  
V
VC  
V
Pin22 = Variation  
Pin22 = Variation  
MON  
Mute off voltage  
V
MOFF  
-
V
REGULATOR PART  
Maximum output current  
Regulator output voltage  
Load regulation  
Iomax  
Vreg  
-
200  
3.5  
-40  
-
-
3.6  
-
-
mA  
V
I =50mA  
3.7  
10  
L
Vrl  
I =0~200mA  
L
mV  
mV  
V
Line regulation  
Vcc  
Vr2on  
Vr2off  
V
=4.5~5.5V  
CC  
10  
-
30  
Regulator2 on voltage  
Regulator2 off voltage  
COMPARATOR PART  
Input offset voltage  
Input offset current  
Input bias current  
Pin21=Variation  
Pin21=Variation  
2.0  
GND  
Vcc  
0.5  
-
V
Vio  
Iio  
-
-
-
-
-
-
-
-
5.0  
25  
-
4.0  
-
mV  
nA  
nA  
V
Ib  
-
250  
3.5  
-
Common mode input voltage  
Output sink current  
Slew rate  
Vicm  
Isink  
SR  
0
3.0  
-
-
mA  
us  
V =4Vp_p, f=100KHz,Square  
IN  
1.3  
-
RESET PART  
Reset on voltage  
Vrston  
Vrsthys  
VoL  
V
V
l=H / L  
4.1  
100  
-
4.2  
-
4.3  
200  
200  
V
CT  
Reset hysteresis voltage  
Low level output voltage  
SWITCH PART  
l=H / L /H  
CT  
mV  
mV  
R =4.7 K  
100  
L
Upper satuaration voltage  
Output off current  
Vupsat  
Ioff  
V
V
=5V, Iout=150mA  
=5V  
-
-
0.13  
-
0.2  
20  
V
CC  
µA  
CC  
OP-AMP PART  
Rev. 1.0.1  
Jul. 2000.  
6
FAN8002D2  
Electrical Characteristics (Continued)  
(Unless otherwise specified, Ta = 25 °C, V  
CC  
= VM12 = VM3,4 = 5V,Vref=1.65V, Comparator out=Hi-Z  
Parameter  
Input offset voltage  
Symbol  
Conditions  
Min.  
Typ. Max.  
Unit  
mV  
nA  
V
V
-
-
-
-
-7  
0
-
+7  
OF  
B1  
Input bias current  
I
-
200  
High level output voltage  
Low level output voltage  
Output sink current  
V
4.4  
4.7  
0.1  
4
-
OH1  
V
-
0.4  
V
OL1  
I
R =1Kohm  
2
-
mA  
mA  
V
SINK  
L
Output source current  
Common mode input range  
Open Loop voltage gain  
Ripple rejection ratio  
slew rate  
I
R =1Kohm  
2
4
-
SOU1  
L
VICM  
-
-0.3  
-
4.0  
G
VO1  
f=1kHz, V =-75dB  
IN  
-
-
-
-
80  
65  
1.2  
80  
-
-
-
-
dB  
dB  
V/us  
dB  
RR1  
SR1  
f=120Hz, V =-20dB  
IN  
f=120Hz, 2Vp-p  
Common Mode rejection ratio  
CMRR  
f=1kHz, V =-20dB  
IN  
Rev. 1.0.1  
Jul. 2000.  
7
FAN8002D2  
Application Information  
1. Reference Input  
Pin 20 (REF) is a reference Input pin.  
• Reference Input  
The applied voltage at the reference input pin must be between 1.5 (V) and 3.5 (V), when Vcc = 5V.  
2. Channel Mute Function  
These pins are used for channel mute operation.  
• When the mute pin (pin22) is Low level, the mute circuit is enabled and the output circuits are muted.(both CH1, CH2)  
• When the voltage of the mute pin (pin22) is High level, the mute circuit is disabled and the output circuits operate normally.  
• If the chip temperature rises above 175 °C, then the thermal shutdown (TSD) circuit is activated and the output circuits are  
muted.  
• Mute(pin 22)-CH1, 2 mute control input pin.  
3. Protection Function  
Thermal Shutdown (TSD)  
• 1) If the chip temperature rises above 175 °C the thermal shutdown (TSD) circuit is activated and the output circuit is in the  
Mute state, that is Off state.  
• The TSD circuit has a temperature hysteresis of 25°C.  
4. Focus, Tracking Actuator  
• The reference voltage REF is given externally through pin 20  
• The input signal is amplified by R2/R1 times and then fed to the level shift circuit.  
• The level shift circuit produces the differential output voltages and drives the two output power amplifiers.  
Since the differential gain of the output amplifiers is equal to 2 × (1+ R4/R3), the input signal is amplified by  
(R2/R1) × 2 × (1+R4/R3).  
• If the total gain is too high, you can reduce the closed loop gain by adding an external resistance at pin18, 19  
• The power reference voltage (Vr) is about a half of the supply voltage(VM).  
13 16  
M
14 15  
Power Amp  
R4  
R4  
AP3  
AP2  
- +  
-
+
Vr  
R3  
R3  
-
+
LEVEL  
SNIFT  
AP1  
R2  
+
-
20  
+
-
R1  
Vref  
Vin  
18 19  
Rev. 1.0.1  
Jul. 2000.  
8
FAN8002D2  
5. Regulator & Control Function  
The regulator circuit is illustrated in the figure.1.  
• The capacitor is used as a ripple eliminator and should have a good temperature characteristics.  
• The regulator output voltage is calculated as follows  
VREG = (1 + R1 R2) × 2.5 = 3.4V  
REG2 OUT REG2 CONT  
PVCC1  
REG1 OUT  
21  
11  
10  
9
+
+
-
-
Regulator1  
Regulator2  
R1  
R2  
R1  
R2  
Figure 1.  
• When the voltage of the pin21 is high (above 2.0V), the regulator operates normally.  
On the other hand, when the voltage of the pin21 is low (below 0.5V), the regulator will be turned off.  
Truth table is as follows  
Pin#21  
High  
Regulator 2  
Turn On  
Low  
Turn Off  
Rev. 1.0.1  
Jul. 2000.  
9
FAN8002D2  
6. Reset Circuit  
The reset circuit is illustrated in the figure.2.  
• 1) The capacitor is used for delay.  
RESET IN  
RESET OUT  
CRST  
7
24  
23  
R1  
R2  
VREG  
Figure 2.  
• 2) When the voltage of the pin7 is above 4.2V, the output of the reset circuit is OPEN (no load).  
On the other hand, when the voltage of the pin7 is low , the output of the reset circuit is low.  
Truth table is as follows  
Pin#7  
High  
Low  
Reset Output  
Open  
Low  
7. Switch Circuit  
The switch circuit is illustrated in the figure.3.  
SWITCH IN  
PVCC1  
SWITCH OUT  
9
21  
8
Switch  
When the voltage of the pin21 is high (above 2.0V), the output of the switch circuit is above 4.8V.  
On the other hand, when the voltage of the pin21 is low (below 0.5V), the routput of the reset circuit is below 0.5V.  
Truth table is as follows  
Pin#21  
High  
Switch Output  
Above 4.8v  
Low  
Below 0.5v  
Rev. 1.0.1  
Jul. 2000.  
10  
FAN8002D2  
The regulator2 control pin and the switch control pin is same(pin21).  
If the pin21 is high, first switch circuit operates and then regulator circuit operates normally.  
The operation is illustrated in the following time table  
Control  
Signal  
OFF  
ON  
ON  
ON  
Switch  
Output  
OFF  
OFF  
Reg2  
Output  
Delay time  
Rev. 1.0.1  
Jul. 2000.  
11  
FAN8002D2  
Test Circuit  
TRACKING  
FOCUS  
~
~
REG2  
CONT  
VREF  
MUTE  
8Ω  
10µF  
2
2
+
+
1
1
3
3
SW3  
SW2  
+
28  
27  
26  
25  
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
FAN8002D2  
1
2
3
4
5
6
7
8
9
10  
11  
12  
13  
14  
+
+
SW1  
1
2
+
RESET  
INPUT  
REG1  
1000µF  
REG2  
8Ω  
+
100µF  
~
RIPPLE  
VCC  
OP-AMP  
COMP IN(+)  
OPIN(+)  
COMP OUT  
OPOUT  
COMP IN()  
OPIN()  
&
COMPARATOR PART  
A
B
D
1
2
3
1
2
3
V
OUT  
50Ω  
V
PULSE  
V
A
V
B
C
V
CC  
1
2
Rev. 1.0.1  
Jul. 2000.  
12  
FAN8002D2  
Application Circuit  
(Voltage Control Mode)  
[SERVO PRE AMP]  
REG2  
CONTROL  
FOCUS TRACKING  
VREF  
INPUT  
INPUT  
MUTE  
OPAMP OPAMP OPAMP  
IN+  
RESET  
OUT  
IN-  
OUT  
TRACKING  
+
28  
27  
26  
25  
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
FAN8002D2  
1
2
3
4
5
6
7
8
9
10  
11  
12  
13  
14  
SWITCH  
OUT  
+
+
RESET  
IN  
COMP1  
OUT  
COMP2  
OUT  
COMP2 COMP2  
IN-  
COMP1COMP1  
FOCUS  
TRACKING  
IN+  
IN-  
IN+  
REG1  
REG2  
+
100µF  
VCC  
Rev. 1.0.1  
Jul. 2000.  
13  
FAN8002D2  
DISCLAIMER  
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY  
PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY  
LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER  
DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.  
LIFE SUPPORT POLICY  
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES  
OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR  
INTERNATIONAL. As used herein:  
1. Life support devices or systems are devices or systems  
which, (a) are intended for surgical implant into the body,  
or (b) support or sustain life, and (c) whose failure to  
perform when properly used in accordance with  
instructions for use provided in the labeling, can be  
reasonably expected to result in a significant injury of the  
user.  
2. A critical component in any component of a life support  
device or system whose failure to perform can be  
reasonably expected to cause the failure of the life support  
device or system, or to affect its safety or effectiveness.  
www.fairchildsemi.com  
12/1/00 0.0m 001  
Stock#DSxxxxxxxx  
2000 Fairchild Semiconductor International  

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