FAN8038C [FAIRCHILD]
4-Channel Motor Drive IC; 4通道马达驱动器IC
| 型号： | FAN8038C |
| 厂家： | 
FAIRCHILD SEMICONDUCTOR |
| 描述： | 4-Channel Motor Drive IC |
| 文件： | 总16页 (文件大小：384K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
www.fairchildsemi.com
FAN8038C
4-Channel Motor Drive IC
Features
Description
• 4-CH H-Bridge driver
FAN8038C is monolithic IC for portable CD player, and
suitable for a 4-CH motor driver which drives focus acutator,
tracking actuator, sled motor and spindle motor of portable
CD player system. And it also provides DC-DC converter,
reset, recharge, and short circuit protection.
• Built-in DC-DC converter controller
• Built-in Power-on reset (POR) circuit
• Built-in battery charging circuit
• Built-in battery voltage monitoring circuit
• Built-in thermal shutdown (TSD) circuit
• Built-in general OP-Amplifier
• Low power consumption
• Built-in power controller circuit
44-QFP-1010B
Typical application
Ordering Information
• Portable Compact Disk Player (CDP)
• Portable Mini Disk Player (MD)
• Disc-Man
Device
Package
Operating Temp.
FAN8038C 44-QFP-1010B
-35°C ~ +85°C
• Other Potable Compact Disk Media
Rev. 1.0.0
©2005 Fairchild Semiconductor Corporation
FAN8038C
Pin Assignments
EMP
35
RST
34
DVCC
36
FIL
44
SGND EMPSET ADPVCC STOP
43 42 42 40
START CLKIN
39 38
PWM
37
CHGSET
DO1(-)
1
2
3
4
33
32
31
30
29
OVP
BATT
DO1(+)
DO2(-)
RSTOUT
DEDSET
DO2(+)
5
6
BDSW
ERRO
PGND
DO3(+)
DO3(-)
28
27
26
FAN8038C
7
ERRI
SCP
8
DO4(+)
9
25
COSC
10
11
DO4(-)
24
23
NC
BRAKE
OPIN(-)
12
13
14
15
16
17
18
19
20
21
22
MUTE2
DI2
DI1
SVCC1 OPOUT OPIN(+)
VREF
DI3
DI4
MUTE34
SVCC2
2
FAN8038C
Pin Definitions
Pin Number
Pin Name
OVP
I/O
I
Pin Function Description
Battery voltage motor
1
2
BATT
-
Battery power supply input
Power-on reset output
3
RSTOUT
DEDSET
BDSW
ERRO
ERRI
O
I
4
Dead time setting capacitor
Transistor drive for voltage step-up
Error amplifier output
5
O
O
I
6
7
Error amplifier Input
8
SCP
I
Short circuit protection time setting capacitor
Triangular waveform output
No connection
9
COSC
N.C
O
-
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
OPIN(-)
SVCC1
OPOUT
OPIN(+)
SVCC2
VREF
I
OP-amplifier negative input
Control circuit power supply
OP-amplifier output
-
O
I
OP-amplifier positiveinput
Pre-driver power supply
-
I
Reference voltage input
DI3
I
Channel 3 control signal Input
Channel 4 control signal Input
Channel 3 and 4 mute signal input
Channel 2 control signal Input
Channel 2 mute signal inpu
Channel 1 control signal Input
Channel 1 brake signal input
Channel 4 negative output
Channel 4 positive output
Channel 3 negative output
Channel 3 positive output
Power block power Ground
Channel 2 positive output
Channel 2 negative output
Channel 1 positive output
Channel 1 negative output
Charge current setting resistance
Power-on reset inverting output
Battery voltage detection output (Empty detection)
H-Bridge block power supply
PWM transistor drive output
External clock input
DI4
I
MUTE34
DI2
I
I
MUTE2
DI1
I
I
BRAKE
DO4(-)
DO4(+)
DO3(-)
DO3(+)
PGND
DO2(+)
DO2(-)
DO1(+)
DO1(-)
CHGSET
RST
I
O
O
O
O
-
O
O
O
O
I
O
O
-
EMP
DVCC
PWM
O
I
CLKIN
START
STOP
ADPVCC
EMPSET
SGND
FIL
I
DC-DC converter start control input
DC-DC converter off control input
Charging circuit power supply
Empty dection level switch
Signal ground
I
-
-
I
PWM phase compensation
3
FAN8038C
Internal Block Diagram
44
43
42
41
40
39
38
37
36
35
34
1
OVP
33
POWER-OFF
START
Empty
Detector
Maximum
Detection
Power Supply
20uA
OFF
2
3
10uA
VSYS1
32
31
V
/
I
4
5
6
7
8
65K
30
29
V
/
I
1.25V
R1
R2
28
Error
Amp
27
26
V
/
I
1.25V
25
24
CLOCK
V
/
I
Triangular
Waveform
9
Thermal
Shutdown
10
VSYS1
Brake1
23
11
Control Circuit
Power Supply
Mute34
Mute2
12
13
14
15
16
17
18
19
20
21
22
4
FAN8038C
Absolute Maximum Ratings (Ta = 25°C)
Parameter
Symbol
Value
13.2
Unit
Maximum supply voltage
Maximum output current
Power dissipation
V
V
mA
W
CC
I
O
500
P
1.0
D
Operating temperature
Stroage temperature
T
-35 ~ +85
-55 ~ +150
°C
°C
OPR
T
STG
Recommended Operating Conditions (Ta = 25°C)
Parameter
Symbol
ADPVCC
BATT
Min.
3.0
1.5
2.7
2.7
-
Typ.
4.5
Max.
8.0
Unit
Charging circuit power supply voltage
Power supply voltage
V
V
2.4
8.0
Control circuit power supply voltage
Pre-driver power supply voltage
H-Bridge power supply voltage
Operating Temperature
SVCC1
SVCC2
DVCC
Ta
3.2
5.5
V
3.2
5.5
V
PWM
25
BATT
70
V
-10
°C
5
FAN8038C
Electrical characteristics
(Ta=25°C, BATT=2.4V, SVCC1=SVCC2=3.2V, V
=1.6V, ADPVCC=0V, f
REF
=88.2KHz, unless otherwise
CLKIN
specified)
Parameter
Symbol
Conditions
Min. Typ. Max. Unit
COMMON SECTION
BATT=10.5V,
SVCC1=SVCC2=VREF=0V
BATT Stand-by Current
I
-
-
-
-
-
-
5
µA
mA
mA
mA
mA
ST
BATT Supply Current (No Load)
SVCC Supply Current (No Load)
SVCC2 Supply Current (No Load)
I
DVCC=0.45V, MUTE34=3.2V
2.5
3.0
3.5
0.2
3.5
3.5
5.0
1.0
BATT
DVCC=0.45V, MUTE34=3.2V,
ERRI=0V
I
I
SVCC1
SVCC2
DVCC=0.45V, MUTE34=3.2V
ADPVCC Supply Current
(No Load)
I
ADPVCC=4.5V, ROUT=OPEN
ADPVCC
H-BRIDGE DRIVER PART
Voltage Gain CH1, 3, 4
Voltage Gain CH2
G
134
VC
-
12
14
16
dB
dB
dB
KΩ
KΩ
G
2
VC
21.5 23.5 24.5
Gain Error By Polarity
∆G
-
IN=1.7 and 1.8V
IN=1.7 and 1.8V
-2
9
0
2
13
9
VC
Input pin Resistance CH1, 3, 4
Input pin Resistance CH2
R
34
DI1
11
7.5
R
6
DI2
RL=8Ω, DVCC=BATT=4V,
IN=0 ~ 3.2V
Maximum Output Voltage
V
OUT
1.9
2.1
-
V
Saturation Voltage (Lower)
Saturation Voltage (Upper)
Input offset Voltage
V
V
IO= -300mA, IN=0 and 3.2V
-
-
240
400
400
8
mV
mV
mV
mV
mV
mV
V
SAT1
IO=300mA, IN=0 and 3.2V
-
240
SAT2
V
-8
-70
-130
-20
2.0
-
0
0
0
0
-
IO
Output Offset Voltage CH1, 3, 4
Output Offset Voltage CH2
DEAD Zone
V
OO
134 VREF=IN=1.6V
70
130
20
-
V
2
OO
VREF=IN=1.6V
V
-
DB
Brake1 On Voltage
V
DI1=1.8V
M1ON
Brake1 Off Voltage
V
DI1=1.8V
-
0.8
-
V
M1OFF
MUTE2 On Voltage
MUTE2 Off Voltage
MUTE34 On Voltage
MUTE34 Off Voltage
VREF On Voltage
V
DI2=1.8V
2.0
-
-
V
M2ON
M2OFF
M34ON
V
V
DI2=1.8V
-
0.8
0.8
-
V
DI3=DI4=1.8V
DI3=DI4=1.8V
-
-
V
V
2.0
1.2
-
-
V
M34OFF
V
IN1=IN2=IN3=IN4=1.8V
IN1=IN2=IN3=IN4=1.8V
Brake Current
-
-
V
REFON
VREF Off Voltage
V
-
0.8
10
V
REFOFF
BRAKE1 Brake Current
I
4
7
mA
BRAKE
*Granteed Design Value
6
FAN8038C
Electrical Characteristics
(Ta=25°C, BATT=2.4V, SVCC1=SVCC2=3.2V, V
=1.6V, ADPVCC=0V, f
REF
=88.2KHz, unless otherwise
CLKIN
specified)
Parameter
Symbol
Conditions
Min. Typ. Max. Unit
PWM POWER SUPPLY DRIVING
PWM Sink Current
I
DI1=2.1V
DI1=1.8V, DVCC-OUT1F
10
0.35
-
13
0.45
0
17
0.55
5
mA
V
PWM
*DVCC Level Shift Voltage
DVCC Leak Current
V
SHIF
I
DVCC=9V, SVCC1,2=BATT=0V
DI1=1.8V, DVCC=1.2V ~ 1.4V
µA
DLK
*PWM Amp Transfer Gain
DC-DC CONVERTER
ERROR AMP
G
1/60
1/50
1/40 1/KΩ
PWM
SVCC1 Pin Threshold Voltage
ERRO Pin Output Voltage H
ERRO Pin Output Voltage L
SHORT CIRCUIT PROTECTION
SCP Pin Voltage
V
-
3.05
1.4
-
3.20
1.6
-
3.35
-
V
V
V
S1TH
V
ERRI=0.7V, IO = -100µA
ERRI=1.3V, IO = 100µA
EOH
V
0.3
EOL
V
ERRI=1.3V
-
0
10
0.1
16
V
µA
µA
µA
KΩ
V
SCP
SCP1
SCP2
SCP3
SCP Pin Current 1
I
I
I
ERRI=0.7V
6
SCP Pin Current 2
ERRI=1.3V, OFF=0V
ERRI=1.3V, BATT=9.5V
-
12
20
32
SCP Pin Current 3
12
20
32
*SCP Pin Impedance
R
175
1.10
9.5
220
1.20
10
265
1.30
10.5
SCP
SCP Pin Threshold Voltage
Over Voltage Protection Detect
TRANSISTOR DRIVING
V
ERRI=0.7V, COSC=470PF
OVP Voltage
SCPTH
V
V
OVP
BATT=COSC=1.5V
=SVCC2=0V, 10mA
BDSW Pin Output Voltage 1H
V
V
0.78
1.0
0.98
1.5
1.13
-
V
V
SW1H
SW2H
COSC=0V, I = -10mA,
O
ERRI=0.7V
SCP=0V
BDSW Pin Output Voltage 2H
BDSW Pin Output Voltage 2L
BDSW Pin Oscillating Reequency1
SW Pin Oscillating Reequency 2
BDSW Pin Oscillating Reequency 3
V
CT=2V, IO=1-mA
-
0.3
80
0.45
95
82
-
V
SW2L
f
f
f
COSC=470pF, =SVCC2=0V
COSC=470pF, CLKIN=0V
COSC=470pF
65
60
-
KHz
KHz
KHz
SW1
SW2
SW3
70
88.2
COSC=470pF,
ERRO=0.5 → 0.7V
*BDSW Pin Minimum Pulse Width
Pulse Duty Start
T
0.01
40
-
0.6
60
70
65
µs
%
%
%
SWMIN
COSC=470PF,
SVSS1,SVCC2=0V
D
D
D
50
60
55
SW1
SW2
SW3
COSC=470pF, ERR0=0.8V,
CLKIN=0V
MAX. Pulse Duty at Self-Running
50
MAX. Pulse Duty at CLKIN
Synchronization
ERR0=0.8V, COSC=470pF
45
*Granteed Design Value
7
FAN8038C
Electrical Characteristics
(Ta=25°C, BATT=2.4V, SVCC1=SVCC2=3.2V, V
=1.6V, ADPVCC=0V, f
REF
=88.2KHz, unless otherwise
CLKIN
specified)
Parameter
Symbol
Conditions
Min. Typ. Max. Unit
DEAD TIME
*DEDSET Pin Impedance
DEDSET Pin Output Voltage
INTERFACE
R
-
-
52
65
78
KΩ
DEDSET
V
0.78
0.88
0.98
V
DEDSET
STOP Pin Threshold Voltage
STOP Pin Bias Current
V
ERRI=1.3V
OFF=0V
2.0
75
-
-
V
STOPTH
I
95
115
µA
STOP
SVCC1,SVCC2=0V,
COSC=2V
START Pin On Threshold Voltage
V
1.3
-
-
V
STATH1
SVCC1,SVCC2=0V,
COSC=2V
START Pin Off Threshold Voltage
START Pin Bias Current
V
I
-
-
16
-
2.1
19
-
V
µA
V
STATH2
START=0V
13
2.0
START
V
CLKINTH
H
CLKIN Pin Threshold Voltage H
-
V
CLKINTH
L
CLKIN Pin Threshold Voltage L
-
-
-
-
-
0.8
10
V
CLKIN Pin Bias Current
I
CLKIN=3.2V
µA
CLKIN
START CURCUIT
SVCC1,SVCC2=0V → 3.2V
START=0V
Starter Switching Voltage
V
SSV
2.3
2.5
2.7
V
Starter Switching Hysteresis Width
Discharge Release Voltage
RESET CIRCUIT
V
START=0V
-
130
200
300
mV
V
SSHS
V
1.63
1.83
2.03
DIS
*SVCC1 RESET Threshold Voltage
Ratio
R
-
-
85
25
-
90
50
-
95
100
0.5
108
2.4
%
mV
V
RSTOTH
RESET Detection Hysteresis Width
RSTOUT Pin Output Voltage
RSTOUT Pin Pull Up Resistance
RST Pin Output Voltage 1
V
RSTHS
IO=1mA,
V
RSTO
RSTO
SVCC1,SVCC2=2.8V
R
-
72
2.0
90
-
KΩ
V
IO= -1mA,
V
V
RST1
RST2
SVCC1,SVCC2=2.8V
IO= -1mA,
RST Pin Output Voltage 2
2.0
77
-
2.4
V
SVCC1,SVCC2=0V
*RST Pin Pull Up Resistance
R
-
95
113
KΩ
RST
*Granteed Design Value
8
FAN8038C
Electrical Characteristics
(Ta=25°C, BATT=2.4V, SVCC1=SVCC2=3.2V, V
=1.6V, ADPVCC=0V, f
REF
=88.2KHz, unless otherwise
CLKIN
specified)
Parameter
Symbol
Conditions
Min. Typ. Max. Unit
OP-AMP
Input Bias Current
I
IN(+)=1.6V
IN(+)=1.6V
RL=OPEN
RL=OPEN
50Ω GND
50Ω SVCC
VIN= -75dB, F=1kHz
-
-
-5.5
2.8
-
-
0
-
300
5.5
-
nA
mV
V
BIAS
Input Offset Voltage
High Level Output Voltage
Low Level Output Voltage
Output Drive Current (Source)
Output Drive Current (Sink)
*Open Loop Voltage Gain
*Slew Rate
V
OFOP
OHOP
V
V
-
0.2
V
OLOP
V
-
-6.5 -3.0
mA
mA
dB
V/µs
SOURCE
V
0.4
-
0.7
70
-
-
-
SINK
GVO
SR
-
0.5
BATTERY CHARGING CURCUIT
ADPVCC=4.5V,
CHGSET=1.8kΩ
CHGSET Pin Bias Voltage
V
0.71 0.81 0.91
0.75 0.95 1.20
V
CHGSET
*CHGSET Pin Output Resistance
EMPSET Pin Leak Current 1
R
ADPVCC=4.5V
KΩ
µA
CHGSET
ADPVCC=4.5V,
CHGSET=OPEN
I
I
-
-
-
-
-
1.0
1.0
EMPSET
ADPVCC = 0.6V,
CHGSET = 1.8kΩ
EMPSET Pin Leak Current 2
µA
EMPSET
ADPVCC = 4.5V, I = 300mA,
O
CHGSET = 0Ω
EMPSET Pin Saturation Voltage
V
0.45 1.0
V
EMPSET
EMPTY DETECTION
EMP Detection Voltge 1
V
VEMPSET = 0V
IEMPSET = -2µA
VEMPSET = 0V
IEMPSET = -2µA
2.1
1.7
25
25
-
2.2
1.8
50
50
-
2.3
1.9
100
100
0.5
1.0
27
V
V
EMPT1
EMPT2
EMHS1
EMHS2
EMP Detection Voltge 2
V
EMP Detection Hysteresis Voltage 1
EMP Detection Hysteresis Voltage 2
EMP Pin Output Voltage
V
V
mV
mV
V
V
I = 1mA, OVP = 1V
O
EMP
EMP Pin Output Leak Current
*OVP Pin Input Resistance
I
I
OVP = 2.4V
-
-
µA
KΩ
EMPLK
R
VEMPSET = 0V
17
23
OVP
SVCC1 = SVCC2 = 0V,
OVP = 4.5V
OVP Pin Leak Current
-
-
1.0
V
OVPLK
VEMPSET = BATT-EMPSET,
OVP = 2V
EMP_SET Pin Detection Voltage
EMP_SET Pin Detection Current
V
1.5
-2
-
-
-
-
V
EMPSET
I
EMPSET
µA
EMPSET
*Granteed Design Value
9
FAN8038C
Application Information
1. BAKE AND MUTE FUNCTION
• Of the four channel drivers, channel 1 has a brake function, and the other channels have a mute function.
• When the BRAKE (pin23) is set to high level, both channel 1 outputs go low level. (Brake mode).
• When the MUTE2 (pin21) is set to high level, the channel 2 output is muted.
• When the MUTE34 (pin19) is set to high level, the channel 3 and 4 outputs are muted.
•
2. REFERENCE VOLTAGE(VREF) DROP MUTE
• When the voltage applied to VREF (pin16) is 1.0V or less (typical), the H-bridge driver outputs are set to high impedance.
3. THERMAL SHUTDOWN (TSD)
• If the chip temperature reaches 150°C (typical), the H-bridge driver output current is cut-off and the thermal shut down
circuit has a hysteresis temperature of 25°C.
4. H-BRIDGE DRIVER (4-CHANNELS)
• The driver input resistance is 11KΩ(typical) for channels 1, 3 , and 4, and 7.5KΩ for channel 2. Set the gain according to
the following formula.
•
Channel
Gain
Unit
CH1
CH3
CH4
55K
dB
Gv = 20log
Gv = 20log
11K + REXT
110K
CH2
dB
7.5K + REXT
where, R
is externally connected input resistance.
EXT
5. SWITCHING REGULATED POWER SUPPLY DRIVE
• The power supply of H-bridge driver consists of DVCC(pin36) for output stage power supply and VSYS2 (pin15) for
predriver power supply.
37
15
36
VBAT
PWM
27 29 31
26 30 32
25
24
44
9
Pre-
driver
Maximum
Detector
Triangular
Waveform
28
Figure 1. Switching Regulated Power Supply
10
FAN8038C
6. DC-DC CONVERTER CONTROL CIRCUIT
6-1. Set to output voltage
• The DC-DC converter output voltage, SVCC1, is set by internal resistors R3 and R4 and the voltage, SVCC1, is defined as
follows.
R3
SVCC1= (1+
)1.267 = 2.5[V ]
R4
• This voltage, SVCC1, can be varied with the addition of an external resistors R1 and R2 as shown Figure.2 and the voltage
is defined as follows.
R1 R3
R2 R4
+
R1+ R3 R2 + R4
R2 R4
SVCC1 =
×1.267[V ]
R2 + R4
• Where, R1 and R2 are exteranl resistors, and R3 and R4 are internal resistors.
2
10uA
VBAT
8
CSCP
6
1.25V
Short Circuit Protection
7
SVCC1
PWM
Comp
12
Error Amp
1.267V
65KΩ
R3
R1
R2
Triangular
Waveform
R3 = 30KΩ
9
4
R4
COSC
R4 = 30.5KΩ
5
SVCC1
CDEDSET
1.267V
34
3
Figure 2. Schematic of DC-DC Converter
6-2. Power-on Reset function
• If the output voltage of DC-DC conver, SVCC1,is over than 90%, the RSTOUT(pin3) goes from low level to high level, and
RST (pin34) goes to high level to low level. The reset voltage has 50mV of hysteresis to prevent output chattering.
6-3. Delayed Short Circuit Protection
• When the error amplifier output (pin6) become high level state during the abnormal conditions such as over load or short
ciruit, the exteral capacitor, C , is charged, and when the SCP (pin8) voltage reaches 1.25V(typ.), the PWM comparator
SCP
output, BDSW(pin5), is shwitch-off.
11
FAN8038C
• The time until switching-off is set by the capacitor, C
, and the equation is as follows:
SCP
CSCP ×V
tSCP
=
SCP [sec]
iSCP
where,VSCP =1.25[V ],iSCP =10[uA]
6-4. Soft Start Function
• The soft start function operates when a capacitor is connected between DEDSET(pin4) and GND. Also, the maximum duty
cab be varied by connecting a resistor to pin4.
tSOFT = CDEDSET × R
Where, R = 65[KΩ]
7. POWER OFF FUNCTION
• When low level is applied to STOP (pin40), SCP (pin8) is charged, and when the voltage reaches 1.25V (typical), the PWM
comparator output, BDSW(pin5), is shwitch-off.
• The time until switching-off is set by the capacitor, C
, and the equation is as follows:
SCP
CSCP ×VTH
tOFF
=
[sec]
iOFF
Where,VTH =1.25[V ],iOFF = 20[uA]
•
8. BATTERY CHARGER AND MONITORING FUNCTION
8-1. Set to Battey Charging Current
• The power supply for the charging circuit is ADPVCC (pin41), and battery charger circuit is separated from any other
block. The resistance between CHGSET (pin33) and GND sets the charging current, i
.
CHG
• This current, i
, is drawn from EMPSET (pin42).
CHG
• The thermal shutdown circuit is provided, and when the chip temperature rise up to about 150°C the charging current, i
is cut-off and it has the temperature hysteresis of about 30°C.
,
CHG
8-2. Over Voltage Protection
• When the voltage applied to the OVP (pin1) reaches 9.7V, SCP (pin8) is charged, and when the voltage reaches 1.25V
(typical), the PWM comparator output, BDSW(pin5), is shwitch-off.
• The time until switching-off is set by the capacitor, C
•
, and the equation is as follows:
SCP
CSCP ×VTH
tOVP
=
[sec]
iOVP
Where,VTH =1.25[V ],iOVP = 20[uA]
•
8-3. Empty Detecting Circuit
• when the voltage applied to the OVP (pin1) falls below the detector voltage, EMP (pin35) goes from high level to low level
(open collector output). The detector voltage has 50mV of hysteresis to prevent output chattering.
• EMPSEL (pin42) to switch the detection voltage as shown below.
•
EMPSET
LOW
Detect Voltage
2.2V
Hysteresis
50mV
Mode
Battery Mode
Adapter Mode
HIGH-Z
1.8V
50mV
12
FAN8038C
Typical Performance Characteristics
Temp vs Vovp
S1TH
Temp vs V
10.50
10.25
10.00
9.75
3.20
3.18
3.15
S1TH
V
3.13
Vovp
[V ]
[V ]
3.10
3.08
3.05
-35 -20 -5 10 25 40 55 70 85
9.50
-35 -20 -5 10 25 40 55 70 85
Temp[℃]
Temp[℃]
BATT vs IBATT
BATT vs I
0.1
4
3
0.05
I
IBATT
[mA]
0
2
1
0
[mA]
-0.05
-0.1
1.5
2.5
3.5
4.5
5.5
6.5
7.5
1.5
2.5
3.5
4.5
5.5
6.5
7.5
BATT[V ]
BATT[V ]
Temp vs ISINK
Temp vs VEMPSET
1
1.8
1.6
1.4
1.2
1
0.9
0.8
0.7
0.6
0.5
0.4
V
ISINK
[mA]
[V ]
-35 -20 -5 10 25 40 55 70 85
Temp[℃]
-35 -20 -5 10 25 40 55 70 85
Temp[℃]
13
FAN8038C
Application Circuits
Adaptor
Battery
Battery
STOP
START
Clock
43
42
40
37
36
35
34
44
41
39
38
1
OVP
33
POWER-OFF
START
Empty
Detector
Maximum
Detection
2
3
Power Supply
20uA
OFF
10uA
VSYS1
32
31
V
/
I
RESET
4
65K
30
29
28
V
/
I
5
6
7
8
1.25V
R1
Error
Amp
R2
27
26
V
/
I
1.25V
25
24
CLOCK
V
/
I
Triangular
Waveform
9
Thermal
10
Shutdown
VSYS1
23
Brake1
11
Control Circuit
Power Supply
Mute34
Mute2
14
18
20
21
22
12
13
15
16
17
19
VREF DI3
DI4 MUTE34 DI2 MUTE1 DI1 BRAKE
Servo Pre Amp & Controller
14
FAN8038C
Package Dimension
15
FAN8038C
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY
PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY
LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER
DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES
OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR
CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the body,
or (b) support or sustain life, and (c) whose failure to
perform when properly used in accordance with
instructions for use provided in the labeling, can be
reasonably expected to result in a significant injury of the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be
reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
www.fairchildsemi.com
11/18/04 0.0m 001
Stock#DSxxxxxxxx
2005 Fairchild Semiconductor Corporation
相关型号：
©2020 ICPDF网 联系我们和版权申明