FDD6N50TM_WS [FAIRCHILD]
Power Field-Effect Transistor, 6A I(D), 500V, 0.9ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, TO-252AA, ROHS COMPLIANT, PLASTIC, DPAK-3/2;
| 型号： | FDD6N50TM_WS |
| 厂家： | 
FAIRCHILD SEMICONDUCTOR |
| 描述： | Power Field-Effect Transistor, 6A I(D), 500V, 0.9ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, TO-252AA, ROHS COMPLIANT, PLASTIC, DPAK-3/2 |
| 文件： | 总9页 (文件大小：845K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
January 2006
TM
UniFET
FDD6N50/FDU6N50
500V N-Channel MOSFET
Features
Description
•
•
•
•
•
•
6A, 500V, RDS(on) = 0.9Ω @VGS = 10 V
Low gate charge ( typical 12.8 nC)
Low Crss ( typical 9 pF)
These N-Channel enhancement mode power field effect
transistors are produced using Fairchild’s proprietary, planar
stripe, DMOS technology.
This advanced technology has been especially tailored to
minimize on-state resistance, provide superior switching
performance, and withstand high energy pulse in the avalanche
and commutation mode. These devices are well suited for high
efficient switched mode power supplies and active power factor
correction.
Fast switching
100% avalanche tested
Improved dv/dt capability
D
D
G
I-PAK
FDU Series
D-PAK
FDD Series
G
S
G D S
S
Absolute Maximum Ratings
Symbol
Parameter
FDD6N50/FDU6N50
Unit
VDSS
Drain-Source Voltage
Drain Current
500
V
ID
- Continuous (TC = 25°C)
- Continuous (TC = 100°C)
6
3.8
A
A
(Note 1)
(Note 2)
IDM
Drain Current
- Pulsed
24
±30
270
6
A
V
VGSS
EAS
IAR
Gate-Source voltage
Single Pulsed Avalanche Energy
Avalanche Current
mJ
A
(Note 1)
(Note 1)
(Note 3)
EAR
dv/dt
PD
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
8.9
4.5
mJ
V/ns
Power Dissipation
(TC = 25°C)
89
W
- Derate above 25°C
0.71
W/°C
TJ, TSTG
TL
Operating and Storage Temperature Range
-55 to +150
300
°C
Maximum Lead Temperature for Soldering Purpose,
1/8” from Case for 5 Seconds
°C
Thermal Characteristics
Symbol
Parameter
Min.
Max.
1.4
Unit
°C/W
°C/W
RθJC
RθJA
Thermal Resistance, Junction-to-Case
Thermal Resistance, Junction-to-Ambient
--
--
83
©2006 Fairchild Semiconductor Corporation
FDD6N50/FDU6N50 REV. A
1
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Package Marking and Ordering Information
Device Marking
FDD6N50
Device
Package
D-PAK
Reel Size
380mm
380mm
-
Tape Width
Quantity
2500
FDD6N50TM
FDD6N50TF
FDU6N50TU
16mm
16mm
-
FDD6N50
D-PAK
2000
FDU6N50
I-PAK
70
Electrical Characteristics
T
= 25°C unless otherwise noted
C
Symbol
Parameter
Conditions
Min. Typ. Max Units
Off Characteristics
BVDSS
Drain-Source Breakdown Voltage
VGS = 0V, ID = 250µA
500
--
--
--
--
V
∆BVDSS
Breakdown Voltage Temperature
Coefficient
ID = 250µA, Referenced to 25°C
0.5
V/°C
/
∆TJ
IDSS
Zero Gate Voltage Drain Current
VDS = 500V, VGS = 0V
VDS = 400V, TC = 125°C
--
--
--
--
1
10
µA
µA
IGSSF
IGSSR
Gate-Body Leakage Current, Forward
Gate-Body Leakage Current, Reverse
VGS = 30V, VDS = 0V
VGS = -30V, VDS = 0V
--
--
--
--
100
nA
nA
-100
On Characteristics
VGS(th) Gate Threshold Voltage
RDS(on)
VDS = VGS, ID = 250µA
VGS = 10V, ID = 3A
VDS = 40V, ID = 3A
3.0
--
--
5.0
0.9
--
V
Ω
S
Static Drain-Source
On-Resistance
0.76
2.5
(Note 4)
gFS
Forward Transconductance
--
Dynamic Characteristics
Ciss
Coss
Crss
Input Capacitance
VDS = 25V, VGS = 0V,
f = 1.0MHz
--
--
--
720
95
9
940
190
13.5
pF
pF
pF
Output Capacitance
Reverse Transfer Capacitance
Switching Characteristics
td(on) Turn-On Delay Time
tr
td(off)
tf
VDD = 250V, ID = 6A
RG = 25Ω
--
--
--
--
--
--
--
6
55
20
120
60
ns
ns
Turn-On Rise Time
Turn-Off Delay Time
Turn-Off Fall Time
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
25
ns
(Note 4, 5)
(Note 4, 5)
35
80
ns
Qg
VDS = 400V, ID = 6A
VGS = 10V
12.8
3.7
5.8
16.6
--
nC
nC
nC
Qgs
Qgd
--
Drain-Source Diode Characteristics and Maximum Ratings
IS
Maximum Continuous Drain-Source Diode Forward Current
Maximum Pulsed Drain-Source Diode Forward Current
--
--
--
--
--
--
--
6
24
1.4
--
A
A
ISM
VSD
trr
Drain-Source Diode Forward Voltage
Reverse Recovery Time
VGS = 0V, IS = 6A
--
V
VGS = 0V, IS = 6A
275
1.7
ns
µC
dIF/dt =100A/µs
(Note 4)
Qrr
Reverse Recovery Charge
--
NOTES:
1. Repetitive Rating: Pulse width limited by maximum junction temperature
2. I = 6A, V = 50V, L=13.5mH, R = 25Ω, Starting T = 25°C
AS
DD
G
J
3. I ≤ 6A, di/dt ≤ 200A/µs, V ≤ BV
, Starting T = 25°C
SD
DD
DSS
J
4. Pulse Test: Pulse width ≤ 300µs, Duty Cycle ≤ 2%
5. Essentially Independent of Operating Temperature Typical Characteristics
2
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FDD6N50/FDU6N50 REV. A
Typical Performance Characteristics
Figure 1. On-Region Characteristics
Figure 2. Transfer Characteristics
20
VGS
Top :
10.0 V
8.0V
101
7.5 V
7.0 V
6.5 V
6.0 V
5.5 V
15
10
5
150∩
25∩
Bottom : 5.0 V
100
10-1
10-2
-55∩
∝ Notes :
1. 250レs Pulse Test
2. TC = 25∩
∝ Note
1. VDS = 40V
2. 250レs Pulse Test
0
0
10
20
30
40
50
2
4
6
8
10
VDS, Drain-Source Voltage [V]
VGS , Gate-Source Voltage [V]
Figure 3. On-Resistance Variation vs.
Drain Current and Gate Voltage
Figure 4. Body Diode Forward Voltage
Variation vs. Source Current
and Temperature
2.5
101
100
10-1
2.0
1.5
1.0
0.5
0.0
VGS = 10V
VGS = 20V
150∩
25∩
∝ Notes :
1. VGS = 0V
2. 250レs Pulse Test
∝ Note : T = 25∩
J
0
5
10
15
20
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
VSD , Source-Drain Voltage [V]
ID, Drain Current [A]
Figure 5. Capacitance Characteristics
Figure 6. Gate Charge Characteristics
12
10
8
Ciss = Cgs + Cgd (Cds = shorted)
VDS = 100V
VDS = 250V
Coss = Cds + Cgd
Crss = Cgd
1000
100
10
VDS = 400V
C
iss
Coss
6
Crss
4
∝ Notes :
1. VGS = 0 V
2. f = 1 MHz
2
∝ Note : ID = 6A
0
100
101
0
5
10
15
QG, Total Gate Charge [nC]
VDS, Drain-Source Voltage [V]
3
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FDD6N50/FDU6N50 REV. A
Typical Performance Characteristics (Continued)
Figure 7. Breakdown Voltage Variation
vs. Temperature
Figure 8. On-Resistance Variation
vs. Temperature
3.0
1.2
1.1
1.0
0.9
0.8
2.5
2.0
1.5
1.0
0.5
0.0
♦ Notes :
1. VGS = 0 V
♦ Notes :
1. VGS = 10 V
2. ID = 3 A
2. ID = 250 µA
-100
-50
0
50
100
150
200
-100
-50
0
50
100
150
200
TJ, Junction Temperature [oC]
TJ, Junction Temperature [oC]
Figure 9. Maximum Safe Operating Area
Figure 10. Maximum Drain Current
vs. Case Temperature
8
6
4
2
0
102
Operation in This Area
is Limited by R DS(on)
10 us
101
100 us
1 ms
10 ms
100
DC
∝ Notes :
10-1
1. TC = 25 o
2. TJ = 150 o
3. Single Pulse
C
C
10-2
100
101
102
103
25
50
75
100
125
150
VDS, Drain-Source Voltage [V]
TC, Case Temperature [∩ ]
Figure 11. Transient Thermal Response Curve
100
10-1
10-2
D=0.5
0.2
0.1
∝
Notes
:
1. Zヨ (t) = 1.4
∩
/W M ax.
JC
2. Duty Factor, D=t1/t2
3. TJM - TC
=
PDM * Zヨ (t)
JC
0.05
0.02
0.01
PDM
t1
t2
single pulse
10-4
10-5
10-3
10-2
10-1
100
101
t1, Square W ave Pulse Duration [sec]
4
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FDD6N50/FDU6N50 REV. A
Gate Charge Test Circuit & Waveform
Resistive Switching Test Circuit & Waveforms
Unclamped Inductive Switching Test Circuit & Waveforms
5
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FDD6N50/FDU6N50 REV. A
Peak Diode Recovery dv/dt Test Circuit & Waveforms
6
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FDD6N50/FDU6N50 REV. A
Mechanical Dimensions
D-PAK
Dimensions in Millimeters
7
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FDD6N50/FDU6N50 REV. A
Mechanical Dimensions (Continued)
I-PAK
Dimensions in Millimeters
8
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FDD6N50/FDU6N50 REV. A
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failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
reasonably expected to result in significant injury to the
user.
2. A critical component is any component of a life
support device or system whose failure to perform can
be reasonably expected to cause the failure of the life
support device or system, or to affect its safety or
effectiveness.
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Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative or
In Design
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
Preliminary
First Production
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
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Obsolete
Full Production
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Rev. I18
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