FDJ129P_F077 [FAIRCHILD]
Power Field-Effect Transistor, 4.2A I(D), 20V, 0.07ohm, 1-Element, P-Channel, Silicon, Metal-oxide Semiconductor FET, LEAD FREE, FLMP, SC-75, 6 PIN;型号: | FDJ129P_F077 |
厂家: | FAIRCHILD SEMICONDUCTOR |
描述: | Power Field-Effect Transistor, 4.2A I(D), 20V, 0.07ohm, 1-Element, P-Channel, Silicon, Metal-oxide Semiconductor FET, LEAD FREE, FLMP, SC-75, 6 PIN 开关 脉冲 光电二极管 晶体管 |
文件: | 总6页 (文件大小:173K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
July 2004
FDJ129P
P-Channel -2.5 Vgs Specified PowerTrench MOSFET
General Description
Features
This P-Channel -2.5V specified MOSFET uses
Fairchild’s advanced low voltage PowerTrench process.
It has been optimized for battery power management
applications.
• –4.2 A, –20 V.
RDS(ON) = 70 mΩ @ VGS = –4.5 V
RDS(ON) = 120 mΩ @ VGS = –2.5 V
• Low gate charge
Applications
• High performance trench technology for extremely
low RDS(ON)
• Battery management
• Load switch
• Compact industry standard SC75-6 surface mount
package
Bottom Drain
G
S
4
5
6
3
2
1
S
S
S
SC75-6 FLMP
S
Absolute Maximum Ratings TA=25oC unless otherwise noted
Symbol
Parameter
Ratings
Units
VDSS
Drain-Source Voltage
–20
V
VGSS
ID
Gate-Source Voltage
Drain Current – Continuous
– Pulsed
V
A
± 12
–4.2
–16
(Note 1a)
(Note 1a)
PD
Power Dissipation for Single Operation
1.6
W
TJ, TSTG
Operating and Storage Junction Temperature Range
–55 to +150
°C
Thermal Characteristics
Thermal Resistance, Junction-to-Ambient
(Note 1a)
77
RθJA
°C/W
Package Marking and Ordering Information
Device Marking
Device
Reel Size
Tape width
Quantity
.A
FDJ129P
7’’
8mm
3000 units
FDJ129P Rev F1 W)
2004 Fairchild Semiconductor Corporation
Electrical Characteristics
TA = 25°C unless otherwise noted
Symbol
Parameter
Test Conditions
Min Typ Max Units
Off Characteristics
BVDSS
Drain–Source Breakdown Voltage
–20
V
VGS = 0 V,
ID = –250 µA
Breakdown Voltage Temperature
–18
∆BVDSS
∆TJ
ID = –250 µA,Referenced to 25°C
mV/°C
Coefficient
IDSS
Zero Gate Voltage Drain Current
Gate–Body Leakage, Forward
Gate–Body Leakage, Reverse
VDS = –16 V, VGS = 0 V
VGS = 12 V, VDS = 0 V
VGS = –12 V, VDS = 0 V
–1
100
–100
µA
nA
nA
IGSSF
IGSSR
On Characteristics
(Note 2)
Gate Threshold Voltage
VGS(th)
–0.6
–8
–1.1
3
–1.5
V
VDS = VGS
ID = –250 µA,Referenced to 25°C
,
ID = –250 µA
Gate Threshold Voltage
∆VGS(th)
∆TJ
RDS(on)
mV/°C
Temperature Coefficient
Static Drain–Source
On–Resistance
VGS = –4.5 V, ID = –4.2 A
54
91
72
70
mΩ
VGS = –2.5 V,
ID = –3.3 A
120
100
VGS = –4.5 V, ID = –4.2,TJ=125°C
ID(on)
gFS
On–State Drain Current
Forward Transconductance
VGS = –4.5 V, VDS = –5 V
A
S
VDS = –5 V, ID = –4.2 A
11
Dynamic Characteristics
Ciss
Coss
Crss
Input Capacitance
585
124
61
pF
pF
pF
V
DS = –10 V, V GS = 0 V,
Output Capacitance
Reverse Transfer Capacitance
f = 1.0 MHz
Switching Characteristics (Note 2)
td(on)
tr
td(off)
tf
Turn–On Delay Time
Turn–On Rise Time
Turn–Off Delay Time
Turn–Off Fall Time
Total Gate Charge
Gate–Source Charge
Gate–Drain Charge
10
9
17
10
4
20
18
30
20
6
ns
ns
ns
V
DD = –10 V, ID = –1 A,
VGS = –4.5 V, RGEN = 6 Ω
ns
Qg
Qgs
Qgd
nC
nC
nC
VDS = –10 V, ID = –4.2 A,
VGS = –4.5 V
1.1
1.2
Drain–Source Diode Characteristics and Maximum Ratings
VSD
trr
Drain–Source Diode Forwar Voltage VGS = 0 V, IS = –1.5 A (Note 2)
–0.7
16
13
–1.2
V
Diode Reverse Recovery Time
Diode Reverse Recovery Charge
IF = –4.2 A,
diF/dt = 100 A/µs
nS
nC
Qrr
Notes:
1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of
the drain pins. RθJC is guaranteed by design while RθCA is determined by the user's board design.
a)
77°C/W when mounted
on a 1in2 pad of 2 oz
copper.
b)
110°C/W when mounted
on a minimum pad of 2 oz
copper.
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%
FDJ129P Rev F1 (W)
Typical Characteristics
1.8
1.6
1.4
1.2
1
16
-3.5V
VGS=-2.5V
VGS=-4.5V
-3.0V
12
8
-3.0V
-2.5V
-3.5V
-4.0V
-4.5V
4
-2.0V
0
0.8
0
1
2
3
4
0
4
8
-ID, DRAIN CURRENT (A)
12
16
-VDS, DRAIN TO SOURCE VOLTAGE (V)
Figure 1. On-Region Characteristics.
Figure 2. On-Resistance Variation with
Drain Current and Gate Voltage.
0.22
1.4
1.3
1.2
1.1
1
ID = -2.1A
ID = -4.2A
V
GS = -4.5V
0.18
0.14
0.1
TA = 125oC
TA = 25oC
0.9
0.8
0.7
0.06
0.02
1
2
3
4
5
-50
-25
0
25
50
75
100
125
150
TJ, JUNCTION TEMPERATURE (oC)
-VGS, GATE TO SOURCE VOLTAGE (V)
Figure 3. On-Resistance Variation
withTemperature.
Figure 4. On-Resistance Variation with
Gate-to-Source Voltage.
100
12
9
VGS = 0V
TA = -55oC
25oC
125oC
VDS = -5V
10
1
TA = 125oC
25oC
6
0.1
-55oC
0.01
0.001
0.0001
3
0
0.5
1
1.5
2
2.5
3
0
0.2
0.4
0.6
0.8
1
1.2
-VGS, GATE TO SOURCE VOLTAGE (V)
-VSD, BODY DIODE FORWARD VOLTAGE (V)
Figure 5. Transfer Characteristics.
Figure 6. Body Diode Forward Voltage Variation
with Source Current and Temperature.
FDJ129P Rev F1 (W)
Typical Characteristics
800
600
400
200
0
5
VDS = -5V
f = 1 MHz
GS = 0 V
ID = -4.2A
-10V
V
CISS
4
3
2
1
0
-15V
COSS
CRSS
0
1
2
3
4
5
0
5
10
15
20
Qg, GATE CHARGE (nC)
-VDS, DRAIN TO SOURCE VOLTAGE (V)
Figure 7. Gate Charge Characteristics.
Figure 8. Capacitance Characteristics.
100
10
10
8
SINGLE PULSE
R
θJA = 110°C/W
RDS(ON) LIMIT
100µs
TA = 25°C
1ms
10ms
6
100ms
1s
10s
DC
1
4
VGS = -4.5V
0.1
0.01
SINGLE PULSE
R
θJA = 110oC/W
TA = 25oC
2
0
0.01
0.1
1
10
100
0.1
1
10
100
1000
t1, TIME (sec)
-VDS, DRAIN-SOURCE VOLTAGE (V)
Figure 9. Maximum Safe Operating Area.
Figure 10. Single Pulse Maximum
Power Dissipation.
1
D = 0.5
R
R
θJA(t) = r(t) * RθJA
θJA = 110oC/W
0.
0.1
0.1
P(pk)
0.0
t1
0.0
t2
0.01
TJ - TA = P * RθJA(t)
Duty Cycle, D = t1 / t2
SINGLE PULSE
0.01
0.0001
0.001
0.01
0.1
1
10
100
1000
t1, TIME (sec)
Figure 11. Transient Thermal Response Curve.
Thermal characterization performed using the conditions described in Note 1b.
Transient thermal response will change depending on the circuit board design.
FDJ129P Rev F1 (W)
Dimensional Outline and Pad Layout
FDJ129P Rev F1 (W)
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.
ACEx™
Power247™
PowerSaver™
PowerTrench
QFET
SuperFET™
SuperSOT™-3
SuperSOT™-6
SuperSOT™-8
SyncFET™
ISOPLANAR™
LittleFET™
MICROCOUPLER™
MicroFET™
MicroPak™
MICROWIRE™
MSX™
MSXPro™
OCX™
OCXPro™
FAST
FASTr™
FPS™
FRFET™
GlobalOptoisolator™
GTO™
ActiveArray™
Bottomless™
CoolFET™
CROSSVOLT™
DOME™
EcoSPARK™
E2CMOS™
EnSigna™
FACT™
QS™
QT Optoelectronics™ TinyLogic
Quiet Series™
RapidConfigure™
RapidConnect™
µSerDes™
TINYOPTO™
TruTranslation™
UHC™
HiSeC™
I2C™
i-Lo™
ImpliedDisconnect™
UltraFET
FACT Quiet Series™
SILENT SWITCHER VCX™
SMART START™
SPM™
OPTOLOGIC
OPTOPLANAR™
PACMAN™
POP™
Across the board. Around the world.™
The Power Franchise
ProgrammableActive Droop™
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DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVESTHE RIGHTTO MAKE CHANGES WITHOUTFURTHER NOTICETOANY
PRODUCTS HEREINTO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOTASSUMEANYLIABILITY
ARISING OUTOFTHEAPPLICATION OR USE OFANYPRODUCTOR CIRCUITDESCRIBED HEREIN; NEITHER DOES IT
CONVEYANYLICENSE UNDER ITS PATENTRIGHTS, NORTHE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUTTHE EXPRESS WRITTENAPPROVALOF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or
systems which, (a) are intended for surgical implant into
the body, or (b) support or sustain life, or (c) whose
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
reasonably expected to result in significant injury to the
user.
2. A critical component is any component of a life
support device or system whose failure to perform can
be reasonably expected to cause the failure of the life
support device or system, or to affect its safety or
effectiveness.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative or
In Design
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
Preliminary
First Production
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
No Identification Needed
Obsolete
Full Production
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
Not In Production
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
Rev. I11
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