FDMS8680 [FAIRCHILD]
N-Channel PowerTrench㈢ MOSFET 30V, 35A, 7.0mヘ; N沟道MOSFET PowerTrench㈢ 30V ，35A ， 7.0米ヘ
| 型号： | FDMS8680 |
| 厂家： | 
FAIRCHILD SEMICONDUCTOR |
| 描述： | N-Channel PowerTrench㈢ MOSFET 30V, 35A, 7.0mヘ |
| 文件： | 总6页 (文件大小：216K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
July 2007
FDMS8680
N-Channel PowerTrench® MOSFET
30V, 35A, 7.0mΩ
Features
General Description
Max rDS(on) = 7.0mΩ at VGS = 10V, ID = 14A
Max rDS(on) = 11.0mΩ at VGS = 4.5V, ID = 11.5A
The FDMS8680 has been designed to minimize losses in power
conversion application. Advancements in both silicon and
package technologies have been combined to offer the lowest
rDS(on) while maintaining excellent switching performance.
Advanced Package and Silicon combination for
low rDS(on) and high efficiency
Applications
MSL1 robust package design
RoHS Compliant
High Side for Synchronous Buck to Power Core Processor
Secondary Side Synchronous Rectifier
High Side Switch in POL DC/DC Converter
Oring FET/ Load Switch
Pin 1
S
S
S
G
D
D
D
D
5
6
7
8
4
3
2
1
G
S
S
S
D
D
D
D
Power 56 (Bottom view)
MOSFET Maximum Ratings TA = 25°C unless otherwise noted
Symbol
VDS
VGS
Parameter
Ratings
30
Units
Drain to Source Voltage
Gate to Source Voltage
V
V
±20
35
Drain Current -Continuous (Package limited)
-Continuous (Silicon limited)
-Continuous
TC = 25°C
TC = 25°C
TA = 25°C
63
ID
A
(Note 1a)
(Note 3)
14
-Pulsed
100
216
50
EAS
Single Pulse Avalanche Energy
Power Dissipation
mJ
W
TC = 25°C
TA = 25°C
PD
Power Dissipation
(Note 1a)
2.5
TJ, TSTG
Operating and Storage Junction Temperature Range
-55 to +150
°C
Thermal Characteristics
RθJC
RθJA
Thermal Resistance, Junction to Case
Thermal Resistance, Junction to Ambient
2.5
50
°C/W
(Note 1a)
Package Marking and Ordering Information
Device Marking
Device
Package
Reel Size
Tape Width
12mm
Quantity
FDMS8680
FDMS8680
Power 56
13"
3000units
1
©2007 Fairchild Semiconductor Corporation
FDMS8680 Rev.C
www.fairchildsemi.com
Electrical Characteristics TJ = 25°C unless otherwise noted
Symbol
Parameter
Test Conditions
Min
Typ
Max
Units
Off Characteristics
BVDSS
Drain to Source Breakdown Voltage
ID = 250µA, VGS = 0V
30
V
∆BVDSS
∆TJ
Breakdown Voltage Temperature
Coefficient
ID = 250µA, referenced to 25°C
24
mV/°C
IDSS
IGSS
Zero Gate Voltage Drain Current
Gate to Source Leakage Current
VDS = 24V, VGS = 0V
1
µA
VGS = ±20V, VDS = 0V
±100
nA
On Characteristics
VGS(th)
Gate to Source Threshold Voltage
VGS = VDS, ID = 250µA
1.0
1.8
3.0
V
∆VGS(th)
∆TJ
Gate to Source Threshold Voltage
Temperature Coefficient
ID = 250µA, referenced to 25°C
-5.7
mV/°C
VGS = 10V, ID = 14A
5.5
8.5
8.2
72
7.0
11.0
10.5
rDS(on)
gFS
Static Drain to Source On Resistance
Forward Transconductance
VGS = 4.5V, ID = 11.5A
VGS = 10V, ID = 14A, TJ = 125°C
VDD = 10V, ID = 14A
mΩ
S
Dynamic Characteristics
Ciss
Coss
Crss
Rg
Input Capacitance
1195
555
95
1590
740
145
4.0
pF
pF
pF
Ω
VDS = 15V, VGS = 0V,
f = 1MHz
Output Capacitance
Reverse Transfer Capacitance
Gate Resistance
f = 1MHz
0.8
Switching Characteristics
td(on)
tr
td(off)
tf
Turn-On Delay Time
Rise Time
9
3
18
10
34
10
26
14
ns
ns
VDD = 15V, ID = 14A,
VGS = 10V, RGEN = 6Ω
Turn-Off Delay Time
Fall Time
21
2
ns
ns
Qg
Total Gate Charge
Total Gate Charge
Gate to Source Charge
Gate to Drain “Miller” Charge
VGS = 0V to 10V
18
10
3.2
2.7
nC
nC
nC
nC
VDD = 15V,
ID = 14A
Qg
VGS = 0V to 5V
Qgs
Qgd
Drain-Source Diode Characteristics
VSD
trr
Source to Drain Diode Forward Voltage
Reverse Recovery Time
VGS = 0V, IS = 14A
(Note 2)
0.8
27
15
1.2
44
27
V
ns
nC
IF = 14A, di/dt = 100A/µs
Qrr
Reverse Recovery Charge
NOTES:
2
1. R
is determined with the device mounted on a 1in pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. R
is guaranteed by design while R is determined by
θCA
θJA
θJC
the user's board design.
a. 50°C/W when mounted on a
1in pad of 2 oz copper.
b. 125°C/W when mounted on a
minimum pad of 2 oz copper.
2
2. Pulse Test: Pulse Width < 300µs, Duty cycle < 2.0%.
3. Starting T = 25°C, L = 3mH, I = 12A, V = 30V, V = 10V.
J
AS
DD
GS
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©2007 Fairchild Semiconductor Corporation
FDMS8680 Rev.C
2
Typical Characteristics TJ = 25°C unless otherwise noted
100
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
PULSE DURATION = 80µs
DUTY CYCLE = 0.5%MAX
VGS = 3V
VGS = 4V
80
60
40
20
0
VGS = 10V
VGS = 4.5V
VGS = 3.5V
VGS = 4V
VGS = 3.5V
VGS = 3V
VGS = 4.5V
PULSE DURATION = 80µs
DUTY CYCLE = 0.5%MAX
VGS = 10V
0
1
2
3
4
0
20
40
60
80
100
VDS, DRAIN TO SOURCE VOLTAGE (V)
ID, DRAIN CURRENT(A)
Figure 1. On-Region Characteristics
Figure2. N o r m a l i z e d O n - R e s i s ta n c e
vs Drain Current and Gate Voltage
1.8
24
ID = 14A
GS = 10V
PULSE DURATION = 80µs
ID = 14A
V
DUTY CYCLE = 0.5%MAX
1.6
1.4
1.2
1.0
0.8
0.6
20
16
12
8
TJ = 125oC
TJ = 25oC
4
-75 -50 -25
0
25 50 75 100 125 150
2
4
6
8
10
TJ, JUNCTION TEMPERATURE (oC)
VGS, GATE TO SOURCE VOLTAGE (V)
F i gu re 3 . N orma li zed On - Res is ta nc e
vs Junction Temperature
Figure4. On-Resistance vs Gate to
Source Voltage
100
100
PULSE DURATION = 80µs
VGS = 0V
DUTY CYCLE = 0.5%MAX
80
60
40
20
0
10
1
VDD = 5V
TJ = 25oC
TJ = 150oC
0.1
TJ = 150oC
0.01
0.001
TJ = -55oC
TJ = 25oC
TJ = -55oC
1
2
3
4
5
0.0
0.2
0.4
0.6
0.8
1.0
1.2
VGS, GATE TO SOURCE VOLTAGE (V)
VSD, BODY DIODE FORWARD VOLTAGE (V)
Figure 5. Transfer Characteristics
Figure6. Source to Drain Diode
Forward Voltage vs Source Current
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©2007 Fairchild Semiconductor Corporation
FDMS8680 Rev.C
3
Typical Characteristics TJ = 25°C unless otherwise noted
10
2000
1000
Ciss
ID = 14A
8
VDD = 10V
VDD = 15V
Coss
6
VDD = 20V
4
2
0
100
50
Crss
f = 1MHz
= 0V
V
GS
0
4
8
12
16
20
0.1
1
10
30
VDS, DRAIN TO SOURCE VOLTAGE (V)
Q , GATE CHARGE(nC)
g
Figure 7. Gate Charge Characteristics
Figure8. C a p a c i t a n c e v s D r a i n
to Source Voltage
70
60
50
40
30
20
10
0
20
10
VGS = 10V
TJ = 25oC
TJ = 125oC
Limited by Package
VGS = 4.5V
R
θJC = 2.5oC/W
1
0.01
0.1
1
10
100 300
25
50
75
100
125
150
TC, CASE TEMPERATURE (oC)
tAV, TIME IN AVALANCHE(ms)
Figure9. U n c l a m p e d I n d u c t i v e
Switching Capability
Figure10. Maximum Continuous Drain
Current vs Case Temperature
200
100
2000
1000
100
10
VGS = 10V
SINGLE PULSE
RθJA = 125oC/W
TA = 25oC
100us
1ms
10
1
10ms
THIS AREA IS
LIMITED BY rDS(on)
100ms
SINGLE PULSE
TJ = MAX RATED
RθJA = 125oC/W
1s
0.1
0.01
10s
DC
T
A = 25oC
1
0.5
10-4
10-3
10-2
t, PULSE WIDTH (s)
10-1
100
101
102
103
0.01
0.1
1
10
100
VDS, DRAIN to SOURCE VOLTAGE (V)
Figure 11. Forward Bias Safe
Operating Area
Figure12. Single Pulse Maximum
Power Dissipation
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©2007 Fairchild Semiconductor Corporation
FDMS8680 Rev.C
4
Typical Characteristics TJ = 25°C unless otherwise noted
2
1
DUTY CYCLE-DESCENDING ORDER
D = 0.5
0.2
0.1
0.1
0.05
0.02
0.01
P
DM
0.01
t
1
SINGLE PULSE
0.001
t
2
RθJA = 125oC/W
NOTES:
DUTY FACTOR: D = t /t
1
2
PEAK T = P
J
x Z
x R
+ T
DM
θJA
θJA A
0.0001
10-4
10-3
10-2
10-1
100
101
102
103
t, RECTANGULAR PULSE DURATION (s)
Figure 13. Transient Thermal Response Curve
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©2007 Fairchild Semiconductor Corporation
FDMS8680 Rev.C
5
TRADEMARKS
The following are registered and unregistered trademarks and service marks Fairchild Semiconductor owns or is authorized to use and
is not intended to be an exhaustive list of all such trademarks.
ACEx®
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MicroFET™
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SuperSOT™-8
SyncFET™
Build it Now™
CorePLUS™
CROSSVOLT™
CTL™
POWEREDGE®
Power-SPM™
PowerTrench®
Programmable Active Droop™
QFET®
The Power Franchise®
Current Transfer Logic™
TinyBoost™
TinyBuck™
TinyLogic®
TINYOPTO™
TinyPower™
TinyPWM™
TinyWire™
µSerDes™
UHC®
EcoSPARK®
QS™
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SMART START™
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SuperSOT™-3
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DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS
HEREIN TO IMPROVE RELIABILITY, FUNCTION, OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF
THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE
UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF
FAIRCHILD’S WORLDWIDE TERMS AND CONDITIONS, SPECIFICALLY THE WARRANTY THEREIN, WHICH COVERS THESE
PRODUCTS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR
SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the body, or
(b) support or sustain life, and (c) whose failure to perform
when properly used in accordance with instructions for use
provided in the labeling, can be reasonably expected to result
in significant injury to the user.
2.
A critical component is any component of a life support
device or system whose failure to perform can be reasonably
expected to cause the failure of the life support device or
system, or to affect its safety or effectiveness.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
This datasheet contains the design specifications for product development.
Specifications may change in any manner without notice.
Advance Information
Formative or In Design
This datasheet contains preliminary data; supplementary data will be pub-
lished at a later date. Fairchild Semiconductor reserves the right to make
changes at any time without notice to improve design.
Preliminary
First Production
Full Production
Not In Production
This datasheet contains final specifications. Fairchild Semiconductor reserves
the right to make changes at any time without notice to improve design.
No Identification Needed
Obsolete
This datasheet contains specifications on a product that has been discontin-
ued by Fairchild semiconductor. The datasheet is printed for reference infor-
mation only.
Rev. I30
©2007 Fairchild Semiconductor Corporation
FDMS8680 Rev.C
www.fairchildsemi.com
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