FDS6912D84Z [FAIRCHILD]
Power Field-Effect Transistor, 6A I(D), 30V, 0.028ohm, 2-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, SOIC-8;
| 型号： | FDS6912D84Z |
| 厂家： | 
FAIRCHILD SEMICONDUCTOR |
| 描述： | Power Field-Effect Transistor, 6A I(D), 30V, 0.028ohm, 2-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, SOIC-8 |
| 文件： | 总8页 (文件大小：252K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
July 2000
FDS6912
Dual N-Channel Logic Level PWM Optimized PowerTrench MOSFET
General Description
Features
These N-Channel Logic Level MOSFETs have been
designed specifically to improve the overall efficiency of
DC/DC converters using either synchronous or
conventional switching PWM controllers.
• 6 A, 30 V.
RDS(ON) = 0.028 Ω @ VGS = 10 V
DS(ON) = 0.042 Ω @ VGS = 4.5 V.
R
• Optimized for use in switching DC/DC converters
with PWM controllers
These MOSFETs feature faster switching and lower
gate charge than other MOSFETs with comparable
RDS(ON) specifications.
• Very fast switching.
• Low gate charge
The result is a MOSFET that is easy and safer to drive
(even at very high frequencies), and DC/DC power
supply designs with higher overall efficiency.
D1
D1
5
6
7
8
4
3
2
1
D2
Q1
Q2
D2
G1
S1
SO-8
G2
S2
Absolute Maximum Ratings TA=25oC unless otherwise noted
Symbol
VDSS
Parameter
Drain-Source Voltage
Ratings
Units
30
V
V
A
VGSS
Gate-Source Voltage
±25
ID
Drain Current – Continuous
– Pulsed
(Note 1a)
6
20
PD
W
Power Dissipation for Dual Operation
Power Dissipation for Single Operation
2
(Note 1a)
(Note 1b)
(Note 1c)
1.6
1
0.9
TJ, Tstg
Operating and Storage Junction Temperature Range
-55 to +150
°C
Thermal Characteristics
Thermal Resistance, Junction-to-Ambient
(Note 1a)
(Note 1)
78
40
RθJA
°C/W
°C/W
Thermal Resistance, Junction-to-Case
RθJC
Package Marking and Ordering Information
Device Marking
Device
Reel Size
Tape width
Quantity
FDS6912
FDS6912
13’’
12mm
2500 units
FDS6912 Rev F (W)
2000 Fairchild Semiconductor Corporation
Electrical Characteristics
TA = 25°C unless otherwise noted
Symbol
Parameter
Test Conditions
Min Typ Max Units
Off Characteristics
BVDSS
Drain–Source Breakdown Voltage
30
V
VGS = 0 V, ID = 250 µA
Breakdown Voltage Temperature
Coefficient
20
∆BVDSS
∆TJ
ID = 250 µA, Referenced to 25°C
mV/°C
IDSS
Zero Gate Voltage Drain Current
VDS = 24 V,
VGS = 0 V
1
µA
10
TJ = 55°C
IGSSF
IGSSR
Gate–Body Leakage, Forward
Gate–Body Leakage, Reverse
VGS = 25 V,
VGS = –25 V
VDS = 0 V
VDS = 0 V
100
nA
nA
–100
On Characteristics
(Note 2)
VGS(th)
Gate Threshold Voltage
1
2
3
V
VDS = VGS, ID = 250 µA
Gate Threshold Voltage
Temperature Coefficient
–5
∆VGS(th)
∆TJ
ID = 250 µA, Referenced to 25°C
mV/°C
RDS(on)
Static Drain–Source
On–Resistance
VGS = 10 V,
ID = 6 A
TJ = 125°C
0.024 0.028
0.034 0.048
Ω
VGS = 4.5 V,
VGS = 10 V,
VDS = 10 V,
ID = 4.9 A
VDS = 5 V
ID = 6 A
0.035 0.042
ID(on)
gFS
On–State Drain Current
20
A
S
Forward Transconductance
20
Dynamic Characteristics
Ciss
Coss
Crss
Input Capacitance
740
170
75
pF
pF
pF
V
DS = 15 V,
V GS = 0 V,
f = 1.0 MHz
Output Capacitance
Reverse Transfer Capacitance
Switching Characteristics (Note 2)
td(on)
tr
td(off)
tf
Turn–On Delay Time
Turn–On Rise Time
Turn–Off Delay Time
Turn–Off Fall Time
Total Gate Charge
Gate–Source Charge
Gate–Drain Charge
8
13
18
8
16
24
29
16
10
ns
ns
VDD = 15 V,
VGS = 10 V,
ID = 1 A,
RGEN = 6 Ω
ns
ns
Qg
Qgs
Qgd
7
nC
nC
nC
V
DS = 10 V,
ID = 6 A,
VGS = 5 V
3.8
2.5
Drain–Source Diode Characteristics and Maximum Ratings
IS
Maximum Continuous Drain–Source Diode Forward Current
1.3
1.2
A
V
VSD
Drain–Source Diode Forward
Voltage
VGS = 0 V, IS = 1.3 A
(Note 2)
0.75
Notes:
1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of
the drain pins. θJC is guaranteed by design while RθCA is determined by the user's board design.
R
a) 78°/W when
b) 125°/W when
mounted on a 0.02
in2 pad of 2 oz
copper
c) 135°/W when mounted on a
minimum mounting pad.
mounted on a 0.5in2
pad of 2 oz copper
Scale 1 : 1 on letter size paper
2.
Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%
FDS6912 Rev E (W)
Typical Characteristics
30
2
1.8
1.6
1.4
1.2
1
6.0V
VGS= 10V
5.0V
4.5V
24
VGS = 4.0V
18
4.5V
4.0V
3.5V
5.0V
12
6
6.0V
7.0V
30
10V
3.0V
0.8
0
10
20
40
50
0
0
1
1
2
2
3
3
V
,D RAIN-SOUR CE VOLTAGE (V)
ID, DRAIN CURRENT (A)
DS
Figure 1. On-Region Characteristics.
Figure 2. On-Resistance Variation with
Drain Current and Gate Voltage.
8
7
6
5
4
3
2
1
1.6
1.5
1.4
1.3
1.2
1.1
1.0
0.9
0.8
0.7
0.6
I
= 3.0A
D
ID = 6.3A
VGS =10V
o
TA = 125 C
25oC
2
4
6
8
10
-50
-25
0
25
50
75
100
125
150
V
,GATE-SOURCE VOLTAGE (V)
TJ , JUNCTION TEMPERATURE (°C)
GS
Figure 3. On-Resistance Variation
withTemperature.
Figure 4. On-Resistance Variation with
Gate-to-Source Voltage.
20
100
VDS = 5V
VGS = 0V
25°C
125°C
TJ = -55°C
10
TA = 125oC
15
10
5
1
25oC
0.1
-55oC
0.01
0.001
0.0001
0
0.4
0.8
1.2
1.6
0
1
2
3
4
5
VSD, BODY DIODE FORWARD VOLTAGE (V)
VGS , GATE TO SOURCE VOLTAGE (V)
Figure 5. Transfer Characteristics.
Figure 6. Body Diode Forward Voltage Variation
with Source Current and Temperature.
FDS6912 Rev E (W)
Typical Characteristics (continued)
10
2000
ID = 6.3A
VDS = 5V
10V
8
6
4
2
0
C
15V
iss
1000
500
C
C
oss
rss
f = 1 MHz
VGS = 0V
200
80
0.1
0.3
1
3
10
30
0
4
8
12
16
Qg, GATE CHARGE (nC)
V
, DRAIN TO SOURCE VOLTAGE (V)
DS
Figure 7. Gate Charge Characteristics.
Figure 8. Capacitance Characteristics.
30
25
20
15
10
100
SINGLE PULSE
RθJA= 135°C/W
TA = 25°
20
10
2
0.5
VGS = 10V
SINGLE PULSE
RθJA = 135 °C/W
TA = 25°C
0.05
0.01
5
0
0.1
0.2
0.5
1
2
5
10
20
0.01
0.1
1
10
100
1000
V DS , DRAIN-SOURCE VOLTAGE (V)
SINGLE PULSE TIME (SEC)
Figure 9. Maximum Safe Operating Area.
Figure 10. Single Pulse Maximum
Power Dissipation.
1
D = 0.5
0.2
0.5
0.2
0.1
R
(t) = r(t) * R
θJA
R
θJA
= 135°C/W
0.1
0.05
θJA
0.05
0.02
0.01
Single Pulse
P(pk)
0.02
0.01
t1
t2
0.005
T
- T = P * R
(t)
θJA
J
A
Duty Cycle, D = t1 /t2
0.002
0.001
0.0001
0.001
0.01
0.1
, TIME (sec)
1
10
100
300
t
1
Figure 11. Transient Thermal Response Curve.
Thermal characterization performed using the conditions described in Note 1c.
Transient thermal response will change depending on the circuit board design.
FDS6912 Rev E (W)
SOIC-8 Tape and Reel Data
SOIC(8lds)Packaging
Configuration: Figure 1.0
ATTENTION
OBSERVE PRECAUTIONS
FOR HANDLING
ELECTROSTATIC
SENSITIVE
Packaging Description:
DEVICES
SOIC-8 parts are shipped in tape. The carrier tape is
Embossed ESD Marking
made from a dissipative (carbon filled) polycarbonate
N
EC
R
IO
NT
ER
ONS
TE
O
resin. The cover tape is a multilayer film (Heat Activated
Adhesive in nature) primarily composed of polyester film,
adhesive layer, sealant, and anti-static sprayed agent.
These reeled parts in standard option are shipped with
2,500 units per 13” or 330cm diameter reel. The reels are
dark blue in color and is made of polystyrene plastic (anti-
static coated). Other option comes in 500 units per 7” or
177cm diameter reel. This and some other options are
further described in the Packaging Information table.
UTI
A
T
A
VE
P
BS
NG
ANDLI
H
C
FOR
IC
AT
ST
O
TR
ELE
VE
I
IT
S
Antistatic Cover Tape
EN
S
ES
C
DEVI
These full reels are individually barcode labeled and
placed inside
a standard intermediate box (illustrated in
figure 1.0) made of recyclable corrugated brown paper.
One box contains two reels maximum. And these boxes
are placed inside
comes in different sizes depending on the number of parts
shipped.
a barcode labeled shipping box which
Static Dissipative
Embossed Carrier Tape
F63TNR
Label
F852
NDS
9959
Customized
Label
F
F
F
F
Pin1
SOIC (8lds) Packaging Information
Standard
L86Z
Packaging Option
Packaging type
F011
D84Z
(no flow code)
SOIC-8 Unit Orientation
TNR
Rail/Tube
TNR
4,000
TNR
500
Qtyper Reel/Tube/Bag
Reel Size
2,500
95
-
Barcode Label
13” Dia
13” Dia
7” Dia
Box Dimension(mm)
Maxqty per Box
355x333x40 530x130x83 355x333x40 193x183x80
5,000
0.0774
0.6060
30,000
0.0774
-
8,000
0.0774
0.9696
2,000
0.0774
0.1182
Weight per unit(gm)
Weight per Reel (kg)
Note/Comments
Barcode
Label
Barcode
Label
355mm x 333mm x 40mm
Intermediate container for 13” reel option
Barcode Label sample
LOT: CBVK741B019
FSID: FDS9953A
QTY: 2500
SPEC:
193mm x 183mm x 80mm
Pizza Box for Standard Option
SOIC(8lds)Tape Leader and Trailer
Configuration: Figure 2.0
D/C1: Z9842AB QTY1:
SPEC REV:
CPN:
D/C2:
QTY2:
FAIRCHILD SEMICONDUCTOR CORPORATION
(F63T NR)
Carrier Tape
Cover Tape
Components
Tr ailer Ta pe
Leader Tape
640mm minimum or
80 empty pockets
1680mm minimum or
210 empty pockets
June 2001, Revꢀ C1
©2001 Fairchild Semiconductor Corporation
SOIC-8 Tape and Reel Data, continued
SOIC(8lds) Embossed Carrier Tape
Configuration: Figure 3.0
P0
D0
T
E1
E2
F
W
K0
Wc
B0
Tc
A0
D1
P1
User Direction of Feed
Dimensions are in millimeter
A0
B0
W
D0
D1
E1
E2
F
P1
P0
K0
T
Wc
Tc
Pkg type
0.450
+/-
0.150
(8lds)
SOIC
(12mm)
5.30
+/-0.10
6.50
+/-0.10
12.0
+/-0.3
1.55
+/-0.05
1.60
+/-0.10
1.75
+/-0.10
10.25
min
5.50
+/-0.05
8.0
+/-0.1
4.0
+/-0.1
2.1
+/-0.10
9.2
+/-0.3
0.06
+/-0.02
Notes: A0, B0, and K0 dimensions are determined with respect to the EIA/Jedec RS-481
rotational and lateral movement requirements (see sketches A, B, and C).
0.5mm
maximum
20 deg maximum
Typical
component
cavity
center line
0.5mm
maximum
B0
20 deg maximum component rotation
Typical
component
center line
Sketch A (Side or Front Sectional View)
Component Rotation
Sketch C (Top View)
Component lateral movement
A0
Sketch B (Top View)
Component Rotation
SOIC(8lds) Reel Configuration: Figure 4.0
W1 Measured at Hub
Dim A
Max
Dim A
max
See detail AA
Dim N
7"Diameter Option
B Min
Dim C
See detail AA
Dim D
min
W3
13" Diameter Option
W2 max Measured at Hub
DETAIL AA
Dim W2
Dimensions are in inches and millimeters
Reel
Tape Size
12mm
Dim A
Dim B
Dim C
Dim D
Dim N
Dim W1
Dim W3 (LSL-USL)
Option
7.00
177.8
0.059
1.5
512 +0.020/-0.008
13 +0.5/-0.2
0.795
20.2
2.165
55
0.488 +0.078/-0.000
12.4 +2/0
0.724
18.4
0.469 – 0.606
11.9 – 15.4
7" Dia
13.00
330
0.059
1.5
512 +0.020/-0.008
13 +0.5/-0.2
0.795
20.2
7.00
178
0.488 +0.078/-0.000
12.4 +2/0
0.724
18.4
0.469 – 0.606
11.9 – 15.4
12mm
13" Dia
January 2001, Revꢀ C
SOIC-8 Package Dimensions
SOIC-8 (FS PKG Code S1)
1 : 1
Scale 1:1 on letter size paper
Dimensions shown below are in:
inches [millimeters]
Part Weight per unit (gram): 0.0774
9
September 1998, Rev. A
©2000 Fairchild Semiconductor International
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FRFET™
SuperSOT™-3
SuperSOT™-6
SuperSOT™-8
SyncFET™
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GTO™
HiSeC™
ISOPLANAR™
LittleFET™
MicroFET™
MicroPak™
MICROWIRE™
CROSSVOLT™
DenseTrench™
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Power247™
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EcoSPARK™
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TinyLogic™
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PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative or
In Design
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
Preliminary
First Production
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
No Identification Needed
Obsolete
Full Production
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
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Not In Production
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
Rev. H4
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