FDS6975S62Z [FAIRCHILD]
Power Field-Effect Transistor, 6A I(D), 30V, 0.032ohm, 2-Element, P-Channel, Silicon, Metal-oxide Semiconductor FET, SO-8;
| 型号： | FDS6975S62Z |
| 厂家： | 
FAIRCHILD SEMICONDUCTOR |
| 描述： | Power Field-Effect Transistor, 6A I(D), 30V, 0.032ohm, 2-Element, P-Channel, Silicon, Metal-oxide Semiconductor FET, SO-8 |
| 文件： | 总8页 (文件大小：255K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
February 1999
FDS6975
Dual P-Channel, Logic Level, PowerTrenchTM MOSFET
General Description
Features
-6 A, -30 V. RDS(ON) = 0.032 W @ VGS = -10 V,
These P-Channel Logic
Level MOSFETs are
produced using Fairchild Semiconductor's advanced
PowerTrench process that has been especially tailored
to minimize the on-state resistance and yet maintain
low gate charge for superior switching performance.
RDS(ON) = 0.045 W @ VGS = -4.5 V.
Low gate charge (14.5nC typical).
High performance trench technology for extremely low
RDS(ON)
These devices are well suited for notebook computer
applications: load switching and power management,
battery charging circuits, and DC/DC conversion.
.
High power and current handling capability.
SuperSOTTM-6
SO-8
SOT-223
SuperSOTTM-8
SOIC-16
SOT-23
D2
D2
4
5
6
7
8
D1
D1
3
2
1
G2
S2
G1
1
pin
SO-8
S1
Absolute Maximum Ratings
TA = 25oC unless otherwise noted
Symbol
VDSS
VGSS
ID
Parameter
Ratings
Units
V
Drain-Source Voltage
Gate-Source Voltage
Drain Current - Continuous
- Pulsed
-30
±20
V
(Note 1a)
-6
A
-20
PD
Power Dissipation for Dual Operation
Power Dissipation for Single Operation
2
1.6
W
(Note 1a)
(Note 1b)
(Note 1c)
1
0.9
TJ,TSTG
Operating and Storage Temperature Range
-55 to 150
°C
THERMAL CHARACTERISTICS
RqJA
RqJC
Thermal Resistance, Junction-to-Ambient (Note 1a)
Thermal Resistance, Junction-to-Case
78
40
°C/W
°C/W
(Note 1)
© 1999 Fairchild Semiconductor Corporation
FDS6975 Rev.C
Electrical Characteristics (TA = 25 OC unless otherwise noted )
Symbol
Parameter
Conditions
Min
Typ
Max
Units
OFF CHARACTERISTICS
BVDSS
Drain-Source Breakdown Voltage
VGS = 0 V, I D = -250 µA
-30
V
Breakdown Voltage Temp. Coefficient
Zero Gate Voltage Drain Current
ID = -250 µA, Referenced to 25 oC
-21
mV/oC
DBVDSS/DTJ
IDSS
VDS = -24 V, VGS = 0 V
-1
µA
µA
nA
nA
TJ = 55°C
-10
IGSSF
IGSSR
Gate - Body Leakage, Forward
Gate - Body Leakage, Reverse
VGS = 20 V, VDS = 0 V
VGS = -20 V, VDS = 0 V
100
-100
ON CHARACTERISTICS (Note 2)
VGS(th)
Gate Threshold Voltage
VDS = VGS, ID = -250 µA
ID = 250 µA, Referenced to 25 oC
-1
-1.7
4
-3
V
Gate Threshold Voltage Temp. Coefficient
Static Drain-Source On-Resistance
mV/oC
DVGS(th)/DTJ
RDS(ON)
VGS = -10 V, I D = -6 A
0.025
0.033
0.034
0.032
0.051
0.045
W
TJ =125°C
VGS = -4.5 V, I D = -5 A
VGS = -10 V, VDS = -5 V
VDS = -10 V, I D = -6 A
ID(ON)
gFS
On-State Drain Current
-20
A
S
Forward Transconductance
16
DYNAMIC CHARACTERISTICS
C
Input Capacitance
VDS = -15 V, VGS = 0 V,
f = 1.0 MHz
1540
400
pF
pF
pF
iss
Coss
Crss
Output Capacitance
Reverse Transfer Capacitance
170
SWITCHING CHARACTERISTICS (Note 2)
tD(on)
tr
tD(off)
tf
Turn - On Delay Time
Turn - On Rise Time
VDS = -15 V, I D = -1 A
13
22
24
35
ns
ns
VGEN = -10 V, RGEN = 6 W
Turn - Off Delay Time
Turn - Off Fall Time
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
47
18
14.5
4
75
30
20
ns
ns
Qg
Qgs
Qgd
VDS = -10 V, I D = -6 A,
VGS = -5 V
nC
nC
nC
5
DRAIN-SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS
IS
Maximum Continuous Drain-Source Diode Forward Current
Drain-Source Diode Forward Voltage
-1.3
-1.2
A
V
VSD
VGS = 0 V, IS = -1.3 A (Note 2)
-0.73
Notes:
1. Rq is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. Rq is
JA
JC
guaranteed by design while RqCA is determined by the user's board design.
a. 78OC/W on a 0.5 in2
pad of 2oz copper.
c. 135OC/W on a 0.003 in2
pad of 2oz copper.
b. 125OC/W on a 0.02 in2
pad of 2oz copper.
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%.
FDS6975 Rev.C
Typical Electrical Characteristics
2.5
2
30
VGS = -10V
-4.5V
-6.0V
24
VGS
= -3.5V
-3.5V
18
-4.0 V
1.5
1
-4.5 V
-5.5 V
12
-7.0 V
-3.0V
-10V
6
0
0.5
0
6
12
18
24
30
0
1
2
3
4
5
- I , DRAIN CURRENT (A)
D
- V
, DRAIN-SOURCE VOLTAGE (V)
DS
Figure 1. On-Region Characteristics.
Figure 2. On-Resistance Variation with
Dain Current and Gate Voltage.
1.6
0.1
0.08
0.06
0.04
0.02
0
ID = -3A
ID
VGS
=
-6A
-10V
=
1.4
1.2
1
T
=
125° C
25° C
A
0.8
0.6
-50
-25
0
25
50
75
100
125
150
2
4
6
8
10
T
, JUNCTION TEMPERATURE (° C)
- V , GATE TO SOURCE VOLTAGE (V)
GS
J
Figure 3. On-Resistance Variation with
Figure 4. On-Resistance Variation with
Gate-to-Source Voltage.
Temperature.
30
30
24
18
12
6
T = -55° C
VDS = -5.0V
VGS = 0V
J
10
25° C
125° C
T
=
125° C
25° C
-55° C
J
1
0.1
0.01
0.001
0
1.5
0
0.3
- V
0.6
0.9
1.2
1.5
2
2.5
3
3.5
4
4.5
, BODY DIODE FORWARD VOLTAGE (V)
- V
GS
, GATE TO SOURCE VOLTAGE (V)
SD
Figure 5. Transfer Characteristics.
Figure 6. Body Diode Forward Voltage
Variation with Source Current
and Temperature.
FDS6975 Rev.C
Typical Electrical Characteristics (continued)
3000
2000
10
ID= -6A
VDS
=
-5V
C
iss
8
6
4
2
0
-10V
1000
500
-15V
C
oss
C
rss
200
100
f = 1 MHz
VGS
=
0 V
0.1
0.2
0.5
1
2
5
10
20 30
0
6
12
18
24
30
- V
, DRAIN TO SOURCE VOLTAGE (V)
Q
, GATE CHARGE (nC)
DS
g
Figure 7. Gate Charge Characteristics.
Figure 8. Capacitance Characteristics.
30
10
30
25
20
15
10
5
SINGLE PULSE
R JA =135°C/W
q
A
T
= 25°C
3
0.5
VGS = -10V
SINGLE PULSE
R JA =135°C/W
0.05
0.01
q
A
T
= 25°C
0
0.01
0.1
0.3
1
2
5
10
30 50
0.1
0.5
10
50 100
300
- V
, DRAIN-SOURCE VOLTAGE (V)
SINGLE PULSE TIME (SEC)
DS
Figure 9. Maximum Safe Operating Area.
Figure 10. Single Pulse Maximum Power
Dissipation.
1
D = 0.5
0.5
0.2
0.1
0.2
0.1
R
(t) = r(t) * R
JA
JA
q
q
R
= 135°C/W
JA
q
0.05
0.05
0.02
0.01
P(pk)
0.02
0.01
t1
t2
Single Pulse
0.005
T - T = P * R
(t)
JA
q
J
A
0.002
0.001
Duty Cycle, D = t1 /t2
0.0001
0.001
0.01
0.1
, TIME (sec)
1
10
100
300
t
1
Figure 11. Transient Thermal Response Curve.
Thermal characterization performed using the conditions described in Note 1c.
Transient thermal response will change depending on the circuit board design.
FDS6975 Rev.C
SO-8 Tape and Reel Data and Package Dimensions
SOIC(8lds) Packaging
Configuration: Figure 1.0
ELECTROSTATIC
SENSITIVE DEVICES
DO NOT SHIP OR STORE NEAR STRONG ELECTROSTATIC
ELECTROMAGNETIC, MAGNETIC OR RADIOACTIVE FIELDS
TNR DATE
PT NUMBER
PEEL STRENGTH MIN ______________gms
MAX _____________ gms
ESD Label
Antistatic Cover Tape
Conductive Embossed
Carrier Tape
F63TNR
Label
Pin 1
F
F
F
F
Customized
Label
SOIC-8 Unit Orientation
SOIC (8lds) Packaging Information
Standard
L86Z
Packaging Option
S62Z
D84Z
(no flow code)
Packaging type
TNR
2,500
Rail/Tube
Bag
200
-
TNR
500
Qty per Reel/Tube/Bag
Reel Size
95
-
13” Dia
7” Dia
Box Dimension (mm)
Max qty per Box
343x64x343 530x130x83 76x102x127 184x187x47
5,000
0.0774
0.6060
30,000
0.0774
-
1,000
0.0774
-
2,500
0.0774
0.1182
Weight per unit (gm)
Weight per Reel (kg)
Note/Comments
Bulk
343mm x 342mm x 64mm
Standard Intermediate box
ESD Label
F63TNR Label sample
LOT: CBVK741B019
F63TNLabel
ESD Label
F63TNLabel
QTY: 2500
FSID: FDS9953A
SPEC:
D/C1: D9842
D/C2:
QTY1:
QTY2:
SPEC REV:
CPN:
QARV:
(F63TNR)2
SOIC(8lds) Tape Leader and Trailer
Configuration: Figure 2.0
Carrier Tape
Cover Tape
Components
Trailer Tape
160mm minimum
Leader Tape
390mm minimum
November 1998, Rev. A
SO-8 Tape and Reel Data and Package Dimensions, continued
SOIC(8lds) Embossed Carrier Tape
Configuration: Figure 3.0
P0
D0
T
E1
E2
F
W
K0
Wc
B0
Tc
A0
D1
P1
User Direction of Feed
Dimensions are in millimeter
A0
B0
W
D0
D1
E1
E2
F
P1
P0
K0
T
Wc
Tc
Pkg type
0.450
+/-
0.150
SOIC(8lds)
(12mm)
6.50
+/-0.10
5.30
+/-0.10
12.0
+/-0.3
1.55
+/-0.05
1.60
+/-0.10
1.75
+/-0.10
10.25
min
5.50
+/-0.05
8.0
+/-0.1
4.0
+/-0.1
2.1
+/-0.10
9.2
+/-0.3
0.06
+/-0.02
Notes: A0, B0, and K0 dimensions are determined with respect to the EIA/Jedec RS-481
rotational and lateral movement requirements (see sketches A, B, and C).
0.5mm
maximum
20 deg maximum
Typical
component
cavity
center line
0.5mm
maximum
B0
20 deg maximum component rotation
Typical
component
center line
Sketch A (Side or Front Sectional View)
Component Rotation
Sketch C (Top View)
Component lateral movement
A0
Sketch B (Top View)
Component Rotation
SOIC(8lds) Reel Configuration: Figure 4.0
W1 Measured at Hub
Dim A
Max
Dim A
max
See detail AA
Dim N
7” Diameter Option
B Min
Dim C
See detail AA
Dim D
min
W3
13” Diameter Option
W2 max Measured at Hub
DETAIL AA
Dim W2
Dimensions are in inches and millimeters
Reel
Option
Tape Size
12mm
Dim A
Dim B
Dim C
Dim D
Dim N
Dim W1
Dim W3 (LSL-USL)
7.00
177.8
0.059
1.5
512 +0.020/-0.008
13 +0.5/-0.2
0.795
20.2
5.906
150
0.488 +0.078/-0.000
12.4 +2/0
0.724
18.4
0.469 – 0.606
11.9 – 15.4
7” Dia
13.00
330
0.059
1.5
512 +0.020/-0.008
13 +0.5/-0.2
0.795
20.2
7.00
178
0.488 +0.078/-0.000
12.4 +2/0
0.724
18.4
0.469 – 0.606
11.9 – 15.4
12mm
13” Dia
November 1998, Rev. A
SO-8 Tape and Reel Data and Package Dimensions, continued
SOIC-8 (FS PKG Code S1)
1 : 1
Scale 1:1 on letter size paper
Dimensions shown below are in:
inches [millimeters]
Part Weight per unit (gram): 0.0774
9
September 1998, Rev. A
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.
ACEx™
CoolFET™
ISOPLANAR™
MICROWIRE™
POP™
PowerTrench™
QS™
CROSSVOLT™
E2CMOSTM
FACT™
FACT Quiet Series™
Quiet Series™
SuperSOT™-3
SuperSOT™-6
SuperSOT™-8
TinyLogic™
FAST®
FASTr™
GTO™
HiSeC™
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FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER
NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or
systems which, (a) are intended for surgical implant into
the body, or (b) support or sustain life, or (c) whose
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
reasonably expected to result in significant injury to the
user.
2. A critical component is any component of a life
support device or system whose failure to perform can
be reasonably expected to cause the failure of the life
support device or system, or to affect its safety or
effectiveness.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative or
In Design
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
Preliminary
First Production
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
No Identification Needed
Obsolete
Full Production
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
Not In Production
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
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