FHP3130 [FAIRCHILD]
Single, Dual, and Quad, High Speed, 2.7V to 12V, Rail-to-Rail Amplifiers; 单，双和四通道，高速， 2.7V至12V ，轨到轨放大器
| 型号： | FHP3130 |
| 厂家： | 
FAIRCHILD SEMICONDUCTOR |
| 描述： | Single, Dual, and Quad, High Speed, 2.7V to 12V, Rail-to-Rail Amplifiers |
| 文件： | 总22页 (文件大小：848K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
December 2005
FHP3130, FHP3230, FHP3430
Single, Dual, and Quad, High Speed, 2.7V to 12V,
Rail-to-Rail Amplifiers
Features at ±5V
Description
■ 2.5mA supply current per amplifier
■ 0.008% / 0.01˚ differential gain/phase
The FHP3130 (single), FHP3230 (dual), and FHP3430 (quad)
are low cost, high performance, voltage feedback amplifiers that
consume only 2.5mA of supply current per channel while pro-
viding ±100mA of output current. These amplifiers are designed
to operate from 2.7V to 12V (±6V) supplies. The common mode
voltage range extends below the negative rail and the output
provides rail-to-rail performance.
■ 16MHz 0.1dB bandwidth at V = 2V
o
pp
■ Output voltage range at R = 150Ω : -4.8V to 4.8V
L
■ Input includes negative rail
■ 110V/µs slew rate
■ ±100mA output current
The FHP3130, FHP3230, and FHP3430 are designed on a
complimentary bipolar process and provide 170MHz of band-
width and 110V/µs of slew rate at a supply voltage of ±5V. The
combination of low power, rail-to-rail performance, low voltage
operation, and tiny package options make these amplifiers well
suited for use in many general purpose high speed applications.
■ 17nV/√Hz input voltage noise
■ >100dB PSRR, CMRR, and Open Loop Gain
■ FHP3130 – improved replacement for KM4100
■ FHP3230 – improved replacement for KM4200
■ FHP3130 lead(Pb)-free package options
These amplifiers also provide excellent video specifications.
They offer extremely low differential gain and phase (0.008%/
0.01˚) and 0.1dB gain flatness to 16MHz for superb standard
definition video performance. Their output drive capability effort-
lessly supports 4 video loads.
(SOT23-5, SOIC-8)
■ FHP3230 lead(Pb)-free package options
(MSOP-8, SOIC-8)
■
■
FHP3430 lead(Pb)-free package options
(TSSOP-14, SOIC-14)
RoHS compliant
0.01
0.01
V
s
= ±±V
■ Fully specified at +3V, +5V, and ±5V supplies
0.008
0.008
RL = 1±0Ω
0.006
0.004
0.002
0
0.006
0.004
0.002
0
Gain
Applications
■ A/D driver
Phase
■ Active filters
-0.002
-0.004
-0.006
-0.008
-0.01
-0.002
-0.004
-0.006
-0.008
-0.01
■ CCD imaging systems
■ CD/DVD ROM
■ Coaxial cable drivers
■ Portable/battery-powered applications
■ Twisted pair driver
■ Video driver
-0.7
-0.5 -0.3
-0.1
0.1
0.3
0.5
0.7
Input Voltage (V)
Typical Application -YC Video Line Driver
Y
C
IN
IN
75Ω
75Ω
1/2
FHP3230
1/2
FHP3230
Y
C
OUT
OUT
1kΩ
1kΩ
75Ω
75Ω
1kΩ
1kΩ
FHP3130, FHP3230, FHP3430 Rev. 1A
1
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Pin Assignments
Pin Configurations
FHP3230
FHP3230
SOIC/MSOP
Pin#
Pin
OUT1
-IN1
Type
Description
1
2
3
4
5
6
7
8
Output Output, channel 1
1
8
7
6
±
OUT1
+Vs
Input
Input
Input
Input
Input
Negative Input, channel 1
2
-IN1
OUT2
-IN2
+IN1
-Vs
Positive Input, channel 1
Negative supply
3
+IN1
+IN2
-IN2
Positive Input, channel 2
Negative Input, channel 2
4
-Vs
+IN2
OUT2
+Vs
Output Output, channel 2
FHP3130
SOT23
Input
Positive supply
FHP3130
Type
1
±
4
OUT
+Vs
-IN
Pin#
2
-Vs
+IN
+
-
SOT/SOIC
Pin
OUT
-Vs
Description
3
1 / 6
Input
Input
Input
Input
Input
-
Output
Negative supply
2 / 4
3 / 3
+IN
-IN
Positive Input
Negative Input
Positive supply
No Connect
FHP3130
SOIC
4 / 4
5 / 7
+Vs
NC
1
2
3
4
8
NC
NC
na / 1, 5, 8
7
6
±
-IN1
+IN1
-Vs
+Vs
OUT
NC
FHP3430
Pin#
Pin
Type
Description
1
2
OUT1
-IN1
Output Output, channel 1
Input
Input
Input
Input
Input
Negative Input, channel 1
FHP3430
SOIC/TSSOP
3
+IN1
+Vs
Positive Input, channel 1
Positive supply
4
5
+IN2
-IN2
Positive Input, channel 2
Negative Input, channel 2
1
2
3
4
14
OUT1
-IN1
OUT4
-IN
6
13
7
OUT2
OUT3
-IN3
Output Output, channel 2
Output Output, channel 3
12
11
+IN1
+Vs
+IN4
-Vs
8
9
Input
Input
Input
Input
Input
Negative Input, channel 3
10
11
12
13
14
+IN3
-Vs
Positive Input, channel 3
Negative supply
±
6
7
10
9
+IN2
-IN2
+IN3
-IN
+IN4
-IN4
Positive Input, channel 4
Negative Input, channel 4
8
OUT2
OUT3
OUT4
Output Output, channel 4
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2
FHP3130, FHP3230, FHP3430 Rev. 1A
Absolute Maximum Ratings
Parameter
Supply Voltage
Min
Max
Unit
0
12.6
V
V
Input Voltage Range
-V -0.5V
+V + 0.5V
s
s
Reliability Information
Parameter
Junction Temperature
Min
Typ
Max
Unit
150
150
300
˚C
Storage Temperature Range
-65
˚C
Lead Temperature (Soldering, 10s)
˚C
1
8-Lead SOIC
155
246
296
130
128
˚C/W
˚C/W
˚C/W
˚C/W
˚C/W
1
8-Lead MSOP
1
5-Lead SOT23
1
14-Lead TSSOP
1
14-Lead SOIC
Note:
1. Package thermal resistance (θ ), JDEC standard, multi-layer test boards, still air.
JA
ESD Protection
Product
FHP3130
FHP3230
FHP3430
Package
SOT23
SOIC
TBD
TBD
SOIC
3.5kV
2kV
MSOP
3.5kV
1.5kV
SOIC
TBD
TBD
TSSOP
TBD
Human Body Model (HBM)
TBD
TBD
Charged Device Model (CDM)
TBD
Recommended Operating Conditions
Parameter
Operating Temperature Range
Supply Voltage Range
Min
Typ
Max
+85
12
Unit
˚C
-40
2.7
V
FHP3130, FHP3230, FHP3430 Rev. 1A
3
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Electrical Characteristics at +3V
T = 25˚C, V = 3V, R = 2kΩ to V /2, G = 2, R = R =1kΩ; unless otherwise noted.
c
s
L
s
f
g
Symbol
Parameter
Conditions
Min
Typ
Max
Units
Frequency Domain Response
-3dB Bandwidth
UGBW
G = +1, V
= 0.2V
= 0.2V
160
50
MHz
MHz
MHz
MHz
OUT
OUT
OUT
pp
pp
BW
BW
BW
-3dB Bandwidth
G = +2, V
G = +2, V
ss
Full Power Bandwidth
0.1dB Bandwidth
= 1V
45
Ls
pp
G = +2, R = 150Ω, R = R = 1.5kΩ,
25
0.1dBss
L
f
g
V
= 0.2V
OUT
pp
GBWP
Gain Bandwitdth Product
Time Domain Response
Rise and Fall Time
Settling Time to 0.1%
Overshoot
G = +6, V
= 0.2V
60
MHz
OUT
pp
t , t
V
V
V
V
= 0.2V step
= 2V step
12
45
<1
90
ns
ns
R
F
OUT
OUT
OUT
OUT
t
S
OS
SR
= 0.2V step
%
Slew Rate
= 2V step, G = -1
V/µs
Distortion / Noise Response
2nd Harmonic Distortion
3rd Harmonic Distortion
Total Harmonic Distortion
Input Voltage Noise
Crosstalk
HD2
HD3
THD
V
V
V
= 1V , 5MHz
50
50
50
17
62
dBc
dBc
OUT
OUT
OUT
pp
= 1V , 5MHz
pp
= 2V , 5MHz, R = 100Ω, G = -1
dB
pp
L
e
> 100kHz
FHP3230 at 1MHz
nV/√Hz
dB
n
X
TALK
IO
DC Performance
V
Input Offset Voltage
Average Drift
1
mV
µV/˚C
µA
dV
-5
IO
I
Input Bias Current
-1.8
-3.5
0.01
100
100
2.5
b
dI
Average Drift
nA/˚C
µA
b
I
Input Offset Current
Power Supply Rejection Ratio
Open Loop Gain
IO
PSRR
DC
DC, R = 150Ω
dB
A
dB
OL
L
I
Supply Current per Amplifier
Input Characteristics
Input Resistance
mA
S
R
C
500
1.25
kΩ
pF
V
IN
IN
Input Capacitance
CMIR
Input Common Mode V Range
-0.3 to 2
95
CMRR
Common Mode Rejection Ratio DC, V
= 0V to V - 1.5
dB
CM
s
Output Characteristics
R = 2kΩ to V /2, G = -1
0.05 to
2.95
L
s
V
V
Output Voltage Swing
O
R = 150Ω to V /2, G = -1
0.1 to 2.9
±100
V
L
s
I
I
Linear Output Current
mA
mA
OUT
SC
Short Circuit Output Current
V
= V /2
±120
O
s
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4
FHP3130, FHP3230, FHP3430 Rev. 1A
Electrical Characteristics at +5V
T = 25˚C, V = 5V, R = 2kΩ to V /2, G = 2, R = R =1kΩ; unless otherwise noted.
c
s
L
s
f
g
Symbol
Parameter
Conditions
Min
Typ
Max
Units
Frequency Domain Response
-3dB Bandwidth
UGBW
G = +1, V
= 0.2V
= 0.2V
165
50
MHz
MHz
MHz
MHz
OUT
OUT
OUT
pp
pp
BW
BW
BW
-3dB Bandwidth
G = +2, V
G = +2, V
ss
Full Power Bandwidth
0.1dB Bandwidth
= 2V
30
Ls
pp
G = +2, R = 150Ω, R = R = 1.5kΩ,
18
0.1dBss
L
f
g
V
= 0.2V
OUT
pp
GBWP
Gain Bandwitdth Product
Time Domain Response
Rise and Fall Time
Settling Time to 0.1%
Overshoot
G = +6, V
= 0.2V
60
MHz
OUT
pp
t , t
V
V
V
V
= 0.2V step
= 2V step
12
55
ns
ns
R
F
OUT
OUT
OUT
OUT
t
S
OS
SR
= 0.2V step
<1
%
Slew Rate
= 2V step, G = -1
105
V/µs
Distortion / Noise Response
2nd Harmonic Distortion
3rd Harmonic Distortion
Total Harmonic Distortion
Input Voltage Noise
Crosstalk
HD2
HD3
THD
V
V
V
= 2V , 5MHz
56
75
dBc
dBc
dB
OUT
OUT
OUT
pp
= 2V , 5MHz
pp
= 2V , 5MHz
56
pp
e
> 100kHz
17
nV/√Hz
dB
n
X
FHP3230 at 1MHz
62
TALK
DG
Differential Gain
NTSC (3.58MHz), R = 150Ω,
0.02
%
L
AC coupled into 220µF, V = ±2.5V
s
DP
Differential Phase
NTSC (3.58MHz), R = 150Ω,
0.04
˚
L
AC coupled into 220µF, V = ±2.5V
s
DC Performance
V
Input Offset Voltage
Average Drift
1
mV
µV/˚C
µA
IO
dV
-5
IO
I
Input Bias Current
-1.8
-3.5
0.01
100
100
2.5
b
dI
Average Drift
nA/˚C
µA
b
I
Input Offset Current
Power Supply Rejection Ratio
Open Loop Gain
IO
PSRR
DC
dB
A
DC, R = 150Ω
dB
OL
L
I
Supply Current per Amplifier
Input Characteristics
Input Resistance
mA
S
R
C
500
1.2
kΩ
pF
V
IN
IN
Input Capacitance
CMIR
Input Common Mode V Range
-0.3 to 4
95
CMRR
Common Mode Rejection Ratio DC, V
= 0V to V - 1.5
dB
CM
s
Output Characteristics
R = 2kΩ to V /2
0.05 to
4.95
L
s
V
V
Output Voltage Swing
O
R = 150Ω to V /2
0.1 to 4.9
±100
V
L
s
I
I
Linear Output Current
mA
mA
OUT
SC
Short Circuit Output Current
V
= V /2
±120
O
s
FHP3130, FHP3230, FHP3430 Rev. 1A
5
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Electrical Characteristics at ±5V
T = 25˚C, V = ±5V, R = 2kΩ to GND, G = 2, R = R =1kΩ; unless otherwise noted.
c
s
L
f
g
Symbol
Parameter
Conditions
Min
Typ
Max
Units
Frequency Domain Response
-3dB Bandwidth
UGBW
G = +1, V
G = +2, V
G = +2, V
= 0.2V
= 0.2V
170
50
MHz
MHz
MHz
MHz
OUT
OUT
OUT
pp
pp
BW
BW
BW
-3dB Bandwidth
ss
Full Power Bandwidth
0.1dB Bandwidth
= 2V
30
Ls
pp
G = +2, R = 150Ω, R = R = 1.5kΩ,
16
0.1dBss
L
f
g
V
= 0.2V
OUT
pp
GBWP
Gain Bandwitdth Product
Time Domain Response
Rise and Fall Time
Settling Time to 0.1%
Overshoot
G = +6, V
= 0.2V
60
MHz
OUT
pp
t , t
V
V
V
V
= 0.2V step
= 2V step
12
52
ns
ns
R
F
OUT
OUT
OUT
OUT
t
S
OS
SR
= 0.2V step
<1
%
Slew Rate
= 2V step, G = -1
110
V/µs
Distortion / Noise Response
2nd Harmonic Distortion
3rd Harmonic Distortion
Total Harmonic Distortion
Input Voltage Noise
Crosstalk
HD2
HD3
THD
V
V
V
= 2V , 5MHz
55
75
dBc
dBc
dB
OUT
OUT
OUT
pp
= 2V , 5MHz
pp
= 2V , 5MHz
55
pp
e
> 100kHz
17
nV/√Hz
dB
n
X
FHP3230 at 1MHz
62
TALK
DG
Differential Gain
NTSC (3.58MHz), R = 150Ω,
0.008
%
L
AC coupled into 220µF
DP
Differential Phase
NTSC (3.58MHz), R = 150Ω,
0.01
˚
L
AC coupled into 220µF
DC Performance
1
V
Input Offset Voltage
-6
1
-5
6
mV
µV/˚C
µA
IO
dV
Average Drift
IO
1
I
Input Bias Current
-3.5
-1.8
-3.5
0.002
100
100
2.5
b
dI
Average Drift
nA/˚C
µA
b
1
I
Input Offset Current
-0.8
80
0.8
3.5
IO
2
PSRR
Power Supply Rejection Ratio
DC
DC, R = 150Ω
dB
2
A
Open Loop Gain
80
dB
OL
L
1
I
Supply Current per Amplifier
mA
S
Input Characteristics
Input Resistance
R
C
500
1.1
kΩ
pF
V
IN
IN
Input Capacitance
CMIR
Input Common Mode V Range
-5 to 4
100
2
CMRR
Common Mode Rejection Ratio DC, V
= -5V to 3.5V
75
dB
CM
Output Characteristics
R = 2kΩ
-4.95 to
4.95
L
V
V
Output Voltage Swing
O
1
R = 150Ω
-4.65
-4.8 to 4.8
±100
4.65
V
L
I
I
Linear Output Current
mA
mA
OUT
SC
Short Circuit Output Current
V
= 0V
±120
O
Notes:
1. 100% tested at 25˚C
2. Min/max guaranteed by design/characterization.
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6
FHP3130, FHP3230, FHP3430 Rev. 1A
Typical Performance Characteristics
T = 25˚C, V = 5V, R = 2kΩ to V /2 for V = 5V and 3V, R = 2kΩ to ground for V = ±5V, G = 2,
c
s
L
s
s
L
s
R = R = 1kΩ; unless otherwise noted.
f
g
Figure 1. Non-Inverting Freq. Response (±5V)
Figure 2. Inverting Freq. Response (±5V)
1
1
0
0
G = 1
f
G = -1
R = 0
-1
-2
-3
-4
-5
-6
-7
-1
G = 10
G = ±
G = 2
G = -10
-2
G = -±
-3
G = -2
-4
-5
V
V
= ±±V
V
V
= ±±V
= 0.2V
s
o
s
o
-6
-7
= 0.2V
pp
pp
0.1
1
10
100
1000
0.1
1
10
100
1000
Frequency (MHz)
Frequency (MHz)
Figure 3. Non-Inverting Freq. Response (+5V)
Figure 4. Inverting Freq. Response (+5V)
1
1
0
0
G = 1
R = 0
f
G = -1
-1
-1
G = 10
G = ±
G = 2
G = -10
G = -±
G = -2
-2
-2
-3
-3
-4
-4
-5
-5
-6
-7
V
V
= +±V
= 0.2V
V
V
= +±V
= 0.2V
s
o
s
o
-6
pp
pp
-7
0.1
1
10
100
1000
0.1
1
10
100
1000
Frequency (MHz)
Frequency (MHz)
Figure 5. Non-Inverting Freq. Response (+3V)
Figure 6. Inverting Freq. Response (+3V)
1
1
0
0
G = 1
f
G = -1
R = 0
-1
-2
-3
-4
-5
-6
-7
-1
G = 10
G = ±
G = 2
G = -10
-2
G = -±
-3
G = -2
-4
-5
V
V
= +3V
V
V
= +3V
= 0.2V
s
o
s
o
-6
-7
= 0.2V
pp
pp
0.1
1
10
100
1000
0.1
1
10
100
1000
Frequency (MHz)
Frequency (MHz)
FHP3130, FHP3230, FHP3430 Rev. 1A
7
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Typical Performance Characteristics
T = 25˚C, V = 5V, R = 2kΩ to V /2 for V = 5V and 3V, R = 2kΩ to ground for V = ±5V, G = 2,
c
s
L
s
s
L
s
R = R = 1kΩ; unless otherwise noted.
f
g
Figure 7. Frequency Response vs. C (+3V)
Figure 8. Frequency Response vs. R (+3V)
L
L
1
1
V
V
= +3V
= 0.2V
s
o
pp
0
-1
-2
-3
-4
-5
-6
-7
0
RL = ±0Ω
CL = 2000pF
-1
RS = ±Ω
RL = ±KΩ
CL = 1000pF
RS = 6.±Ω
-2
-3
CL = ±00pF
RS = 10Ω
RL = 1±0Ω
-4
RL = 1KΩ
+
-
CL = 100pF
RS = 20Ω
Rs
-5
CL RL
1kΩ
V
V
= +3V
= 0.2V
CL = ±0pF
RS = 1±Ω
s
o
-6
-7
1kΩ
pp
0.1
1
10
100
1000
0.1
1
10
100
1000
Frequency (MHz)
Frequency (MHz)
Figure 9. Large Signal Freq. Response (+5V)
Figure 10. Gain vs. Flattness
1
0.2
0
0
-0.2
-0.4
-0.6
-0.8
-1
-1
VO = 1Vpp
Vs = 3V
Vs = ±V
-2
VO = 2Vpp
-3
VO = 4Vpp
Vs = 10V
-4
-5
G = 2
R = R = 1.±kΩ
f
g
G = 2
s
-6
V
= +±V
s
V
= +±V
R
= 1±0Ω
L
-7
0.1
1
10
100
1000
0.1
1
10
100
Frequency (MHz)
Frequency (MHz)
Figure 11. HD2 vs. R (+3V)
Figure 12. HD3 vs. R (+3V)
L
L
-40
-45
-50
-55
-60
-65
-70
-75
-80
-85
-90
-40
-45
-50
-55
-60
-65
-70
-75
-80
-85
-90
RL = 2KΩ
RL = ±KΩ
RL = ±KΩ
RL = 1KΩ
RL = 1KΩ
RL = 1±0Ω
RL = 2KΩ
RL = 1±0Ω
V
O
= 1V
V = 1V
O pp
pp
0.1
1
10
0.1
1
10
Frequency (MHz)
Frequency (MHz)
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8
FHP3130, FHP3230, FHP3430 Rev. 1A
Typical Performance Characteristics
T = 25˚C, V = 5V, R = 2kΩ to V /2 for V = 5V and 3V, R = 2kΩ to ground for V = ±5V, G = 2,
c
s
L
s
s
L
s
R = R = 1kΩ; unless otherwise noted.
f
g
Figure 13. HD2 vs. V (+5V)
Figure 14. HD3 vs. V (+5V)
O
O
-40
-40
-45
-50
-55
-60
-65
-70
-75
-80
-85
-90
-95
-45
-50
-55
-60
-65
-70
-75
-80
-85
-90
-95
10MHz
±MHz
10MHz
±MHz
1MHz
100MHz
1MHz
100KHz
0.5 0.7 0.9 1.1 1.3 1.5 1.7 1.9 2.1 2.3 2.5
0.5 0.7 0.9 1.1 1.3 1.5 1.7 1.9 2.1 2.3 2.5
Output Amplitude (Vpp
)
Output Amplitude (Vpp)
Figure 15. CMRR vs. Frequency
Figure 16. PSRR vs. Frequency
-20
0
-10
-20
-30
-40
-50
-60
-70
-80
-90
-30
-40
-50
-60
-70
-80
-90
-100
-120
V
s
= ±±V
V = ±±V
s
10k
100k
1M
10M
100M
1G
10k
100k
1M
10M
100M
1G
Frequency (Hz)
Frequency (Hz)
Figure 17. Open Loop Gain and Phase
Figure 18. Output Swing vs. Load (+3V)
80
70
60
50
40
30
20
10
0
0
3.25
3.0
2.75
2.50
2.25
2.0
-20
Gain
-40
R
= 1±0Ω
L
-60
-80
Phase
1.75
1.50
1.25
1.0
0.75
0.50
0.25
0
-100
-120
-140
-160
-180
-200
R
= 7±Ω
L
-10
-20
G = -1
V
s
= ±±V
R
= 10KΩ
L
-0.25
10k
100k
1M
10M
100M
1G
-2.0 -1.5 -1.0 -0.5
0
0.5 1.0 1.5 2.0
Frequency (Hz)
Input Voltage (V)
FHP3130, FHP3230, FHP3430 Rev. 1A
9
www.fairchildsemi.com
Typical Performance Characteristics
T = 25˚C, V = 5V, R = 2kΩ to V /2 for V = 5V and 3V, R = 2kΩ to ground for V = ±5V, G = 2,
c
s
L
s
s
L
s
R = R = 1kΩ; unless otherwise noted.
f
g
Figure 19. Input Voltage Noise (+3V)
Figure 20. Crosstalk vs. Frequency (+3V)
100
90
80
70
60
50
40
30
20
10
0
-30
-35
-40
-45
-50
-55
-60
-65
-70
-75
-80
-85
-90
0.0001 0.001
0.01
0.1
1
10
100
0.1
1
10
100
Frequency (MHz)
Frequency (MHz)
Figure 21. Pulse Resp. vs. Common Mode Voltage
Figure 22. Large Signal Pulse Response (+3V)
2.5
1.2V Offset
0.6V Offset
2.0
1.5
1.0
0.5
No Offset
-0.6V Offset
-1.2V Offset
0
G = -1
G = 2
-0.5
0
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0
Time (0.2µs/div)
Time (µs)
Figure 23. Large Signal Pulse Response (+5V)
Figure 24. Large Signal Pulse Response (±5V)
3.5
3.0
2.5
2.0
1.5
1.0
0.5
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
0
G = 2
-0.5
G = 2
-0.5
0
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0
0
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0
Time (µs)
Time (µs)
www.fairchildsemi.com
10
FHP3130, FHP3230, FHP3430 Rev. 1A
Typical Performance Characteristics
T = 25˚C, V = 5V, R = 2kΩ to V /2 for V = 5V and 3V, R = 2kΩ to ground for V = ±5V, G = 2,
c
s
L
s
s
L
s
R = R = 1kΩ; unless otherwise noted.
f
g
Figure 25. Differential Gain and Phase (±2.5V)
Figure 26. Differential Gain and Phase (±5V)
0.05
0.04
0.03
0.02
0.01
0
0.05
0.04
0.03
0.02
0.01
0
0.01
0.01
V
R
= ±±V
L = 1±0Ω
RL = 1±0Ω
AC coupled into 220µF
s
0.008
0.008
AC coupled into 220µF
0.006
0.004
0.002
0
0.006
0.004
0.002
0
Gain
Gain
Phase
Phase
-0.002
-0.004
-0.006
-0.008
-0.01
-0.002
-0.004
-0.006
-0.008
-0.01
-0.01
-0.02
-0.03
-0.04
-0.01
-0.02
-0.03
-0.04
-0.7
-0.5 -0.3
-0.1
0.1
0.3
0.5
0.7
-0.6
-0.4
-0.2
0
0.2
0.4
0.6
Input Voltage (V)
Input Voltage (V)
FHP3130, FHP3230, FHP3430 Rev. 1A
11
www.fairchildsemi.com
Where I is the supply current, V + is the positive supply pin
s
s
Applications Information
voltage, V - is the negative supply pin voltage, V
is the
s
o(RMS)
RMS output voltage and I
delivered to the load.
is the RMS output current
General Description
OUT(RMS)
The FHP3130 (single), FHP3230 (dual), and FHP3430 (quad)
are low cost, high performance, voltage feedback amplifiers that
consume only 2.5mA of supply current per channel while pro-
viding ±100mA of output current. These amplifiers are designed
to operate from 2.7V to 12V (±6V) supplies. The common mode
voltage range extends below the negative rail and the output
provides rail-to-rail performance.
Follow the maximum power derating curves shown in Figure 28
below to ensure proper operation.
1.6
TSSOP-14
1.4
SOIC-14
The FHP3130, FHP3230, and FHP3430 are designed on a
complimentary bipolar process and provide 170MHz of band-
width and 110V/µs of slew rate at a supply voltage of ±5V. The
combination of low power, rail-to-rail performance, low voltage
operation, and tiny package options make these amplifiers well
suited for use in many general purpose high speed applications.
1.2
1.0
SOIC-8
0.8
MSOP-8
0.6
0.4
0.2
0
SOT23-±
These amplifiers also provide excellent video specifications.
They offer extremely low differential gain and phase (0.008%/
0.01˚) and 0.1dB gain flatness to 16MHz for superb standard
definition video performance. Their output drive capability effort-
lessly supports 4 video loads.
-40
-20
0
20
40
60
80
Ambient Temperature (°C)
Driving Capacitive Loads
Figure 28. Maximum Power Derating
Overdrive Recovery
The Frequency Response vs. C plot on page 8, illustrates the
L
response of the FHP3230 Family. A small series resistance (R )
at the output of the amplifier, illustrated in Figure 27, will
s
For an amplifier, an overdrive condition occurs when the output
and/or input ranges are exceeded. The recovery time varies
based on whether the input or output is overdriven and by how
much the ranges are exceeded. The FHP3130/3230/3430 will
typically recover in less than 50ns from an overdrive condition.
Figure 29 shows the FHP3230 in an overdriven condition.
improve stability and settling performance. R values in the
s
Frequency Response vs. C plot were chosen to achieve maxi-
L
mum bandwidth with less than 1dB of peaking. For maximum
flatness, use a larger R .
s
+
-
Rs
3.5
V
= 3V
s
G = ±
= 2kΩ
CL RL
3.0
2.5
2.0
1.5
1.0
0.5
0
Rf
R
L
f
Output
R = 1kΩ
Rg
Figure 27. Typical Topology for Driving
Capactive Loads
Input
Power Dissipation
-0.5
The maximum internal power dissipation allowed is directly
related to the maximum junction temperature. If the maximum
junction temperature exceeds 150°C for an extended time, device
failure may occur.
0
0.2 0.4 0.6 0.8 10 1.2 1.4 1.6 1.8
Time (µs)
Figure 29. Overdrive Recovery
Composite Video Summer
The FHP3130, FHP3230 and FHP3430 are short circuit protected.
However, this may not guarantee that the maximum junction
temperature (+150°C) is not exceeded under all conditions.
RMS Power Dissipation can be calculated using the following
equation:
The bandwidth and differential gain/phase performance of the
FHP3130/3230/3430 amplifiers make them well suited for video
applications. Figure 30 shows a typical Composite Video Sum-
mer. The high output current capability allows for driving multi-
ple video loads. Figure 31 shows the resulting differential gain/
phase of this 3-amp configuration driving 4 video loads, 37.5Ω.
Power Dissipation = Is * (Vs+ - Vs-) + (Vs+ - Vo(RMS)) * IOUT(RMS)
www.fairchildsemi.com
12
FHP3130, FHP3230, FHP3430 Rev. 1A
Evaluation Board Information
The following evaluation boards are available to aid in the test-
ing and layout of thes devices:
YIN
+
1kΩ
1/4
FHP3430
7±Ω
-
1kΩ
Evaluation
Board #
+
1kΩ
7±Ω
Products
1/4
FHP3430
CYOUT
7±Ω
1kΩ
-
KEB002
FHP3130IS5X
1kΩ
CIN
+
1kΩ
1/4
FHP3430
KEB003
KEB010
KEB006
KEB012
KEB018
FHP3130IM8X
FHP3230IMU8X
FHP3230IM8X
FHP3430IMTC14X
FHP3430IM14X
±00Ω
7±Ω
-
1kΩ
1kΩ
Figure 30.Typical Composite Video Summer
Evalutaion Board Schematics
0.05
0
0.05
0
Evaluation board schematics and layouts are shown in Figures
32 thru 46. These evaluation boards are built for dual supply
operation. Follow these steps to use the board in a single supply
application:
Gain
-0.05
-0.1
-0.15
-0.2
-0.25
-0.05
-0.1
-0.15
-0.2
-0.25
Phase
1. Short -V to ground
s
2. Use C3 and C4, if the -V pin of the amplifier is not directly
s
connected to the ground plane.
V
R
= ±±V
= 37.±Ω
s
L
-0.7 -0.5 -0.3 -0.1
0.1
0.3
0.5
0.7
Input Voltage (V)
Figure 31. DG/DP of CV Summer
Driving 4 Video Loads
Layout Considerations
General layout and supply bypassing play major roles in high
frequency performance. Fairchild has evaluation boards to use
as a guide for high frequency layout and as aid in device testing
and characterization. Follow the steps below as a basis for high
frequency layout:
•
•
•
•
Include 6.8µF and 0.01µF ceramic capacitors
Place the 6.8µF capacitor within 0.75 inches of the power pin
Place the 0.01µF capacitor within 0.1 inches of the power pin
Remove the ground plane under and around the part,
especially near the input and output pins to reduce parasitic
capacitance
•
Minimize all trace lengths to reduce series inductances
Refer to the evaluation board layouts shown below for more
information.
Figure 32. FHP3130 KEB002/KEB003 Schematic
FHP3130, FHP3230, FHP3430 Rev. 1A
13
www.fairchildsemi.com
Figure 33. FHP3130 KEB002 (top side)
Figure 35. FHP3130 KEB003 (top side)
Figure 34. FHP3130 KEB002 (bottom side)
Figure 36. FHP3130 KEB003 (bottom side)
www.fairchildsemi.com
14
FHP3130, FHP3230, FHP3430 Rev. 1A
Figure 39. FHP3230 KEB006 (bottom side)
Figure 37. FHP3230 KEB006/KEB010 Schematic
Figure 40. FHP3230 KEB010 (top side)
Figure 38. FHP3230 KEB006 (top side)
FHP3130, FHP3230, FHP3430 Rev. 1A
15
www.fairchildsemi.com
Figure 41. FHP3230 KEB010 (bottom side)
Figure 43. FHP3430 KEB012 (top side)
Figure 42. FHP3430 KEB012/KEB018 Schematic
Figure 44. FHP3430 KEB012 (bottom side)
www.fairchildsemi.com
16
FHP3130, FHP3230, FHP3430 Rev. 1A
Figure 45. FHP3430 KEB018 (top side)
Figure 46. FHP3430 KEB018 (bottom side)
FHP3130, FHP3230, FHP3430 Rev. 1A
17
www.fairchildsemi.com
Mechanical Dimensions
8-Lead Outline Package (SOIC)
SOIC-8
MIN
SYMBOL
MAX
0.25
0.46
0.25
4.98
3.99
A1
B
C
D
E
e
0.10
0.36
0.19
4.80
3.81
1.27 BSC
D
7
e
ZD
C
L
H
h
L
5.80
0.25
0.41
1.52
0°
6.20
0.50
1.27
1.72
8°
C
E
H
L
A
ZD
A2
0.53 ref
1.57
1.37
Pin No. 1
B
DETAIL-A
L
NOTE:
h x 45
DETAIL-A
1. All dimensions are in millimeters.
2. Lead coplanarity should be 0 to 0.10mm (.004") max.
3. Package surface finishing:
A1
A2
α
A
(2.1) Top: matte (charmilles #18~30).
(2.2) All sides: matte (charmilles #18~30).
(2.3) Bottom: smooth or matte (charmilles #18~30).
C
4. All dimensions excluding mold flashes and end flash
from the package body shall not exceed 0.152mm (.006)
per side (D).
8-Lead Outline Package (MSOP)
02
e
S
MSOP-8
SYMBOL
A
MIN
MAX
–
1.10
t1
A1
A2
D
0.10
0.86
3.00
0.05
0.08
0.10
R1
E/2 2X
t2
– H –
R
D2
E
2.95
4.90
3.00
2.95
0.51
0.51
0.15
0.10
0.15
0.10
0.10
0.13
0.13
+0.15/-0.06
Gauge
Plane
3
7
E1
E1
E2
E3
E4
R
0.25mm
01
L
03
2
– B –
E3
E4
L1
Detail A
R1
t1
t2
b
b1
c
0.15
0.31
0.41
0.33
0.30
0.18
+0.15/-0.06
0.08
0.08
+0.07/-0.08
0.05
0.05
b
ccc
A B C
1
2
Scale 40:1
c
c1
2
4
6
b1
Detail A
D2
A2
E2
Section A - A
c1
01
02
03
L
L1
aaa
bbb
ccc
e
0.15
3.0
12.0
12.0
0.55
0.95 BSC
0.10
0.08
0.25
+0.03/-0.02
5
3.0
3.0
3.0
0.15
–
–
–
–
–
A
A
– A –
b
A
E1
E
bbb
M
A B C
A1
aaa A
D
3
4
NOTE:
0.65 BSC
0.525 BSC
S
–
1
2
3
4
5
6
7
All dimensions are in millimeters (angle in degrees), unless otherwise specified.
Datums – B – and – C – to be determined at datum plane – H – .
Dimensions "D" and "E1" are to be determined at datum – H – .
Dimensions "D2" and "E2" are for top package and dimensions "D" and "E1" are for bottom package.
Cross sections A – A to be determined at 0.13 to 0.25mm from the leadtip.
Dimension "D" and "D2" does not include mold flash, protrusion or gate burrs.
Dimension "E1" and "E2" does not include interlead flash or protrusion.
www.fairchildsemi.com
18
FHP3130, FHP3230, FHP3430 Rev. 1A
Mechanical Dimensions
14-Lead Outline Package (SOIC)
SOIC-14
MIN
SYMBOL
MAX
.0098
.018
.0098
.344
A1
B
C
D
E
e
.0040
.014
.0075
.337
.150
.050 BSC
D
7°
e
ZD
C
L
.157
H
h
L
.2284
.0099
.016
.060
0
.2440
.0196
.050
.068
8
C
E
H
L
A
ZD
A2
0.20 ref
.062
.054
Pin No. 1
B
DETAIL-A
L
NOTE:
1. All dimensions are in inches.
h x 45°
DETAIL-A
2. Lead coplanarity should be 0 to 0.10mm (.004") m
3. Package surface finishing:
A1
A
A2
α
(2.1) Top: matte (charmilles #18~30).
(2.2) All sides: matte (charmilles #18~30).
(2.3) Bottom: smooth or matte (charmilles #18~30
C
4. All dimensions excluding mold flashes and end fla
from the package body shall not exceed o.152mm
per side (d).
14-Lead Outline Package (TSSOP)
7
6
– B –
e
N
5
(b)
2X E/2
TSSOP-14
8
SYMBOL
A
MIN
NOM
MAX
1.10
0.15
0.95
0.75
–
1.0 DIA
E1 E
c
c1
–
–
A1
A2
L
R
R1
b
0.05
0.85
0.50
0.09
0.09
0.19
0.19
0.09
0.09
0°
–
1.0
0.90
0.60
–
–
–
0.22
–
–
b1
1
2
3
ddd C B A
SECTION AA
2X
6
e /2
9
N/2 TIPS
1.0
–
0.30
0.25
0.20
0.16
8°
b1
c
ccc
D
c1
01
L1
aaa
bbb
ccc
ddd
e
A2
A
8
3
7
– A –
–
aaa C
1.0 REF
0.10
0.10
0.05
0.20
0.65 BSC
12° REF
12° REF
5.00
4.40
6.4 BSC
0.65 BSC
14
– C –
b
NX A1
(02)
(0.20)
M
bbb C B A
R1
02
03
D
– H –
R
GAGE
PLANE
4.90
4.30
5.10
4.50
E1
E
e
10
(03)
A
A
0.25
01
L
N
(L1)
NOTES:
1
2
3
4
5
All dimensions are in millimeters (angle in degrees).
Dimensioning and tolerancing per ASME Y14.5–1994.
Dimensions "D" does not include mold flash, protusions or gate burrs. Mold flash protusions or gate burrs shall not exceed 0.15 per side .
Dimension "E1" does not include interlead flash or protusion. Interlead flash or protusion shall not exceed 0.25 per side.
Dimension "b" does not include dambar protusion. Allowable dambar protusion shall be 0.08mm total in excess of the "b" dimension at maximum
material condition. Dambar connot be located on the lower radius of the foot. Minimum space between protusion and adjacent lead is 0.07mm
for 0.5mm pitch packages.
FHP3130, FHP3230, FHP3430 Rev. 1A
19
www.fairchildsemi.com
Mechanical Dimensions
5-Lead Outline Package (SOT23)
C
L
e
b
2
SYMBOL
MIN
0.90
0.00
0.90
0.25
0.09
2.80
2.60
1.50
0.35
MAX
1.45
0.15
1.30
0.50
0.20
3.10
3.00
1.75
0.55
A
A1
A2
b
C
D
E
E1
L
C
C
L
E
L
E1
e1
D
e
e1
α
0.95 ref
1.90 ref
α
C
0
10
C
L
NOTE:
1. All dimensions are in millimeters.
Foot length measured reference to flat
foot surface parallel to DATUM 'A' and lead surface.
3. Package outline exclusive of mold flash & metal burr.
4. Package outline inclusive of solder plating.
5. Comply to EIAJ SC74A.
2
A
A2
A1
6. Package ST 0003 REV A supercedes SOT-D-2005 REV C.
www.fairchildsemi.com
20
FHP3130, FHP3230, FHP3430 Rev. 1A
Ordering Information
Pack
Qty
Model
Part Number
Lead Free Package Container
FHP3130 FHP3130IS5X*
FHP3130 FHP3130IM8X*
FHP3230 FHP3230IMU8X*
FHP3230 FHP3230IM8X
FHP3430 FHP3430IMTC14X*
FHP3430 FHP3430IM14X*
Yes
Yes
Yes
Yes
Yes
Yes
SOT23-5
SOIC-8
Reel
Reel
Reel
Reel
Reel
Reel
3000
2500
3000
2500
2500
2500
MSOP-8
SOIC-8
TSSOP-14
SOIC-14
Temperature range for all parts: -40˚C to +85˚C.
Moisture sensitivity level for all parts is MSL-1.
* Preliminary
FHP3130, FHP3230, FHP3430 Rev. 1A
21
www.fairchildsemi.com
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.
ACEx™
PowerSaver™
SuperSOT™-8
SyncFET™
TinyLogic
ISOPLANAR™
LittleFET™
MICROCOUPLER™
MicroFET™
MicroPak™
MICROWIRE™
MSX™
FAST
ActiveArray™
Bottomless™
Build it Now™
CoolFET™
CROSSVOLT™
DOME™
EcoSPARK™
E2CMOS™
EnSigna™
FACT™
PowerTrench
FASTr™
FPS™
FRFET™
GlobalOptoisolator™
GTO™
QFET
QS™
TINYOPTO™
TruTranslation™
UHC™
QT Optoelectronics™
Quiet Series™
RapidConfigure™
RapidConnect™
µSerDes™
SILENT SWITCHER
SMART START™
SPM™
UltraFET
HiSeC™
I2C™
UniFET™
VCX™
Wire™
MSXPro™
OCX™
i-Lo™
ImpliedDisconnect™
IntelliMAX™
OCXPro™
OPTOLOGIC
OPTOPLANAR™
PACMAN™
POP™
Power247™
PowerEdge™
FACT Quiet Series™
Stealth™
Across the board. Around the world.™
SuperFET™
SuperSOT™-3
SuperSOT™-6
The Power Franchise
Programmable Active Droop™
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVESTHE RIGHTTO MAKE CHANGES WITHOUTFURTHER NOTICETOANY
PRODUCTS HEREINTO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOTASSUMEANYLIABILITY
ARISING OUTOFTHEAPPLICATION OR USE OFANYPRODUCTOR CIRCUITDESCRIBED HEREIN; NEITHER DOES IT
CONVEYANYLICENSE UNDER ITS PATENTRIGHTS, NORTHE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUTTHE EXPRESS WRITTENAPPROVALOF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or
systems which, (a) are intended for surgical implant into
the body, or (b) support or sustain life, or (c) whose
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
reasonably expected to result in significant injury to the
user.
2. A critical component is any component of a life
support device or system whose failure to perform can
be reasonably expected to cause the failure of the life
support device or system, or to affect its safety or
effectiveness.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative or
In Design
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
Preliminary
First Production
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
No Identification Needed
Obsolete
Full Production
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
Not In Production
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
Rev. I16
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©2005 Fairchild Semiconductor Corporation
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