FOD073L [FAIRCHILD]

LVTTL/LVCMOS COMPATIBLE LOW INPUT CURRENT HIGH GAIN SPLIT DARLINGTON OPTOCOUPLERS; LVTTL / LVCMOS兼容低输入电流,高增益SPLIT达林顿光耦合器
FOD073L
型号: FOD073L
厂家: FAIRCHILD SEMICONDUCTOR    FAIRCHILD SEMICONDUCTOR
描述:

LVTTL/LVCMOS COMPATIBLE LOW INPUT CURRENT HIGH GAIN SPLIT DARLINGTON OPTOCOUPLERS
LVTTL / LVCMOS兼容低输入电流,高增益SPLIT达林顿光耦合器

光电 输出元件 输入元件 局域网
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LVTTL/LVCMOS COMPATIBLE LOW INPUT  
CURRENT HIGH GAIN SPLIT DARLINGTON  
OPTOCOUPLERS  
SINGLE CHANNEL:  
DUAL CHANNEL:  
FOD070L  
FOD073L  
FOD270L  
DESCRIPTION  
The FOD070L, FOD270L and FOD073L optocouplers consist of an AlGaAs  
LED optically coupled to a high gain split darlington photodetector. These  
devices are specified to operate at a 3.3V supply voltage.  
8
The split darlington configuration separating the input photodiode and the first  
stage gain from the output transistor permits lower output saturation voltage  
and higher speed operation than possible with conventional darlington  
phototransistor optocoupler. In the dual channel device FOD073L, an inte-  
grated emitter – base resistor provides superior stability over temperature.  
1
The combination of a very low input current of 0.5 mA and a high current  
transfer ratio of 2000% makes this family particularly useful for input interface  
to MOS, CMOS, LSTTL and EIA RS232C, while output compatibility is  
ensured to LVCMOS as well as high fan-out LVTTL requirements.  
8
8
1
1
An internal noise shield provides exceptional common mode rejection of  
10 kV/µs.  
FEATURES  
Low power consumption  
Low input current - 0.5 mA  
Available in single channel 8-pin DIP (FOD270L), 8-pin SOIC (FOD070L)  
and dual channel 8-pin SOIC  
High CTR-2000%  
VCC  
N/C  
1
8
VCC  
+
1
8
VF1  
_
+
VB  
2
3
4
7
6
5
V01  
2
3
7
6
5
VF  
_
_
VO  
V02  
High CMR-10 kV/µs  
VF2  
Guaranteed performance over temperature 0°C to 70°C  
U.L. recognized (File # E90700)  
LVTTL/LVCMOS Compatible output  
GND  
N/C  
GND  
+
4
FOD070L / FOD270L  
FOD073L  
APPLICATIONS  
Digital logic ground isolation – LVTTL/LVCMOS  
Telephone ring detector  
EIA-RS-232C line receiver  
High common mode noise line receiver  
µP bus isolation  
Current loop receiver  
TRUTH TABLE  
V
LED  
O
ON  
LOW  
OFF  
HIGH  
© 2004 Fairchild Semiconductor Corporation  
Page 1 of 17  
8/10/04  
LVTTL/LVCMOS COMPATIBLE LOW INPUT  
CURRENT HIGH GAIN SPLIT DARLINGTON  
OPTOCOUPLERS  
SINGLE CHANNEL:  
DUAL CHANNEL:  
FOD070L  
FOD073L  
FOD270L  
ABSOLUTE MAXIMUM RATINGS (No derating required up to 85°C)  
Parameter  
Symbol  
Value  
Units  
Storage Temperature  
Operating Temperature  
T
-40 to +125  
-40 to +85  
°C  
°C  
STG  
T
OPR  
Lead Solder Temperature (Wave solder only. See reflow profile for surface  
mount devices)  
T
260 for 10 sec  
°C  
SOL  
EMITTER  
DC/Average Forward Input Current  
Peak Forward Input Current (50% duty cycle, 1 ms P.W.)  
Peak Transient Input Current - (1 µs P.W., 300 pps)  
Reverse Input Voltage  
Each Channel  
Each Channel  
Each Channel  
Each Channel  
Each Channel  
I (avg)  
20  
40  
1.0  
5
mA  
mA  
A
F
I (pk)  
F
I (trans)  
F
V
P
V
R
D
Input Power Dissipation  
35  
mW  
DETECTOR  
Average Output Current  
Each Channel  
Each Channel  
Each Channel  
Each Channel  
I
(avg)  
60  
0.5  
mA  
V
O
Emitter-Base Reverse Voltage (FOD070L, FOD270L)  
Supply Voltage, Output Voltage  
Output power dissipation  
V
EB  
V
, V  
-0.5 to 7  
100  
V
CC  
O
P
mW  
D
ELECTRICAL CHARACTERISTICS (T = 0 to 70°C Unless otherwise specified)  
A
INDIVIDUAL COMPONENT CHARACTERISTICS  
Parameter  
Test Conditions Symbol  
Device  
Min  
Typ** Max  
Unit  
EMITTER  
T =25°C  
1.35  
1.7  
A
V
All  
V
V
F
Input Forward Voltage  
Each Channel (I = 1.6 mA)  
1.75  
F
(T =25°C, I = 10 µA)  
Input Reverse Breakdown  
Voltage  
A
R
BV  
All  
5.0  
R
Each Channel  
FOD070L  
FOD270L  
DETECTOR  
Logic high output current  
(I = 0 mA, V = V = 3.3 V)  
F
O
CC  
I
0.05  
25  
µA  
OH  
Each Channel  
FOD073L  
FOD070L  
FOD270L  
I = 1.6 mA, V = Open, V = 3.3V  
0.5  
0.8  
1.5  
3
F
O
CC  
Logic Low Supply  
Current  
I
mA  
CCL  
I
= I = 1.6mA  
F2  
F1  
FOD073L  
V
= V = Open, V = 3.3 V  
O1  
O2 CC  
FOD070L  
FOD270L  
I = 0 mA, V = Open, V = 3.3V  
0.01  
0.01  
1
F
O
CC  
Logic High Supply  
Current  
I
µA  
CCH  
I
= I = 0mA  
F2  
F1  
FOD073L  
2
V
= V = Open, V = 3.3 V  
O1  
O2 CC  
**All typicals at T = 25°C  
A
© 2004 Fairchild Semiconductor Corporation  
Page 2 of 17  
8/10/04  
LVTTL/LVCMOS COMPATIBLE LOW INPUT  
CURRENT HIGH GAIN SPLIT DARLINGTON  
OPTOCOUPLERS  
SINGLE CHANNEL:  
DUAL CHANNEL:  
FOD070L  
FOD073L  
FOD270L  
TRANSFER CHARACTERISTICS (T = 0 to 70°C Unless otherwise specified)  
A
Parameter  
Test Conditions Symbol  
Device  
Min  
Typ**  
Max Unit  
COUPLED  
Current transfer ratio  
(Notes 1,2)  
(I = 0.5 mA, V = 0.4 V, V = 3.3V) CTR  
ALL  
400  
7000  
%
V
F
O
CC  
Logic low output voltage  
output voltage  
(Note 2)  
(I = 1.6 mA, I = 8 mA, V = 3.3V)  
ALL  
ALL  
0.07  
0.07  
0.3  
0.4  
F
O
CC  
V
OL  
(I = 5 mA, I = 15 mA, V = 3.3V)  
F
O
CC  
**All typicals at T = 25°C  
A
SWITCHING CHARACTERISTICS (T = 0 to 70°C unless otherwise specified., V = 3.3 V)  
A
CC  
Parameter  
Test Conditions Symbol  
Device  
Min  
Typ**  
Max  
Unit  
FOD070L  
FOD270L  
Propagation delay  
time to logic low  
3
5
(R = 4.7 k, I = 0.5 mA)  
L
F
T
30  
µs  
PHL  
PLH  
(Note 2) (Fig. 17)  
FOD073L  
FOD070L  
FOD270L  
Propagation delay  
time to logic high  
50  
25  
(R = 4.7 k, I = 0.5 mA)  
L
F
T
90  
µs  
(Note 2) (Fig. 17)  
FOD073L  
Common mode transient  
immunity at logic high  
(I = 0 mA, |V | = 10 V  
)
F
CM  
P-P  
|CM |  
ALL  
1,000 10,000  
V/µs  
V/µs  
H
T = 25°C (R = 2.2 k) (Note 3) (Fig. 18)  
A
L
(I = 1.6 mA, |V | = 10 V ,  
P-P  
F
CM  
Common mode transient  
immunity at logic low  
R = 2.2 k)  
|CM |  
ALL  
1,000 10,000  
L
L
T = 25°C (Note 3) (Fig. 18)  
A
** All typicals at TA = 25°C  
© 2004 Fairchild Semiconductor Corporation  
Page 3 of 17  
8/10/04  
LVTTL/LVCMOS COMPATIBLE LOW INPUT  
CURRENT HIGH GAIN SPLIT DARLINGTON  
OPTOCOUPLERS  
SINGLE CHANNEL:  
DUAL CHANNEL:  
FOD070L  
FOD073L  
FOD270L  
ISOLATION CHARACTERISTICS (T = 0 to 70°C Unless otherwise specified)  
A
Characteristics  
Test Conditions Symbol  
(Relative humidity = 45%)  
Device  
Min  
Typ**  
Max  
Unit  
Input-output  
insulation leakage current  
(T = 25°C, t = 5 s)  
A
I
ALL  
1.0  
µA  
I-O  
(V = 3000 VDC)  
I-O  
(Note 4)  
FOD070L  
FOD073L  
2500  
Withstand insulation  
test voltage  
(R 50%, T = 25°C)  
H
A
V
V
RMS  
ISO  
(Note 4) ( t = 1 min.)  
FOD270L 5000  
12  
Resistance (input to output)  
Capacitance (input to output)  
(Note 4) (V = 500 VDC)  
R
C
ALL  
ALL  
10  
I-O  
I-O  
(Note 4,5) (f = 1 MHz)  
0.7  
pF  
I-O  
Input-Input  
Insulation leakage current  
(RH 45%, V = 500 VDC (Note 6)  
I
FOD073L 0.005  
µA  
I-I  
I-I  
11  
Input-Input Resistance  
Input-Input Capacitance  
(V = 500 VDC) (Note 6)  
R
FOD073L  
FOD073L  
10  
I-I  
I-I  
(f = 1 MHz) (Note 6)  
C
0.03  
pF  
I-I  
** All typicals at T = 25°C  
A
NOTES  
1. Current Transfer Ratio is defined as a ratio of output collector current, I , to the forward LED input current, I , times 100%.  
O
F
2. Pin 7 open. (FOD070L and FOD270L only)  
3. Common mode transient immunity in logic high level is the maximum tolerable (positive) dV /dt on the leading edge of the  
CM  
common mode pulse signal, V , to assure that the output will remain in a logic high state (i.e., V >2.0 V). Common mode  
CM  
O
transient immunity in logic low level is the maximum tolerable (negative) dV /dt on the trailing edge of the common mode  
CM  
pulse signal, V , to assure that the output will remain in a logic low state (i.e., V <0.8 V).  
CM  
O
4. Device is considered a two terminal device: Pins 1, 2, 3 and 4 are shorted together and Pins 5, 6, 7 and 8 are shorted together.  
5. For dual channel devices, CI-O is measured by shorting pins 1 and 2 or pins 3 and 4 together and pins 5 through 8 shorted  
together.  
6. Measured between pins 1 and 2 shorted together, and pins 3 and 4 shorted together.  
© 2004 Fairchild Semiconductor Corporation  
Page 4 of 17  
8/10/04  
LVTTL/LVCMOS COMPATIBLE LOW INPUT  
CURRENT HIGH GAIN SPLIT DARLINGTON  
OPTOCOUPLERS  
SINGLE CHANNEL:  
DUAL CHANNEL:  
FOD070L  
FOD073L  
FOD270L  
TYPICAL PERFORMANCE CURVES  
Fig. 2 Current Transfer Ratio vs. Input Forward Current  
(FOD270L only)  
Fig. 1 Input Forward Current vs Forward Voltage  
4500  
100  
10  
V
V
= 0.4V  
= 3.3V  
= 25°C  
O
4000  
3500  
3000  
2500  
2000  
1500  
1000  
500  
CC  
T
A
= 85°C  
T
A
T
= 85°C  
A
T
= 70°C  
= 25°C  
A
T
A
T
= -40°C  
A
T
= 70°C  
A
1
T
A
= 25°C  
T
A
= 0°C  
T
= 0°C  
A
0.1  
T
A
= -40°C  
0.01  
0.001  
0
0.1  
0.9  
1.0  
1.1  
1.2  
1.3  
1.4  
1.5  
1.6  
1.7  
1
10  
VF - FORWARD VOLTAGE (V)  
IF - FORWARD CURRENT (mA)  
Fig. 3 Current Transfer Ratio vs. Input Forward Current  
(FOD070L only)  
Fig. 4 Current Transfer Ratio vs. Input Forward Current  
(FOD073L only)  
4500  
3500  
3000  
V
V
T
= 0.4V  
= 3.3V  
= 25°C  
V
V
T
= 0.4V  
= 3.3V  
CC  
O
O
4000  
3500  
3000  
2500  
2000  
1500  
1000  
500  
CC  
T
= 85°C  
= 70°C  
= 25°C  
A
T
A
= 85°C  
= 25°C  
A
A
T
A
T
= 70°C  
= 25°C  
A
2500  
2000  
1500  
T
A
T
A
T
= 0°C  
A
T
= 0°C  
A
1000  
500  
0
T
A
= -40°C  
T
= -40°C  
A
0
0.1  
1
10  
0.1  
1
10  
IF - FORWARD CURRENT (mA)  
IF - FORWARD CURRENT (mA)  
Fig. 6 DC Transfer Characterstics (FOD073L only)  
Fig. 5 DC Transfer Charactersitics (FOD070L, FOD270L)  
140  
120  
100  
80  
160  
140  
120  
T
V
= 25°C  
CC  
A
T
V
= 25°C  
CC  
A
= 3.3V  
I
= 5mA  
= 3.3V  
F
I
= 5mA  
F
I
F
= 4.5mA  
I
F
= 4.5mA  
4mA  
4mA  
3.5mA  
100  
80  
3.5mA  
3mA  
3mA  
2.5mA  
2mA  
2.5mA  
60  
40  
20  
0
60  
2mA  
1.5mA  
1mA  
1.5mA  
1mA  
40  
20  
0
0.5mA  
0.5mA  
0.0  
0.2  
0.4  
0.6  
V
0.8  
1.0  
1.2  
1.4  
1.6  
1.8  
2.0  
0.0  
0.2  
0.4  
0.6  
V
0.8  
1.0  
1.2  
1.4  
1.6  
1.8  
2.0  
- OUTPUT VOLTAGE (V)  
- OUTPUT VOLTAGE (V)  
O
O
© 2004 Fairchild Semiconductor Corporation  
Page 5 of 17  
8/10/04  
LVTTL/LVCMOS COMPATIBLE LOW INPUT  
CURRENT HIGH GAIN SPLIT DARLINGTON  
OPTOCOUPLERS  
SINGLE CHANNEL:  
DUAL CHANNEL:  
FOD070L  
FOD073L  
FOD270L  
TYPICAL PERFORMANCE CURVES  
Fig. 7 Supply Current vs Input Forward Current  
(FOD270L, FOD070L, FOD073L)  
Fig. 8 Output Current vs Input Forward Current  
(FOD270L only)  
10  
100  
10  
1
T
V
= 25°C  
CC  
A
= 3.3V  
FOD270L  
or FOD070L  
T
A
= 85°C  
T
= -40°C  
FOD073L  
A
1
T
A
= 0°C  
T
A
= 25°C  
T
A
= 70°C  
0.1  
V
V
= 0.4V  
O
= 3.3V  
CC  
T
= 25°C  
A
0.01  
0.1  
1
10  
0.1  
1
10  
I
F
- Input Forward Current (mA)  
I - Input Forward Current (mA)  
F
Fig. 9 Output Current vs Input Forward Current  
(FOD070L only)  
Fig. 10 Output Current vs Input Forward Current  
(FOD073L only)  
100  
100  
10  
T
A
= 70°C, 85°C  
T
A
= 70°C, 85°C  
T
= -40°C  
A
T
= -40°C  
A
T
A
= 0°C  
= 25°C  
A
T
= 0°C  
A
T
T
A
= 25°C  
10  
1
V
V
= 0.4V  
O
V
V
= 0.4V  
O
= 3.3V  
CC  
= 3.3V  
CC  
T
= 25°C  
A
T
A
= 25°C  
1
0.1  
0.1  
0.1  
1
10  
1
10  
I
F
- Forward Current (mA)  
I - Forward Current (mA)  
F
Fig. 11 Propagation Delay vs.  
Input Forward Current (FOD070L only)  
Fig. 12 Propagation Delay vs.  
Ambient Temperature (FOD073L only)  
5
4
3
2
54  
52  
50  
48  
70  
60  
50  
T
V
R
= 25°C  
CC  
= 4.7kΩ  
1/f = 100µs  
A
V
= 3.3V  
CC  
IF = 0.5mA  
L
= 3.3V  
Duty Cycle = 10%  
L
R
= 4.7kΩ  
1/f = 100µs  
Duty Cycle = 10%  
t
PLH  
40  
30  
20  
t
PLH  
1
0
46  
44  
10  
0
t
PHL  
t
PHL  
0
1
2
3
4
5
6
7
8
9
10  
-40  
-20  
0
20  
40  
60  
80  
100  
I
F
- Input Forward Current (mA)  
T - Ambient Temperature (°C)  
A
© 2004 Fairchild Semiconductor Corporation  
Page 6 of 17  
8/10/04  
LVTTL/LVCMOS COMPATIBLE LOW INPUT  
CURRENT HIGH GAIN SPLIT DARLINGTON  
OPTOCOUPLERS  
SINGLE CHANNEL:  
DUAL CHANNEL:  
FOD070L  
FOD073L  
FOD270L  
TYPICAL PERFORMANCE CURVES  
Fig. 13 Propagation Delay vs.  
Ambient Temperature (FOD070L, FOD270L)  
Fig. 14 Propagation Delay To Logic Low vs Pulse Period  
(FOD073L, FOD070L, FOD270L)  
14  
12  
10  
140  
120  
100  
100  
10  
1
V
= 3.3V  
CC  
T
= 25°C  
A
IF = 0.5mA  
R
1/f = 200µs  
Duty Cycle = 10%  
V
= 3.3V  
CC  
I = 0.5mA  
= 4.7kΩ  
= 4.7kΩ  
L
R
L
Duty Cycle = 50µs  
FOD073L  
8
6
4
80  
60  
40  
t
PLH  
FOD070L,  
FOD270L  
t
PHL  
2
0
20  
0
-40  
-20  
0
20  
40  
60  
80  
100  
0.01  
0.1  
T - Pulse Period (ms)  
1
10  
T
- Ambient Temperature (°C)  
A
Fig. 15 Propagation Delay vs.  
Input Forward Current (FOD270L only)  
Fig. 16 Propagation Delay vs.  
Input Forward Current (FOD073L only)  
52  
50  
28  
26  
24  
22  
20  
18  
16  
5
4
12  
10  
T
V
R
= 25°C  
CC  
= 4.7kΩ  
T
V
R
= 25°C  
CC  
= 4.7kΩ  
A
A
= 3.3V  
= 3.3V  
L
L
1/f = 100µs  
Duty Cycle = 10%  
1/f = 100µs  
Duty Cycle = 10%  
t
PLH  
8
6
t
PLH  
3
2
48  
46  
4
2
0
1
0
44  
42  
t
PHL  
t
PHL  
0
1
2
3
4
5
6
7
8
9
10  
0
1
2
3
4
5
6
7
8
9
10  
I
- Input Forward Current (mA)  
I - Input Forward Current (mA)  
F
F
© 2004 Fairchild Semiconductor Corporation  
Page 7 of 17  
8/10/04  
LVTTL/LVCMOS COMPATIBLE LOW INPUT  
CURRENT HIGH GAIN SPLIT DARLINGTON  
OPTOCOUPLERS  
SINGLE CHANNEL:  
DUAL CHANNEL:  
FOD070L  
FOD073L  
FOD270L  
Noise  
Shield  
Noise  
Shield  
+
IF  
VCC  
VCC  
+3.3 V  
+3.3 V  
8
7
6
5
1
2
3
4
8
Z
= 50  
V
RL  
VF1  
-
0.1 µF  
Pulse  
IF  
V
B  
Generator  
V01  
VO  
RL  
tr = 5ns  
2
3
4
7
Z
= 50 V  
VF  
C
= 15 pF*  
V
O  
V02  
VO  
6
IF  
MONITOR  
VF2  
+
0.1 µF  
I
Monitor  
GND  
Rm  
5
Rm  
CL = 15 pF*  
GND  
Test Circuit for FOD070L, FOD270L  
Test Circuit for FOD073L  
IF  
3.3 V  
VO  
50%  
50%  
TPLH  
VOL  
TPHL  
*Includes Probe and Fixture Capacitance  
Fig. 17 Switching Time Test Circuit  
© 2004 Fairchild Semiconductor Corporation  
Page 8 of 17  
8/10/04  
LVTTL/LVCMOS COMPATIBLE LOW INPUT  
CURRENT HIGH GAIN SPLIT DARLINGTON  
OPTOCOUPLERS  
SINGLE CHANNEL:  
DUAL CHANNEL:  
FOD070L  
FOD073L  
FOD270L  
IF  
Noise  
Shield  
Noise  
Shield  
VCC  
VCC  
V01  
V02  
+
+3.3 V  
+3.3 V  
VO  
1
8
7
6
5
1
2
3
4
8
7
6
5
IF  
VF1  
-
RL  
VB  
RL  
2
A
VF  
0.1 µF  
A
B
VO  
-
VO  
3
B
VFF  
VF2  
+
0.1 µF  
VFF  
GND  
GND  
-
4
VCM  
+
-
VCM  
-
+
Pulse Gen  
Pulse Gen  
Test Circuit for FOD070L and FOD270L  
Test Circuit for FOD073L  
V
CM  
10 V  
90% 90%  
10%  
10%  
tf  
0 V  
tr  
VO  
3.3 V  
VOL  
Switch at A : I F= 0 mA  
VO  
Switch at B : I F= 1.6 mA  
Fig. 18 Common Mode Immunity Test Circuit  
© 2004 Fairchild Semiconductor Corporation  
Page 9 of 17  
8/10/04  
LVTTL/LVCMOS COMPATIBLE LOW INPUT  
CURRENT HIGH GAIN SPLIT DARLINGTON  
OPTOCOUPLERS  
SINGLE CHANNEL:  
DUAL CHANNEL:  
FOD070L  
FOD073L  
FOD270L  
8-Pin DIP  
Package Dimensions (Through Hole)  
Package Dimensions (Surface Mount)  
0.390 (9.91)  
0.370 (9.40)  
PIN 1  
ID.  
PIN 1  
ID.  
0.270 (6.86)  
0.250 (6.35)  
0.270 (6.86)  
0.250 (6.35)  
0.390 (9.91)  
0.370 (9.40)  
0.300 (7.62)  
TYP  
0.070 (1.78)  
0.045 (1.14)  
0.070 (1.78)  
0.045 (1.14)  
0.020 (0.51)  
MIN  
0.016 (0.41)  
0.008 (0.20)  
0.020 (0.51) MIN  
0.200 (5.08)  
0.140 (3.55)  
0.154 (3.90)  
0.120 (3.05)  
0.045 [1.14]  
0.022 (0.56)  
0.016 (0.41)  
0.022 (0.56)  
0.016 (0.41)  
15° MAX  
0.315 (8.00)  
MIN  
0.016 (0.40)  
0.008 (0.20)  
0.100 (2.54)  
TYP  
0.300 (7.62)  
TYP  
0.100 (2.54) TYP  
0.405 (10.30)  
MIN  
Lead Coplanarity : 0.004 (0.10) MAX  
Package Dimensions (0.4"Lead Spacing)  
Recommend Pad Layout for  
Surface Mount Leadform  
PIN 1  
ID.  
0.070 (1.78)  
0.270 (6.86)  
0.250 (6.35)  
0.060 (1.52)  
0.100 (2.54)  
0.390 (9.91)  
0.370 (9.40)  
0.295 (7.49)  
0.415 (10.54)  
0.030 (0.76)  
0.070 (1.78)  
0.045 (1.14)  
0.004 (0.10) MIN  
0.200 (5.08)  
0.140 (3.55)  
0.154 (3.90)  
0.120 (3.05)  
0.022 (0.56)  
0.016 (0.41)  
0° to 15°  
0.016 (0.40)  
0.008 (0.20)  
0.400 (10.16)  
TYP  
0.100 (2.54) TYP  
NOTE  
All dimensions are in inches (millimeters)  
© 2004 Fairchild Semiconductor Corporation  
Page 10 of 17  
8/10/04  
LVTTL/LVCMOS COMPATIBLE LOW INPUT  
CURRENT HIGH GAIN SPLIT DARLINGTON  
OPTOCOUPLERS  
SINGLE CHANNEL:  
DUAL CHANNEL:  
FOD070L  
FOD073L  
FOD270L  
SOIC 8  
Package Dimensions (Surface Mount)  
Recommend Pad Layout  
0.024 (0.61)  
0.164 (4.16)  
0.144 (3.66)  
0.060 (1.52)  
0.202 (5.13)  
0.182 (4.63)  
0.275 (6.99)  
0.155 (3.94)  
0.010 (0.25)  
0.143 (3.63)  
0.006 (0.16)  
0.123 (3.13)  
0.244 (6.19)  
0.008 (0.20)  
0.224 (5.69)  
0.003 (0.08)  
0.021 (0.53)  
0.011 (0.28)  
0.050 (1.27)  
TYP  
0.050 (1.27)  
Lead Coplanarity : 0.004 (0.10) MAX  
© 2004 Fairchild Semiconductor Corporation  
Page 11 of 17  
8/10/04  
LVTTL/LVCMOS COMPATIBLE LOW INPUT  
CURRENT HIGH GAIN SPLIT DARLINGTON  
OPTOCOUPLERS  
SINGLE CHANNEL:  
DUAL CHANNEL:  
FOD070L  
FOD073L  
FOD270L  
ORDERING INFORMATION  
Option  
Order Entry Identifier  
Description  
S
FOD270LS  
FOD270LSD  
Surface Mount Lead Bend (DIP Package Only)  
Surface Mount; Tape and reel (DIP Package Only)  
(1000 units per reel)  
SD  
SV  
Pending approval  
Pending approval  
Surface Mount; VDE 0884 (DIP Package Only)  
Surface Mount; Tape and reel (DIP Package Only); VDE 0884  
(1000 units per reel)  
SDV  
T
TV  
R1  
R1V  
R2  
R2V  
V
FOD270LT  
0.4" lead spacing (DIP Package Only)  
Pending approval  
FOD070LR1  
0.4" lead spacing, VDE 0884 (DIP Package Only)  
Tape and reel (500 units per reel) (SOIC 8 Package only)  
VDE, Tape and reel (500 units per reel) (SOIC 8 Package only)  
Tape and reel (2500 units per reel) (SOIC 8 Package only)  
VDE 0884, Tape and reel (2500 units per reel) (SOIC 8 Package only)  
VDE 0884  
Pending approval  
FOD070LR2  
Pending approval  
Pending approval  
MARKING INFORMATION (FOD070L, FOD073L)  
2
70L  
X YY S  
1
6
V
5
3
4
Definitions  
1
2
Fairchild logo  
Device number  
VDE mark (Note: Only appears on parts ordered with VDE  
option – See order entry table)  
3
4
5
6
One digit year code, e.g., ‘3’  
Two digit work week ranging from ‘01’ to ‘53’  
Assembly package code  
© 2004 Fairchild Semiconductor Corporation  
Page 12 of 17  
8/10/04  
LVTTL/LVCMOS COMPATIBLE LOW INPUT  
CURRENT HIGH GAIN SPLIT DARLINGTON  
OPTOCOUPLERS  
SINGLE CHANNEL:  
DUAL CHANNEL:  
FOD070L  
FOD073L  
FOD270L  
MARKING INFORMATION (FOD270L)  
1
2
6
270L  
V XX YY B  
5
3
4
Definitions  
1
2
Fairchild logo  
Device number  
VDE mark (Note: Only appears on parts ordered with VDE  
option – See order entry table)  
3
4
5
6
Two digit year code, e.g., ‘03’  
Two digit work week ranging from ‘01’ to ‘53’  
Assembly package code  
© 2004 Fairchild Semiconductor Corporation  
Page 13 of 17  
8/10/04  
LVTTL/LVCMOS COMPATIBLE LOW INPUT  
CURRENT HIGH GAIN SPLIT DARLINGTON  
OPTOCOUPLERS  
SINGLE CHANNEL:  
DUAL CHANNEL:  
FOD070L  
FOD073L  
FOD270L  
Carrier Tape Specifications (FOD070L and FOD073L)  
8.0 0.10  
3.50 0.20  
2.0 0.05  
Ø1.5 MIN  
0.30 MAX  
4.0 0.10  
1.75 0.10  
5.5 0.05  
12.0 0.3  
8.3 0.10  
5.20 0.20  
Ø1.5 0.1/-0  
6.40 0.20  
0.1 MAX  
User Direction of Feed  
© 2004 Fairchild Semiconductor Corporation  
Page 14 of 17  
8/10/04  
LVTTL/LVCMOS COMPATIBLE LOW INPUT  
CURRENT HIGH GAIN SPLIT DARLINGTON  
OPTOCOUPLERS  
SINGLE CHANNEL:  
DUAL CHANNEL:  
FOD070L  
FOD073L  
FOD270L  
Carrier Tape Specifications (FOD270L)  
D0  
P0  
P2  
t
K0  
E
F
W
W1  
P
D1  
d
User Direction of Feed  
Description  
Symbol  
Dimension in mm  
Tape Width  
W
t
16.0 0.3  
0.30 0.05  
4.0 0.1  
1.55 0.05  
1.75 0.10  
7.5 0.1  
4.0 0.1  
12.0 0.1  
10.30 0.20  
10.30 0.20  
4.90 0.20  
1.6 0.1  
0.1 max  
Tape Thickness  
Sprocket Hole Pitch  
Sprocket Hole Diameter  
Sprocket Hole Location  
P
0
D
0
E
F
Pocket Location  
Pocket Pitch  
P
2
P
A
0
0
0
Pocket Dimensions  
B
K
Cover Tape Width  
W
1
Cover Tape Thickness  
d
Max. Component Rotation or Tilt  
Min. Bending Radius  
10°  
R
30  
© 2004 Fairchild Semiconductor Corporation  
Page 15 of 17  
8/10/04  
LVTTL/LVCMOS COMPATIBLE LOW INPUT  
CURRENT HIGH GAIN SPLIT DARLINGTON  
OPTOCOUPLERS  
SINGLE CHANNEL:  
DUAL CHANNEL:  
FOD070L  
FOD073L  
FOD270L  
Reflow Profile (FOD070L and FOD073L)  
300  
230°C, 10–30 s  
250  
200  
150  
100  
50  
245° C peak  
Time above 183°C, 120–180 sec  
Ramp up = 2–10°C/sec  
0
0
0.5  
1
1.5  
2
2.5  
3
3.5  
4
4.5  
Time (Minute)  
• Peak reflow temperature: 245°C (package surface temperature)  
• Time of temperature higher than 183°C for 120–180 seconds  
• One time soldering reflow is recommended  
Reflow Profile (FOD270L)  
• Peak reflow temperature  
• Time of temperature higher than 245°C  
• Number of reflows  
260°C (package surface temperature)  
40 seconds or less  
Three  
10s  
300  
250  
200  
150  
100  
50  
260°  
245°  
40s  
50  
100  
150  
200  
250  
Time (s)  
© 2004 Fairchild Semiconductor Corporation  
Page 16 of 17  
8/10/04  
LVTTL/LVCMOS COMPATIBLE LOW INPUT  
CURRENT HIGH GAIN SPLIT DARLINGTON  
OPTOCOUPLERS  
SINGLE CHANNEL:  
DUAL CHANNEL:  
FOD070L  
FOD073L  
FOD270L  
DISCLAIMER  
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO  
ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME  
ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN;  
NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.  
LIFE SUPPORT POLICY  
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES  
OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR  
CORPORATION. As used herein:  
1. Life support devices or systems are devices or systems  
which, (a) are intended for surgical implant into the body, or  
(b) support or sustain life, and (c) whose failure to perform  
when properly used in accordance with instructions for use  
provided in the labeling, can be reasonably expected to  
result in a significant injury of the user.  
2. A critical component in any component of a life support  
device or system whose failure to perform can be  
reasonably expected to cause the failure of the life support  
device or system, or to affect its safety or effectiveness.  
© 2004 Fairchild Semiconductor Corporation  
Page 17 of 17  
8/10/04  

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