FPBL20SM60_技术文档

FPBL20SM60

Smart Power Module (SPM)

General Description

Features

FPBL20SM60 is an advanced smart power module (SPM)

that Fairchild has newly developed and designed to provide

very compact and low cost, yet high performance ac motor

drives mainly targeting medium speed low-power inverter-

driven application like air conditioners. It combines

optimized circuit protection and drive matched to low-loss

IGBTs. Highly effective short-circuit current detection/

protection is realized through the use of advanced current

sensing IGBT chips that allow continuous monitoring of the

IGBTs current. System reliability is further enhanced by the

integrated under-voltage lock-out protection. The high

speed built-in HVIC provides opto-coupler-less IGBT gate

driving capability that further reduce the overall size of the

inverter system design. In addition the incorporated HVIC

facilitates the use of single-supply drive topology enabling

the FPBL20SM60 to be driven by only one drive supply

voltage without negative bias.

•

UL Certified No. E209204

600V-20A 3-phase IGBT inverter bridge including control

ICs for gate driving and protection

Single-grounded power supply due to built-in HVIC

Typical switching frequency of 7kHz

Inverter power rating of 1.4kW / 100~253 Vac

Isolation rating of 2500Vrms/min.

Very low leakage current due to using ceramic substrate

Adjustable current protection level by varying series

resistor value with sense-IGBTs

•

Applications

•

AC 100V ~ 253V three-phase inverter drive for small

power (1.4kW) ac motor drives

Home appliances applications requiring medium

switching frequency operation like air conditioners drive

system

•

Application ratings:

- Power : 1.4kW / 100~253 Vac

- Switching frequency : Typical 7kHz (PWM Control)

- 100% load current : 10A (Irms)

External View and Marking Information

Top View

Bottom View

57 mm

55 mm

Marking

Device Name

Version, Lot Code

Fig. 1.

Rev. B, February 2002

Integrated Power Functions

•

600V-20A IGBT inverter for three-phase DC/AC power conversion (Please refer to Fig. 3)

Integrated Drive, Protection and System Control Functions

•

For inverter high-side IGBTs: Gate drive circuit, High voltage isolated high-speed level shifting

Control circuit under-voltage (UV) protection

Note) Available bootstrap circuit example is given in Figs. 10, 15 and 16.

For inverter low-side IGBTs: Gate drive circuit, Short circuit protection (SC)

Control supply circuit under-voltage (UV) protection

•

Fault signaling: Corresponding to a SC fault (Low-side IGBTs) or a UV fault (Low-side supply)

Input interface: 5V CMOS/LSTTL compatible, Schmitt trigger input

Pin Configuration

Top View

V

S(U)

B(U)

V

CC(UH)

IN

(UH)

V

CC(L)

COM

(L)

IN

(UL)

V

(VL)

(WL)

S(V)

IN

V

IN

B(V)

V

FOD

C

FO

CC(VH)

C

(VH)

SC

COM

(H)

R

SC

V

S(W)

NC

B(W)

NC

V

CC(WH)

IN

(WH)

W

V

U

N

P

Fig. 2.

Pin Descriptions

Pin Number

Pin Name

Pin Description

1

2

V

Low-side Common Bias Voltage for IC and IGBTs Driving

Low-side Common Supply Ground

CC(L)

COM

(L)

(UL)

3

IN

Signal Input Terminal for Low-side U Phase

Signal Input Terminal for Low-side V Phase

Signal Input Terminal for Low-side W Phase

Fault Output Terminal

4

(VL)

5

IN

(WL)

6

V

FO

7

C

Capacitor for Fault Output Duration Time Selection

FOD

8

C

Capacitor (Low-pass Filter) for Short-current Detection Input

Resistor for Short-circuit Current Detection

No Connection

SC

9

R

10

11

12

13

14

15

16

NC

W

No Connection

Output Terminal for W Phase

Output Terminal for V Phase

Output Terminal for U Phase

Negative DC–Link Input

V

U

N

Rev. B, February 2002

Pin Descriptions (Continued)

Pin Number

Pin Name

Pin Description

17

18

19

20

21

22

23

24

25

26

27

28

29

30

P

Positive DC–Link Input

IN

Signal Input Terminal for High-side W Phase

High-side Bias Voltage for W Phase IC

(WH)

V

CC(WH)

V

High-side Bias Voltage for W Phase IGBT Driving

High-side Bias Voltage Ground for W Phase IGBT Driving

High-side Common Supply Ground

B(W)

S(W)

COM

(H)

(VH)

IN

Signal Input Terminal for High-side V Phase

High-side Bias Voltage for V Phase IC

V

CC(VH)

V

High-side Bias Voltage for V Phase IGBT Driving

High-side Bias Voltage Ground for V Phase IGBT Driving

Signal Input Terminal for High-side U Phase

High-side Bias Voltage for U Phase IC

B(V)

S(V)

IN

(UH)

V

CC(UH)

V

High-side Bias Voltage for U Phase IGBT Driving

High-side Bias Voltage Ground for U Phase IGBT Driving

B(U)

S(U)

Internal Equivalent Circuit and Input/Output Pins

(29) V_B(U)

VB Vcc

(28) V_CC(UH)

(27) IN_(UH)

HO

IN

V_CC

(1) V_CC(L)

(2) COM

VS COM

COM

(L)

(30) V

S(U)

Uout

Vout

Wout

(3) IN_(UL)

(4) IN_(VL)

(5) IN_(WL)

IN_(UL)

IN_(VL)

(25) V_B(V)

(24) V_CC(VH)

(23) IN_(VH)

(22) COM

VB Vcc

HO

IN

IN_(WL)

VS COM

(H)

(6) V

V

FO

(26) V

(FO)

S(V)

(20) V_B(W)

(7) C_FOD

(8) C_SC

C_(FOD)

C_(SC)

(19) V_CC(WH)

(18) IN_(WH)

VB Vcc

HO IN

VS COM

(9) R_SC

(10) NC

(11) NC

(12) NC

(21) V

S(W)

P

(17)

W

(13)

V

U

N

(14)

(15)

(16)

Note

1. Inverter low-side ( (1) - (12) pins) is composed of three sense-IGBTs including freewheeling diodes for each IGBT and one control IC which has gate driving,

current sensing and protection functions.

2. Inverter power side ( (13) - (17) pins) is composed of two inverter dc-link input terminals and three inverter output terminals.

3. Inverter high-side ( (18) - (30) pins) is composed of three normal-IGBTs including freewheeling diodes and three drive ICs for each IGBT.

Fig. 3.

Rev. B, February 2002

Absolute Maximum Ratings

Inverter Part (T = 25°C, Unless Otherwise Specified)

C

Item

Symbol

Condition

Applied to DC - Link

Applied between P- N

Rating

450

Unit

V

Supply Voltage

V

DC

PN(Surge)

Supply Voltage (Surge)

V

500

V

Collector-Emitter Voltage

V

600

V

CES

Each IGBT Collector Current

Each IGBT Collector Current (Peak)

Collector Dissipation

± I

T

= 25°C (Note Fig. 4)

= 25°C per One Chip

20

A

C

CP

C

± I

P

40

A

50

W

°C

Operating Junction Temperature

T

(Note 1)

-55 ~ 150

J

Note

1. It would be recommended that the average junction temperature should be limited to T ≤ 125°C (@T ≤ 100°C) in order to guarantee safe operation.

J

C

Control Part (T = 25°C, Unless Otherwise Specified)

C

Item

Symbol

Condition

Rating

18

Unit

V

Control Supply Voltage

High-side Control Bias Voltage

V

Applied between V

- COM , V

- COM

CC(L) (L)

CC

BS

CC(H)

(H)

- V

, V

- V

, V -

B(W)

20

V

B(U)

S(U)

B(V)

S(V)

V

S(W)

Input Signal Voltage

V

Applied between IN

, IN

- COM

(H)

-0.3 ~ 6.0

V

IN

(UH)

(VH)

(WH)

IN

, IN

- COM

(WL) (L)

(UL)

(VL)

Fault Output Supply Voltage

Fault Output Current

V

Applied between V - COM

-0.3~V +0.5

V

mA

V

FO

(L)

CC

I

Sink Current at V Pin

5

FO

Current Sensing Input Voltage

V

Applied between C - COM

-0.3~V +0.5

SC

(L)

CC

Total System

Item

Symbol

Condition

Applied to DC - Link,

Rating

Unit

Self Protection Supply Voltage Limit

(Short Circuit Protection Capability)

V

400

V

DC(PROT)

V

= V = 13.5 ~ 16.5V

CC

BS

T = 125°C, Non-repetitive, less than 6µs

J

Module Case Operation Temperature

Storage Temperature

T

Note Fig. 4

-20 ~ 100

-55 ~ 150

2500

°C

C

T

STG

Isolation Voltage

V

60Hz, Sinusoidal, AC 1 minute, Connection

Pins to Heat-sink Plate

V

rms

ISO

Rev. B, February 2002

Case Temperature (T ) Detecting Point

C

V

S(U)

B(U)

V

CC(UH)

IN

(UH)

V

CC(L)

COM

(L)

IN

(UL)

IN

(WL)

V

(VL)

S(V)

IN

V

B(V)

V

FO

V

CC(VH)

C

FOD

IN

COM

(VH)

C

SC

(H)

Ceramic

Substate

R

SC

V

S(W)

NC

B(W)

NC

V

IN

CC(WH)

(WH)

W

V

U

N

P

Fig. 4. T_cMeasurement Point

Rev. B, February 2002

Absolute Maximum Ratings

Thermal Resistance

Item

Symbol

Condition

Min. Typ. Max. Unit

Junction to Case Thermal

Resistance

R

Each IGBT under Inverter Operating Condition

(Note 2)

-

2.49 °C/W

th(j-c)Q

R

Each FWDi under Inverter Operating Condition

(Note 2)

3.4 °C/W

th(j-c)F

Contact Thermal

Resistance

R

Ceramic Substrate (per 1 Module)

Thermal Grease Applied

0.06 °C/W

th(c-f)

Note

2. For the measurement point of case temperature (T ), please refer to Fig. 4.

c

Electrical Characteristics

Inverter Part (T = 25°C, Unless Otherwise Specified)

j

Item

Symbol

Condition

Min.

Typ.

Max. Unit

Collector - Emitter

Saturation Voltage

V

= V = 15V

= 0V

I

= 20A, T = 25°C

-

2.5

2.6

2.5

2.3

-

V

CE(SAT)

CC

BS

C

j

IN

= 20A, T = 125°C

j

FWDi Forward Voltage

V

= 5V

= 20A, T = 25°C

-

V

FM

ON

j

= 20A, T = 125°C

-

V

j

Switching Times

t

= 300V, V = V = 15V

0.39

0.15

0.8

0.39

0.1

-

µs

µA

PN

CC

BS

I

= 20A, T = 25°C

t

C

j

-

C(ON)

V

= 5V ↔ 0V, Inductive Load

IN

t

-

OFF

(High-Low Side)

t

-

C(OFF)

t

(Note 3)

-

rr

Collector - Emitter

Leakage Current

I

V

= V

, T = 25°C

250

CES

CE

CES

j

Note

3.

t

and t

include the propagation delay time of the internal drive IC. t

and t

are the switching time of IGBT itself under the given gate driving condition

C(OFF)

ON

OFF

C(ON)

internally. For the detailed information, please see Fig. 5.

Rev. B, February 2002

100% I_C

t _rr

I_C

V

CE

V

CE

I_C

V_IN

t _ON

V_IN

t_OFF

t _C(ON)

90% I_C

10% I_C10% V

t_C(OFF)

V

IN(ON)

CE

V_IN(OFF)

10% V

10% I_C

CE

(a) Turn-on

(b) Turn-off

Fig 5. Switching Time Definition

I_C: 5A/div.

V_CE: 100V/div.

time : 100ns/div.

(a) Turn-on

time : 100ns/div.

(b) Turn-off

Fig. 6. Experimental Results of Switching Waveforms

Test Condition: Vdc=300V, Vcc=15V, L=500uH (Inductive Load), T_C=25°C

Rev. B, February 2002

Electrical Characteristics

Control Part (T = 25°C, Unless Otherwise Specified)

j

Item

Symbol

Condition

,V - COM

CC(H) CC(L)

Min. Typ. Max. Unit

Control Supply Voltage

High-Side Bias Voltage

V

Applied between V

13.5

15

16.5

V

CC

V

- V

, V

- V

,

BS

B(U)

S(U)

B(V)

S(V)

V

- V

S(W)

B(W)

Quiescent V Supply

Current

I

V

IN

= 15V

V

- COM

(L)

-

26

mA

uA

CC

QCCL

QCCH

CC

CC(L)

= 5V

(UL, VL, WL)

I

V

IN

= 15V

, V

CC(W)

-

130

420

CC

CC(U)

CC(V)

COM

(UH, VH, WH)

(H)

Quiescent V Supply

I

V

IN

= 15V

V

- V

, V

-V

,

BS

QBS

BS

B(U)

- V

B(W) S(W)

S(U)

B(V)

S(V)

Current

(UH, VH, WH)

Fault Output Voltage

V

= 0V, V Circuit: 4.7kΩ to 5V Pull-up

4.5

-

1.1

-

V

FOH

SC

FO

V

= 1V, V Circuit: 4.7kΩ to 5V Pull-up

-

FOL

FO

PWM Input Frequency

f

T

≤ 100°C, T ≤ 125°C

7

-

kHz

us

PWM

C

J

Allowable Input Signal

Blanking Time Considering

Leg Arm-Short

t

-20°C ≤ T ≤ 100°C

3

-

dead

C

Short Circuit Trip Level

V

T = 25°, V = 15V (Note 4)

0.45 0.51 0.56

0.37 0.45 0.56

V

SC(ref)

J

CC

Sensing Voltage

of IGBT Current

V

-20°C ≤ T ≤ 100°C, @ R = 82 Ω and

SEN

C

SC

I

= 20A (Note Fig. 7)

C

Supply Circuit Under-

Voltage Protection

UV

T ≤ 125°C

Detection Level

Reset Level

11.5

12

12.5

13

V

CCD

CCR

BSD

BSR

J

12.5

Detection Level

Reset Level

7.3

8.6

1.4

9.0 10.8

V

10.3

1.8

12

V

Fault-Out Pulse Width

t

V

= 15V, C(sc) = 1V

CC

2.0

ms

FOD

C

= 33nF (Note 5)

FOD

ON Threshold Voltage

OFF Threshold Voltage

ON Threshold Voltage

OFF Threshold Voltage

V

High-Side

Applied between IN

, IN ,

(VH)

-

0.8

-

V

IN(ON)

(UH)

IN

- COM

(H)

V

(WH)

3.0

-

IN(OFF)

V

Low-Side

Applied between IN

, IN ,

(VL)

0.8

-

IN(ON)

(UL)

IN

- COM

(L)

V

(WL)

3.0

IN(OFF)

Note

4. Short-circuit current protection is functioning only at the low-sides. It would be recommended that the value of the external sensing resistor (R ) should be

SC

selected around 56 Ω in order to make the SC trip-level of about 30A.

Please refer to Fig. 7 which shows the current sensing characteristics according to sensing resistor R

.

SC

-6

5. The fault-out pulse width t

depends on the capacitance value of C

according to the following approximate equation : C

= 18.3 x 10 x t

[F]

FOD

Rev. B, February 2002

120

100

80

60

40

20

10

20

30

40

50

60

70

80

90

Sensing Resistor R_SC[Ω]

Fig. 7. Relationship between Sensing Resistor and SC Trip Current

for Short-Circuit Protection

(I_SC= 82 × Rating Current(20A) / R_SC

)

Rev. B, February 2002

Mechanical Characteristics and Ratings

Limits

Typ.

10

Item

Condition

Recommended 10kg•cm

Units

Min.

Max.

12

Mounting Torque

Mounting Screw: M3

(Note 6 and 7)

8

0.78

0

Kg•cm

N•m

um

Recommended 0.98N•m

(Note Fig. 8)

0.98

-

1.17

+100

-

Ceramic Flatness

Weight

-

56

g

Fig. 8. Flatness Measurement Position of The Ceramic Substrate

Note

6. Do not make over torque or mounting screws. Much mounting torque may cause ceramic cracks and bolts and Al heat-fin destruction.

7. Avoid one side tightening stress. Fig.9 shows the recommended torque order for mounting screws. Uneven mounting can cause the SPM ceramic substrate to

be damaged.

4

2

1

3

Fig. 9. Mounting Screws Torque Order (1 → 2 → 3 → 4)

Rev. B, February 2002

Recommended Operating Conditions

Value

Item

Symbol

Condition

Unit

Min. Typ. Max.

Supply Voltage

V

Applied between P - N

-

300

15

400

V

PN

Control Supply Voltage

High-Side Bias Voltage

Applied between V

- COM

,

(H)

13.5

16.5

CC

CC(H)

B(U)

V

- COM

(L)

CC(L)

V

Applied between V

- V

, V

- V ,

S(V)

13.5

15

-

16.5

V

BS

S(U)

B(V)

V

B(W)

S(W)

Blanking Time for Preventing

Arm-short

t

For Each Input Signal

3

-

us

dead

PWM Input Signal

f

T

≤ 100°C, T ≤ 125°C

7

kHz

V

PWM

C

J

Input ON Threshold Voltage

Input OFF Threshold Voltage

V

Applied between U ,V , W - COM

0 ~ 0.65

4 ~ 5.5

IN(ON)

IN IN

IN

V

Applied between U ,V , W - COM

V

IN(OFF)

IN IN

IN

ICs Internal Structure and Input/Output Conditions

C_BSC

C_BS

R_BS

D_BS

15V Line

P

VB

(UH,VH,WH)

VCC

(UH,VH,WH)

UV

DETECT

R

S

LEVEL

SHIFT

5V Line

PULSE

FILTER

Q

C_BP15

R_P

IN

PULSE

GENERATOR

(UH,VH,WH)

VS

(UH,VH,WH)

COM

C_PH

HVIC

LVIC

U,V,W

VCC

(L)

UV

DETECT

TIME

DELAY

UV

LATCH_UP

5V Line

BANDGAP

UV

REFERENCE

PROTECTION

R_P

R_PF

OUTPUT

(UL,VL,WL)

BUFFER

IN

PULSE

(UL,VL,WL)

GENERATOR

(HYSTERISIS)

SC

SOFT_OFF

CONTROL

PROTECTION

V

FO

FAULT OUTPUT

DURATION

SC

LATCH_UP

TIME

DELAY

SC

DETECTION

C_PF

C_PL

C

FOD

C_FOD

N

R_F

C_SC

R_SC

Note

1. One LVIC drives three Sense-IGBTs and can do short-circuit current protection also. Three sense emitters are commonly connected to R terminal to detect

SC

short-circuit current. Low-side part of the inverter consists of three sense-IGBTs

2. One HVIC drives one normal-IGBT. High-side part of the inverter consists of three normal-IGBTs

3. Each IC has under voltage detection and protection function.

4. The logic input is compatible with standard CMOS or LSTTL outputs.

5. R C coupling at each input/output is recommended in order to prevent the gating input/output signals oscillation and it should be as close as possible to each

P

SPM gating input pin.

6. It would be recommended that the bootstrap diode, D , has soft and fast recovery characteristics.

BS

Fig. 10.

Rev. B, February 2002

Time Charts of SPMs Protective Function

Input Signal

Internal IGBT

Gate- Emitter Voltage

P3

P2

UV

reset

P5

Control Supply Voltage

UV

detect

P6

P1

Output Current

P4

Fault Output Signal

P1 : Normal operation - IGBT ON and conducting current

P2 : Under voltage detection

P3 : IGBT gate interrupt

P4 : Fault signal generation

P5 : Under voltage reset

P6 : Normal operation - IGBT ON and conducting current

Fig. 11. Under-Voltage Protection (Low-side)

Input Signal

Internal IGBT

Gate- Emitter Voltage

P3

P2

UV

reset

P5

Control Supply Voltage

UV

detect

V

BS

P6

P1

Output Current

Fault Output Signal

P4

P1 : Normal operation - IGBT ON and conducting current

P2 : Under voltage detection

P3 : IGBT gate interrupt

P4 : No fault signal

P5 : Under voltage reset

P6 : Normal operation - IGBT ON and conducting current

Fig. 12. Under-Voltage Protection (High-side)

Rev. B, February 2002

P5

Input Signal

P6

Internal IGBT

Gate- Emitter Voltage

SC Detection

P1

P4

P7

Output Current

P2

SC Reference

Voltage (0.5V)

Sensing Voltage

RC Filter Delay

P8

Fault Output Signal

P3

P1 : Normal operation - IGBT ON and conducting currents

P2 : Short-circuit current detection

P3 : IGBT gate interrupt / Fault signal generation

P4 : IGBT is slowly turned off

P5 : IGBT OFF signal

P6 : IGBT ON signal - but IGBT cannot be turned on during the fault-output activation

P7 : IGBT OFF state

P8 : Fault-output reset and normal operation start

Fig. 13. Short-circuit Current Protection (Low-side Operation only)

5V-Line

FPBL20SM60

4.7kΩ

100 Ω

,

IN_(UH)IN_(VH)

IN_(WH)

IN_(WL)

,

IN_(UL)IN_(VL)

CPU

V_FO

1nF

0.47nF

1.2nF

COM

Note

It would be recommended that by-pass capacitors for the gating input signals, IN

should be placed on the SPM pins and on the both sides of CPU and SPM

(XX)

for the fault output signal, V , as close as possible.

FO

Fig. 14. Recommended CPU I/O Interface Circuit

Rev. B, February 2002

One-leg Diagram of FPBL20SM60

15V-Line

P

2 0Ω

Vcc VB

IN HO

0.1uF

33uF

COM VS

Inverter

Output

Vcc

0.1uF

1000uF

IN OUT

COM

N

Fig. 15. Recommended Bootstrap Operation Circuit and Parameters

Rev. B, February 2002

Gating UL

Gating VL

Gating WL

Fault

Gating UH

Gating VH

Gating WH

CPU

C_BPF

R_SR_SR_S

R_SR_SR_SR_S

D_BS

R_BS

V_B(U)(29)

5V line

R_PR_P

V

_CC(UH)(28)

5V line

VB Vcc

HO IN

VS COM

IN_(UH)(27)

(1) V_CC(L)

(2) COM

R_P

V

CC

(L)

COM

(L)

C_BSCC_BS

D_BS

R_PR_PR_PR_P

V

_S(U)(30)

_B(V)(25)

_CC(VH)(24)

(3) IN_(UL)

(4) IN_(VL)

(5) IN_(WL)

Uout

IN_(UL)

IN_(VL)

V

VB Vcc

HO IN

VS COM

C_PHC_PH

C_PH

IN_(VH)(23)

Vout

IN_(WL)

COM_(H)(22)

(6)

V

FO

C_BSCC_BS

D_BS

V_S(V)(26)

V

(FO)

C_PL

C_PF

C_PLC_PL

C_FOD

C_SC

V_B(W)(20)

(7) C_FOD

(8) C_SC

Wout

C_(FOD)

C_(SC)

V

_CC(WH)(19)

VB Vcc

HO IN

VS COM

IN_(WH)(18)

(9) R_SC

15V line

R_F

C_BSCC_BS

V_S(W)(21)

(10) NC

R_SC

(11) NC

(12) NC

C_SPC15

C_SP15

(13)

(14)

(15)

(16)

N

(17) P

W

V

U

C_DCS

M

-

+

Vdc

Note

1. R C /R C coupling at each SPM input is recommended in order to prevent input signals’ oscillation and it should be as close as possible to each SPM input

P

PL

P PH

pin.

2. By virtue of integrating an application specific type HVIC inside the SPM, direct coupling to CPU terminals without any opto-coupler or transformer isolation is

possible.

3.

V

output is open collector type. This signal line should be pulled up to the positive side of the 5V power supply with approximately 4.7kΩ resistance. Please

FO

refer to Fig. 14.

C of around 7 times larger than bootstrap capacitor C is recommended.

SP15

4.

5.

BS

V

output pulse width should be determined by connecting an external capacitor(C

) between C

(pin7) and COM (pin2). (Example : if C

= 5.6 nF,

FO

FOD

(L)

FOD

then t = 300 µs (typ.)) Please refer to the note 5 for calculation method.

FO

6. Each input signal line should be pulled up to the 5V power supply with approximately 4.7kΩ resistance (other RC coupling circuits at each input may be needed

depending on the PWM control scheme used and on the wiring impedance of the system’s printed circuit board). Approximately a 0.22~2nF by-pass capacitor

should be used across each power supply connection terminals.

7. To prevent errors of the protection function, the wiring around R , R and C should be as short as possible.

SC

F

SC

8. In the short-circuit protection circuit, please select the R C time constant in the range 3~4 µs. R should be at least 30 times larger than R . (Recommended

F

SC

F

SC

Example: R = 56 Ω, R = 3.9kΩ and C = 1nF)

SC

F

SC

9. Each capacitor should be mounted as close to the pins of the SPM as possible.

10.To prevent surge destruction, the wiring between the smoothing capacitor and the P&N pins should be as short as possible. The use of a high frequency non-

inductive capacitor of around 0.1~0.22 uF between the P&N pins is recommended.

11. Relays are used at almost every systems of electrical equipments of home appliances. In these cases, there should be sufficient distance between the CPU and

the relays. It is recommended that the distance be 5cm at least

Fig. 16. Application Circuit

Rev. B, February 2002

Detailed Package Outline Drawings

Rev. B, February 2002

TRADEMARKS

The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not

intended to be an exhaustive list of all such trademarks.

ACEx™

Bottomless™

CoolFET™

FAST^®

FASTr™

FRFET™

OPTOLOGIC™

OPTOPLANAR™

PACMAN™

SMART START™

STAR*POWER™

Stealth™

VCX™

CROSSVOLT™

DenseTrench™

DOME™

EcoSPARK™

E²CMOS™

EnSigna™

GlobalOptoisolator™

GTO™

HiSeC™

ISOPLANAR™

LittleFET™

MicroFET™

MicroPak™

MICROWIRE™

POP™

SuperSOT™-3

SuperSOT™-6

SuperSOT™-8

SyncFET™

TruTranslation™

TinyLogic™

Power247™

PowerTrench^®

QFET™

QS™

QT Optoelectronics™

Quiet Series™

SLIENT SWITCHER^®

FACT™

FACT Quiet Series™

UHC™

UltraFET^®

STAR*POWER is used under license

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY

PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY

LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN;

NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT

DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR

CORPORATION.

As used herein:

1. Life support devices or systems are devices or systems

which, (a) are intended for surgical implant into the body,

or (b) support or sustain life, or (c) whose failure to perform

when properly used in accordance with instructions for use

provided in the labeling, can be reasonably expected to

result in significant injury to the user.

2. A critical component is any component of a life support

device or system whose failure to perform can be

reasonably expected to cause the failure of the life support

device or system, or to affect its safety or effectiveness.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification

Product Status

Definition

Advance Information

Formative or In

Design

This datasheet contains the design specifications for

product development. Specifications may change in

any manner without notice.

Preliminary

First Production

This datasheet contains preliminary data, and

supplementary data will be published at a later date.

Fairchild Semiconductor reserves the right to make

changes at any time without notice in order to improve

design.

No Identification Needed

Obsolete

Full Production

This datasheet contains final specifications. Fairchild

Semiconductor reserves the right to make changes at

any time without notice in order to improve design.

Not In Production

This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.

The datasheet is printed for reference information only.

Rev. H4


型号：	FPBL20SM60
厂家：	FAIRCHILD SEMICONDUCTOR
描述：	Smart Power Module (SPM) 智能功率模块（ SPM ）运动控制电子器件信号电路电动机控制
文件：	总17页 (文件大小：279K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

FPBL20SM60 [FAIRCHILD]

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