FQB5N60 [FAIRCHILD]
600V N-Channel MOSFET; 600V N沟道MOSFET
| 型号： | FQB5N60 |
| 厂家： | 
FAIRCHILD SEMICONDUCTOR |
| 描述： | 600V N-Channel MOSFET |
| 文件： | 总9页 (文件大小：555K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
April 2000
TM
QFET
FQB5N60 / FQI5N60
600V N-Channel MOSFET
General Description
Features
These N-Channel enhancement mode power field effect
transistors are produced using Fairchild’s proprietary,
planar stripe, DMOS technology.
This advanced technology has been especially tailored to
minimize on-state resistance, provide superior switching
performance, and withstand high energy pulse in the
avalanche and commutation mode. These devices are well
suited for high efficiency switch mode power supply.
•
•
•
•
•
•
5.0A, 600V, R
= 2.0Ω @V = 10 V
DS(on) GS
Low gate charge ( typical 16 nC)
Low Crss ( typical 9.0 pF)
Fast switching
100% avalanche tested
Improved dv/dt capability
D
!
D
"
! "
"
"
G
!
G
S
D2-PAK
FQB Series
I2-PAK
FQI Series
G
D
S
!
S
Absolute Maximum Ratings
ꢀꢀ
T = 25°C unless otherwise noted
C
Symbol
Parameter
FQB5N60 / FQI5N60
Units
V
V
I
Drain-Source Voltage
600
5.0
DSS
- Continuous (T = 25°C)
Drain Current
A
D
C
- Continuous (T = 100°C)
3.15
20
A
C
I
(Note 1)
Drain Current
- Pulsed
A
DM
V
E
I
Gate-Source Voltage
±ꢀ30
300
V
GSS
(Note 2)
(Note 1)
(Note 1)
(Note 3)
Single Pulsed Avalanche Energy
Avalanche Current
mJ
A
AS
5.0
AR
E
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
12
mJ
V/ns
W
AR
dv/dt
4.5
Power Dissipation (T = 25°C) *
3.13
120
P
A
D
Power Dissipation (T = 25°C)
W
C
- Derate above 25°C
Operating and Storage Temperature Range
0.96
-55 to +150
W/°C
°C
T , T
J
STG
Maximum lead temperature for soldering purposes,
T
300
°C
L
1/8ꢀ from case for 5 seconds
Thermal Characteristics
Symbol
Parameter
Typ
--
Max
Units
°CꢁW
°CꢁW
°CꢁW
R
R
R
Thermal Resistance, Junction-to-Case
Thermal Resistance, Junction-to-Ambient *
Thermal Resistance, Junction-to-Ambient
1.04
40
θ
θ
θ
JC
JA
JA
--
--
62.5
* When mounted on the minimum pad size recommended (PCB Mount)
©2000 Fairchild Semiconductor International
Rev. A, April 2000
Electrical Characteristics
ꢀꢀꢀꢀꢀ
T
= 25°C unless otherwise noted
C
Symbol
Parameter
Test Conditions
Min
Typ
Max
Units
Off Characteristics
BV
V
= 0 V, I = 250 µA
GS D
Drain-Source Breakdown Voltage
600
--
--
--
--
V
DSS
∆BV
Breakdown Voltage Temperature
Coefficient
DSS
J
I
= 250 µA, Referenced to 25°C
0.6
V/°C
D
/
I
∆T
V
V
V
V
= 600 V, V = 0 V
--
--
--
--
--
--
--
--
10
100
100
-100
µA
µA
nA
nA
DSS
DS
GS
Zero Gate Voltage Drain Current
= 480 V, T = 125°C
DS
GS
GS
C
I
I
= 30 V, V = 0 V
Gate-Body Leakage Current, Forward
Gate-Body Leakage Current, Reverse
GSSF
DS
= -30 V, V = 0 V
GSSR
DS
On Characteristics
V
V
V
V
= V , I = 250 µA
Gate Threshold Voltage
3.0
--
--
5.0
2.0
--
V
Ω
S
GS(th)
DS
GS
DS
GS
D
R
Static Drain-Source
On-Resistance
DS(on)
= 10 V, I = 2.5 A
1.57
4.0
D
g
= 50 V, I = 2.5 A
(Note 4)
Forward Transconductance
--
FS
D
Dynamic Characteristics
C
C
C
Input Capacitance
--
--
--
560
80
9
730
100
12
pF
pF
pF
iss
V
= 25 V, V = 0 V,
GS
DS
Output Capacitance
oss
rss
f = 1.0 MHz
Reverse Transfer Capacitance
Switching Characteristics
t
t
t
t
Turn-On Delay Time
Turn-On Rise Time
Turn-Off Delay Time
Turn-Off Fall Time
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
--
--
--
--
--
--
--
13
45
35
40
16
3.5
7.8
35
100
80
90
20
--
ns
ns
d(on)
V
= 300 V, I = 5.0 A,
DD
D
r
R
= 25 Ω
G
ns
d(off)
f
(Note 4, 5)
(Note 4, 5)
ns
Q
Q
Q
nC
nC
nC
g
V
V
= 480 V, I = 5.0 A,
DS
D
= 10 V
gs
gd
GS
--
Drain-Source Diode Characteristics and Maximum Ratings
I
Maximum Continuous Drain-Source Diode Forward Current
--
--
--
--
--
--
--
5.0
20
1.4
--
A
A
S
I
Maximum Pulsed Drain-Source Diode Forward Current
SM
V
t
V
V
= 0 V, I = 5.0 A
Drain-Source Diode Forward Voltage
Reverse Recovery Time
--
V
SD
GS
S
= 0 V, I = 5.0 A,
270
1.9
ns
µC
rr
GS
S
(Note 4)
dI / dt = 100 A/µs
Q
Reverse Recovery Charge
--
F
rr
Notes:
1. Repetitive Rating : Pulse width limited by maximum junction temperature
2. L = 22mH, I = 5.0A, V = 50V, R = 25 Ω, Starting T = 25°C
AS
DD
G
J
3. I ꢀ 5.0A, di/dt ꢀ 200A/µs, V ꢀ BV
Starting T = 25°C
4. Pulse Test : Pulse width ꢀ 300µs, Duty cycle ꢀ 2%
SD
DD
DSS, J
5. Essentially independent of operating temperature
©2000 Fairchild Semiconductor International
Rev. A, April 2000
Typical Characteristics
V
Top :
15GVS
10 V
8.0 V
7.0 V
6.5 V
6.0 V
1
10
101
Bottom : 5.5 V
ꢀ
150
0
10
100
ꢀ
25
ꢀ
-55
ꢀ
Notes :
ꢀ
Notes :
ꢂ
-1
10
1. VDS = 50V
2. 250 s Pulse Test
1. 250 s Pulse Test
2. TC = 25
ꢁ
ꢁ
-1
10
-1
10
0
10
1
10
2
4
6
8
10
VGS , Gate-Source Voltage [V]
VDS , Drain-Source Voltage [V]
Figure 1. On-Region Characteristics
Figure 2. Transfer Characteristics
5
4
3
2
1
0
1
10
VGS = 10V
VGS = 20V
0
10
ꢀ
25
ꢀ
150
ꢀ
Notes :
1. VGS = 0V
2. 250 s Pulse Test
ꢁ
ꢀ
ꢁ
Note : T = 25
J
-1
10
0
2
4
6
8
10
12
14
0.2
0.4
0.6
0.8
1.0
1.2
1.4
ID, Drain Current [A]
VSD , Source-Drain Voltage [V]
Figure 3. On-Resistance Variation vs.
Drain Current and Gate Voltage
Figure 4. Body Diode Forward Voltage
Variation vs. Source Current
and Temperature
1200
1000
800
600
400
200
0
12
C
iss = Cgs + Cgd (Cds = shorted)
Coss = Cds + C
gd
Crss = C
VDS = 120V
VDS = 300V
VDS = 480V
gd
10
8
C
iss
C
oss
6
4
ꢀ
Notes :
1. VGS = 0 V
2. f = 1 MHz
C
rss
2
ꢀ
Note : ID = 5.0 A
0
0
3
6
9
12
15
18
-1
0
10
1
10
10
QG, Total Gate Charge [nC]
VDS, Drain-Source Voltage [V]
Figure 5. Capacitance Characteristics
Figure 6. Gate Charge Characteristics
©2000 Fairchild Semiconductor International
Rev. A, April 2000
Typical Characteristics
(Continued)
3.0
2.5
2.0
1.5
1.0
0.5
0.0
1.2
1.1
1.0
0.9
0.8
ꢀ
Notes:
1. VGS = 0 V
2. ID= 250
ꢀ
Notes :
ꢁ
A
1. V = 10 V
2. IDG=S 2.5 A
-100
-50
0
50
100
150
200
-100
-50
0
50
100
150
200
T, Junction Temperature [oC]
T, Junction Temperature [oC]
J
J
Figure 7. Breakdown Voltage Variation
vs. Temperature
Figure 8. On-Resistance Variation
vs. Temperature
5
4
3
2
1
0
Operation in This Area
is Limited by R DS(on)
101
100 µs
1 ms
10 ms
DC
100
ꢀ
Notes :
1. TC = 25 o
C
2. TJ = 150 o
C
3. Single Pulse
-1
10
100
101
102
103
25
50
75
100
125
150
ꢀ
TC, Case Temperature [
]
VDS, Drain-Source Voltage [V]
Figure 9. Maximum Safe Operating Area
Figure 10. Maximum Drain Current
vs. Case Temperature
1 0 0
D = 0 .5
ꢀ
N o te s
1 . J C(t)
2 . D u ty F a c to r, D = t1 /t2
:
0 .2
ꢁ
/W M a x.
Z
=
1 .0 4
ꢀ
0 .1
3 . T J M
-
T C
=
P D
*
Z
J C(t)
ꢀ
1 0 -1
M
0 .0 5
PDM
0 .0 2
0 .0 1
t1
s in g le p u ls e
t2
1 0 -2
1 0 -5
1 0 -4
1 0 -3
1 0 -2
1 0 -1
1 0 0
1 0 1
t1 , S q u a re W a v e P u ls e D u ra tio n [s e c ]
Figure 11. Transient Thermal Response Curve
©2000 Fairchild Semiconductor International
Rev. A, April 2000
Gate Charge Test Circuit & Waveform
VGS
Same Type
50Kꢀ
as DUT
Qg
12V
200nF
10V
300nF
VDS
VGS
Qgs
Qgd
DUT
3mA
Charge
Resistive Switching Test Circuit & Waveforms
RL
VDS
90%
VDS
VDD
VGS
RG
10%
VGS
DUT
10V
td(on)
tr
td(off)
tf
t on
t off
Unclamped Inductive Switching Test Circuit & Waveforms
BVDSS
--------------------
BVDSS - VDD
L
1
2
2
----
EAS
=
L IAS
VDS
I D
BVDSS
IAS
RG
VDD
ID (t)
VDD
VDS (t)
DUT
10V
t p
t p
Time
©2000 Fairchild Semiconductor International
Rev. A, April 2000
Peak Diode Recovery dv/dt Test Circuit & Waveforms
+
DUT
VDS
_
I SD
L
Driver
RG
Same Type
as DUT
VDD
VGS
• dv/dt controlled by RG
• ISD controlled by pulse period
Gate Pulse Width
--------------------------
VGS
D =
Gate Pulse Period
10V
( Driver )
IFM , Body Diode Forward Current
I SD
di/dt
( DUT )
IRM
Body Diode Reverse Current
Body Diode Recovery dv/dt
VSD
VDS
( DUT )
VDD
Body Diode
Forward Voltage Drop
©2000 Fairchild Semiconductor International
Rev. A, April 2000
Package Dimensions
D2PAK
4.50 ±0.20
9.90 ±0.20
+0.10
–0.05
1.30
0.10 ±0.15
2.40 ±0.20
0.80 ±0.10
1.27 ±0.10
+0.10
0.50
–0.05
2.54 TYP
2.54 TYP
10.00 ±0.20
(8.00)
(4.40)
10.00 ±0.20
(2XR0.45)
0.80 ±0.10
©2000 Fairchild Semiconductor International
Rev. A, April 2000
Package Dimensions
(Continued)
I2PAK
4.50 ±0.20
9.90 ±0.20
+0.10
–0.05
1.30
1.27 ±0.10
1.47 ±0.10
0.80 ±0.10
+0.10
–0.05
0.50
2.40 ±0.20
2.54 TYP
2.54 TYP
10.00 ±0.20
©2000 Fairchild Semiconductor International
Rev. A, April 2000
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As used herein:
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systems which, (a) are intended for surgical implant into
the body, or (b) support or sustain life, or (c) whose
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
reasonably expected to result in significant injury to the
user.
2. A critical component is any component of a life
support device or system whose failure to perform can
be reasonably expected to cause the failure of the life
support device or system, or to affect its safety or
effectiveness.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative or
In Design
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
Preliminary
First Production
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
No Identification Needed
Obsolete
Full Production
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
Not In Production
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
Rev. E
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