FQP10N20L [FAIRCHILD]

200V LOGIC N-Channel MOSFET; LOGIC 200V N沟道MOSFET
FQP10N20L
型号: FQP10N20L
厂家: FAIRCHILD SEMICONDUCTOR    FAIRCHILD SEMICONDUCTOR
描述:

200V LOGIC N-Channel MOSFET
LOGIC 200V N沟道MOSFET

文件: 总8页 (文件大小:566K)
中文:  中文翻译
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December 2000  
TM  
QFET  
FQP10N20L  
200V LOGIC N-Channel MOSFET  
General Description  
Features  
These N-Channel enhancement mode power field effect  
transistors are produced using Fairchild’s proprietary,  
planar stripe, DMOS technology.  
10A, 200V, R  
= 0.36@V = 10 V  
DS(on) GS  
Low gate charge ( typical 13 nC)  
Low Crss ( typical 14 pF)  
Fast switching  
100% avalanche tested  
Improved dv/dt capability  
This advanced technology is especially tailored to minimize  
on-state  
resistance,  
provide  
superior  
switching  
performance, and withstand high energy pulse in the  
avalanche and commutation modes. These devices are  
well suited for high efficiency switching DC/DC converters,  
switch mode power supplies, and motor control.  
Low level gate drive requirement allowing direct  
operation from logic drivers  
D
!
"
! "  
"
"
!
G
G
D
TO-220  
FQP Series  
S
!
S
Absolute Maximum Ratings  
T = 25°C unless otherwise noted  
C
Symbol  
Parameter  
FQP10N20L  
Units  
V
V
I
Drain-Source Voltage  
200  
10  
DSS  
- Continuous (T = 25°C)  
Drain Current  
A
D
C
- Continuous (T = 100°C)  
6.3  
A
C
I
(Note 1)  
Drain Current  
- Pulsed  
40  
A
DM  
V
E
I
Gate-Source Voltage  
± 20  
180  
V
GSS  
AS  
(Note 2)  
(Note 1)  
(Note 1)  
(Note 3)  
Single Pulsed Avalanche Energy  
Avalanche Current  
mJ  
A
10  
AR  
E
Repetitive Avalanche Energy  
Peak Diode Recovery dv/dt  
8.7  
mJ  
V/ns  
W
AR  
dv/dt  
5.5  
P
Power Dissipation (T = 25°C)  
87  
D
C
- Derate above 25°C  
Operating and Storage Temperature Range  
0.7  
W/°C  
°C  
T , T  
-55 to +150  
J
STG  
Maximum lead temperature for soldering purposes,  
1/8from case for 5 seconds  
T
300  
°C  
L
Thermal Characteristics  
Symbol  
Parameter  
Thermal Resistance, Junction-to-Case  
Thermal Resistance, Case-to-Sink  
Thermal Resistance, Junction-to-Ambient  
Typ  
--  
Max  
1.44  
--  
Units  
°C/W  
°C/W  
°C/W  
R
R
R
θJC  
θCS  
θJA  
0.5  
--  
62.5  
©2000 Fairchild Semiconductor International  
Rev. A2, December 2000  
Electrical Characteristics  
T = 25°C unless otherwise noted  
C
Symbol  
Parameter  
Test Conditions  
Min  
Typ  
Max  
Units  
Off Characteristics  
BV  
V
= 0 V, I = 250 µA  
GS D  
Drain-Source Breakdown Voltage  
200  
--  
--  
--  
--  
V
DSS  
BV  
Breakdown Voltage Temperature  
Coefficient  
DSS  
I
= 250 µA, Referenced to 25°C  
0.18  
V/°C  
D
/
T  
J
I
V
V
V
V
= 200 V, V = 0 V  
--  
--  
--  
--  
--  
--  
--  
--  
1
µA  
µA  
nA  
nA  
DSS  
DS  
GS  
Zero Gate Voltage Drain Current  
= 160 V, T = 125°C  
10  
DS  
GS  
GS  
C
I
= 20 V, V = 0 V  
Gate-Body Leakage Current, Forward  
Gate-Body Leakage Current, Reverse  
100  
-100  
GSSF  
DS  
I
= -20 V, V = 0 V  
GSSR  
DS  
On Characteristics  
V
V
V
V
V
= V , I = 250 µA  
Gate Threshold Voltage  
1.0  
--  
--  
2.0  
V
S
GS(th)  
DS  
GS  
D
= 10 V, I = 5.0 A  
R
Static Drain-Source  
On-Resistance  
0.29  
0.3  
0.36  
0.38  
GS  
GS  
D
DS(on)  
= 5 V, I = 5.0 A  
(Note 4)  
D
g
= 30 V, I = 5.0 A  
Forward Transconductance  
--  
10.7  
--  
FS  
DS  
D
Dynamic Characteristics  
C
C
C
Input Capacitance  
--  
--  
--  
640  
95  
830  
125  
18  
pF  
pF  
pF  
iss  
V
= 25 V, V = 0 V,  
GS  
DS  
Output Capacitance  
oss  
rss  
f = 1.0 MHz  
Reverse Transfer Capacitance  
14  
Switching Characteristics  
t
t
t
t
Turn-On Delay Time  
Turn-On Rise Time  
Turn-Off Delay Time  
Turn-Off Fall Time  
Total Gate Charge  
Gate-Source Charge  
Gate-Drain Charge  
--  
--  
--  
--  
--  
--  
--  
13  
150  
50  
35  
310  
110  
200  
17  
ns  
ns  
d(on)  
V
= 100 V, I = 10 A,  
DD  
D
r
R
= 25 Ω  
G
(Note 4, 5)  
(Note 4, 5)  
ns  
d(off)  
f
95  
ns  
Q
Q
Q
13  
nC  
nC  
nC  
g
V
V
= 160 V, I = 10 A,  
DS  
D
2.4  
6.1  
--  
= 5 V  
gs  
gd  
GS  
--  
Drain-Source Diode Characteristics and Maximum Ratings  
I
Maximum Continuous Drain-Source Diode Forward Current  
--  
--  
--  
--  
--  
--  
--  
10  
40  
1.5  
--  
A
A
S
I
Maximum Pulsed Drain-Source Diode Forward Current  
SM  
V
t
V
V
= 0 V, I = 10 A  
Drain-Source Diode Forward Voltage  
Reverse Recovery Time  
--  
V
SD  
GS  
S
(Note 4)  
= 0 V, I = 10 A,  
120  
0.57  
ns  
µC  
rr  
GS  
S
dI / dt = 100 A/µs  
Q
Reverse Recovery Charge  
--  
F
rr  
Notes:  
1. Repetitive Rating : Pulse width limited by maximum junction temperature  
2. L = 2.7mH, I = 10A, V = 50V, R = 25 Ω, Starting T = 25°C  
AS  
DD  
G
J
3. I 10A, di/dt 300A/µs, V BV  
Starting T = 25°C  
SD  
DD  
DSS,  
J
4. Pulse Test : Pulse width 300µs, Duty cycle 2%  
5. Essentially independent of operating temperature  
©2000 Fairchild Semiconductor International  
Rev. A2, December 2000  
Typical Characteristics  
VGS  
Top :  
10 V  
8.0 V  
6.0 V  
5.0 V  
4.5 V  
4.0 V  
3.5 V  
101  
101  
Bottom : 3.0 V  
150  
100  
100  
25  
Notes :  
Notes :  
μ
2. TC = 25  
1. 250 s Pulse Test  
-55  
1. VDS = 30V  
μ
2. 250 s Pulse Test  
-1  
-1  
10  
10  
-1  
100  
101  
0
2
4
6
8
10  
10  
VGS, Gate-Source Voltage [V]  
VDS, Drain-Source Voltage [V]  
Figure 1. On-Region Characteristics  
Figure 2. Transfer Characteristics  
1.6  
1.2  
0.8  
0.4  
0.0  
VGS = 5V  
101  
VGS = 10V  
100  
Notes :  
25  
150  
1. VGS = 0V  
Note : T = 25  
J
μ
2. 250 s Pulse Test  
-1  
10  
0
5
10  
15  
20  
25  
0.2  
0.4  
0.6  
0.8  
1.0  
1.2  
1.4  
1.6  
1.8  
ID , Drain Current [A]  
VSD, Source-Drain voltage [V]  
Figure 3. On-Resistance Variation vs.  
Drain Current and Gate Voltage  
Figure 4. Body Diode Forward Voltage  
Variation vs. Source Current  
and Temperature  
1500  
1200  
900  
600  
300  
0
12  
10  
8
C
iss = Cgs + Cgd (Cds = shorted)  
Coss = Cds + Cgd  
rss = C  
C
gd  
VDS = 40V  
VDS = 100V  
C
iss  
VDS = 160V  
6
Coss  
4
Notes :  
1. V = 0 V  
2. f = 1 MHz  
C
rss  
2
Note : ID = 10 A  
20  
0
-1  
10  
100  
101  
0
4
8
12  
16  
24  
QG, Total Gate Charge [nC]  
VDS, Drain-Source Voltage [V]  
Figure 5. Capacitance Characteristics  
Figure 6. Gate Charge Characteristics  
©2000 Fairchild Semiconductor International  
Rev. A2, December 2000  
Typical Characteristics (Continued)  
1.2  
1.1  
1.0  
3.0  
2.5  
2.0  
1.5  
1.0  
0.5  
0.0  
Notes :  
1. VGS = 0 V  
2. ID = 250 μA  
0.9  
0.8  
Notes :  
1. VGS = 10 V  
2. ID = 5 A  
-100  
-50  
0
50  
100  
150  
200  
-100  
-50  
0
50  
100  
150  
200  
TJ, Junction Temperature [oC]  
T, Junction Temperature [oC]  
J
Figure 7. Breakdown Voltage Variation  
vs. Temperature  
Figure 8. On-Resistance Variation  
vs. Temperature  
12  
10  
8
Operation in This Area  
is Limited by RDS(on)  
102  
101  
100  
10-1  
100 µs  
1 ms  
10 ms  
6
DC  
4
Notes :  
1. TC = 25 o  
2. TJ = 150 o  
3. Single Pulse  
2
C
C
0
25  
100  
101  
102  
50  
75  
100  
125  
150  
TC, Case Temperature [  
]
VDS, Drain-Source Voltage [V]  
Figure 9. Maximum Safe Operating Area  
Figure 10. Maximum Drain Current  
vs. Case Temperature  
1 0 0  
D = 0 . 5  
0 . 2  
0 . 1  
N o t e s  
:
/W M a x .  
1 . Z θ C(t )  
=
1 .4 4  
J
2 . D u t y F a c t o r , D = t 1 /t 2  
3 . T J  
-
T C  
=
P D  
* Z θ C(t )  
J
M
M
1 0 -1  
0 . 0 5  
PDM  
0 . 0 2  
0 . 0 1  
t1  
s i n g le p u ls e  
t2  
1 0 -2  
1 0 -5  
1 0 -4  
1 0 -3  
1 0 -2  
1 0 -1  
1 0 0  
1 0 1  
t1  
, S q u a r e W a v e P u ls e D u r a tio n [s e c ]  
Figure 11. Transient Thermal Response Curve  
©2000 Fairchild Semiconductor International  
Rev. A2, December 2000  
Gate Charge Test Circuit & Waveform  
VGS  
Same Type  
50KΩ  
as DUT  
Qg  
12V  
200nF  
5V  
300nF  
VDS  
VGS  
Qgs  
Qgd  
DUT  
3mA  
Charge  
Resistive Switching Test Circuit & Waveforms  
RL  
VDS  
90%  
VDS  
VDD  
VGS  
RG  
10%  
VGS  
DUT  
5V  
td(on)  
tr  
td(off)  
tf  
t on  
t off  
Unclamped Inductive Switching Test Circuit & Waveforms  
BVDSS  
--------------------  
BVDSS - VDD  
L
1
2
2
----  
EAS  
=
LIAS  
VDS  
ID  
BVDSS  
IAS  
RG  
VDD  
ID (t)  
VDD  
VDS (t)  
DUT  
10V  
t p  
t p  
Time  
©2000 Fairchild Semiconductor International  
Rev. A2, December 2000  
Peak Diode Recovery dv/dt Test Circuit & Waveforms  
+
DUT  
VDS  
_
I SD  
L
Driver  
RG  
Same Type  
as DUT  
VDD  
VGS  
• dv/dt controlled by RG  
• ISD controlled by pulse period  
Gate Pulse Width  
--------------------------  
VGS  
D =  
Gate Pulse Period  
10V  
( Driver )  
IFM , Body Diode Forward Current  
I SD  
di/dt  
( DUT )  
IRM  
Body Diode Reverse Current  
Body Diode Recovery dv/dt  
VSD  
VDS  
( DUT )  
VDD  
Body Diode  
Forward Voltage Drop  
©2000 Fairchild Semiconductor International  
Rev. A2, December 2000  
Package Dimensions  
TO-220  
4.50 ±0.20  
9.90 ±0.20  
(8.70)  
+0.10  
–0.05  
1.30  
ø3.60 ±0.10  
1.27 ±0.10  
1.52 ±0.10  
0.80 ±0.10  
+0.10  
–0.05  
0.50  
2.40 ±0.20  
2.54TYP  
2.54TYP  
[2.54 ±0.20]  
[2.54 ±0.20]  
10.00 ±0.20  
©2000 Fairchild Semiconductor International  
Rev. A2, December 2000  
TRADEMARKS  
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is  
not intended to be an exhaustive list of all such trademarks.  
ACEx™  
HiSeC™  
SuperSOT™-8  
SyncFET™  
TinyLogic™  
UHC™  
Bottomless™  
CoolFET™  
CROSSVOLT™  
E2CMOS™  
FACT™  
ISOPLANAR™  
MICROWIRE™  
POP™  
PowerTrench®  
QFET™  
VCX™  
FACT Quiet Series™  
QS™  
FAST®  
Quiet Series™  
SuperSOT™-3  
SuperSOT™-6  
FASTr™  
GTO™  
DISCLAIMER  
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY  
PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY  
LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN;  
NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.  
LIFE SUPPORT POLICY  
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT  
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR  
INTERNATIONAL.  
As used herein:  
result in significant injury to the user.  
1. Life support devices or systems are devices or systems  
which, (a) are intended for surgical implant into the body,  
or (b) support or sustain life, or (c) whose failure to perform  
when properly used in accordance with instructions for use  
provided in the labeling, can be reasonably expected to  
2. A critical component is any component of a life support  
device or system whose failure to perform can be  
reasonably expected to cause the failure of the life support  
device or system, or to affect its safety or effectiveness.  
PRODUCT STATUS DEFINITIONS  
Definition of Terms  
Datasheet Identification  
Product Status  
Definition  
Advance Information  
Formative or In  
Design  
This datasheet contains the design specifications for  
product development. Specifications may change in  
any manner without notice.  
Preliminary  
First Production  
This datasheet contains preliminary data, and  
supplementary data will be published at a later date.  
Fairchild Semiconductor reserves the right to make  
changes at any time without notice in order to improve  
design.  
No Identification Needed  
Obsolete  
Full Production  
This datasheet contains final specifications. Fairchild  
Semiconductor reserves the right to make changes at  
any time without notice in order to improve design.  
Not In Production  
This datasheet contains specifications on a product  
that has been discontinued by Fairchild semiconductor.  
The datasheet is printed for reference information only.  
©2000 Fairchild Semiconductor International  
Rev. A, January 2000  

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