FQP7N65C [FAIRCHILD]
650V N-Channel MOSFET; 650V N沟道MOSFET
| 型号： | FQP7N65C |
| 厂家： | 
FAIRCHILD SEMICONDUCTOR |
| 描述： | 650V N-Channel MOSFET |
| 文件： | 总10页 (文件大小：887K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
®
QFET
FQP7N65C/FQPF7N65C
650V N-Channel MOSFET
General Description
Features
These N-Channel enhancement mode power field effect
transistors are produced using Fairchild’s proprietary,
planar stripe, DMOS technology.
•
•
•
•
•
•
7A, 650V, R
= 1.4Ω @V = 10 V
DS(on) GS
Low gate charge ( typical 28 nC)
Low Crss ( typical 12 pF)
Fast switching
This advanced technology has been especially tailored to
minimize on-state resistance, provide superior switching
performance, and withstand high energy pulse in the
avalanche and commutation mode. These devices are well
suited for high efficiency switched mode power supplies,
active power factor correction, electronic lamp ballasts
based on half bridge topology.
100% avalanche tested
Improved dv/dt capability
D
!
●
◀
▲
●
●
!
G
TO-220F
FQPF Series
TO-220
FQP Series
G D
S
G
D S
!
S
Absolute Maximum Ratings
T = 25°C unless otherwise noted
C
Symbol
Parameter
FQP7N65C
FQPF7N65C
Units
V
V
I
Drain-Source Voltage
650
DSS
- Continuous (T = 25°C)
Drain Current
7
7 *
A
D
C
- Continuous (T = 100°C)
- Pulsed
4.2
28
4.2 *
28 *
A
A
C
I
(Note 1)
Drain Current
DM
V
E
I
E
dv/dt
P
Gate-Source Voltage
Single Pulsed Avalanche Energy
Avalanche Current
± 30
212
7
1.6
4.5
V
mJ
A
mJ
V/ns
W
GSS
AS
(Note 2)
(Note 1)
(Note 1)
(Note 3)
AR
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
AR
Power Dissipation (T = 25°C)
160
52
D
C
- Derate above 25°C
Operating and Storage Temperature Range
1.28
0.42
W/°C
°C
T , T
-55 to +150
300
J
STG
Maximum lead temperature for soldering purposes,
T
°C
L
1/8" from case for 5 seconds
* Drain current limited by maximum junction temperature.
Thermal Characteristics
Symbol
Parameter
FQP7N65C
FQPF7N65C
Units
°C/W
°C/W
°C/W
R
R
R
Thermal Resistance, Junction-to-Case
Thermal Resistance, Case-to-Sink Typ.
Thermal Resistance, Junction-to-Ambient
0.78
0.5
62.5
2.4
--
62.5
θJC
θCS
θJA
©2004 Fairchild Semiconductor Corporation
Rev. A, May 2004
Electrical Characteristics
T = 25°C unless otherwise noted
C
Symbol
Parameter
Test Conditions
Min
Typ
Max
Units
Off Characteristics
BV
∆BV
/
V
I
= 0 V, I = 250 µA
GS D
Drain-Source Breakdown Voltage
Breakdown Voltage Temperature
Coefficient
650
--
--
--
--
V
DSS
DSS
∆T
= 250 µA, Referenced to 25°C
0.8
V/°C
D
J
I
V
V
V
V
= 650 V, V = 0 V
--
--
--
--
--
--
--
--
1
10
100
-100
µA
µA
nA
nA
DSS
DS
GS
Zero Gate Voltage Drain Current
= 520 V, T = 125°C
DS
GS
GS
C
I
= 30 V, V = 0 V
Gate-Body Leakage Current, Forward
Gate-Body Leakage Current, Reverse
GSSF
GSSR
DS
I
= -30 V, V = 0 V
DS
On Characteristics
V
R
V
V
V
= V , I = 250 µA
Gate Threshold Voltage
Static Drain-Source
On-Resistance
2.0
--
--
1.2
8
4.0
1.4
--
V
Ω
S
GS(th)
DS
GS
DS
GS
D
DS(on)
= 10 V, I = 3.5 A
D
g
= 40 V, I = 3.5 A
(Note 4)
Forward Transconductance
--
FS
D
Dynamic Characteristics
C
C
C
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
--
--
--
955
100
12
1245
130
16
pF
pF
pF
iss
V
= 25 V, V = 0 V,
GS
DS
oss
rss
f = 1.0 MHz
Switching Characteristics
t
t
t
t
Q
Q
Q
Turn-On Delay Time
Turn-On Rise Time
Turn-Off Delay Time
Turn-Off Fall Time
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
--
--
--
--
--
--
--
20
50
90
55
28
4.5
12
50
110
190
120
36
ns
ns
ns
d(on)
V
R
= 325 V, I = 7A,
= 25 Ω
DD
D
r
G
d(off)
f
(Note 4, 5)
(Note 4, 5)
ns
nC
nC
nC
g
V
V
= 520 V, I = 7A,
DS
GS
D
--
--
= 10 V
gs
gd
Drain-Source Diode Characteristics and Maximum Ratings
I
I
Maximum Continuous Drain-Source Diode Forward Current
Maximum Pulsed Drain-Source Diode Forward Current
--
--
--
--
--
--
--
--
400
3.3
7
28
1.4
--
A
A
V
ns
µC
S
SM
V
t
V
V
= 0 V, I = 7A
Drain-Source Diode Forward Voltage
Reverse Recovery Time
SD
GS
S
= 0 V, I = 7A,
rr
GS
S
dI / dt = 100 A/µs
(Note 4)
Q
Reverse Recovery Charge
--
F
rr
Notes:
1. Repetitive Rating : Pulse width limited by maximum junction temperature
2. L = 8mH, I = 7A, V = 50V, R = 25 Ω, Starting T = 25°C
AS
DD
G
DSS,
J
3. I ≤ 7A, di/dt ≤ 200A/µs, V ≤ BV
Starting T = 25°C
J
SD
DD
4. Pulse Test : Pulse width ≤ 300µs, Duty cycle ≤ 2%
5. Essentially independent of operating temperature
©2004 Fairchild Semiconductor Corporation
Rev. A, May 2004
Typical Characteristics
VGS
Top :
15.0 V
10.0V
8.0V
7.0V
6.0V
5.5V
101
100
101
100
Bottom: 5.0V
o
150 C
o
-55 C
o
25 C
※
Notes :
1. 250µ s Pulse Test
2. TC = 25
※
Notes :
℃
1. VDS = 40V
2. 250µ s Pulse Test
-1
-1
10
10
0
10
101
2
4
6
8
10
VGS, Gate-Source Voltage [V]
V , Drain-Source Voltage [V]
DS
Figure 1. On-Region Characteristics
Figure 2. Transfer Characteristics
3.0
101
100
2.5
2.0
1.5
1.0
VGS = 10V
150℃
25℃
VGS = 20V
※
Notes :
1. VGS = 0V
2. 250µ s Pulse Test
※
Note: T = 25
℃
J
-1
10
0
5
10
15
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
ID, DrainCurrent [A]
VSD, Source-Drain voltage [V]
Figure 3. On-Resistance Variation vs
Drain Current and Gate Voltage
Figure 4. Body Diode Forward Voltage
Variation with Source Current
and Temperature
12
10
8
2000
1600
1200
800
400
0
C
iss = Cgs + Cgd (Cds = shorted)
C
oss = C + C
gd
C
rss = Cds
gd
VDS = 130V
VDS = 325V
VDS = 520V
C
iss
6
C
oss
※
Note ;
4
1. VGS = 0 V
2. f = 1 MHz
C
rss
2
※
Note : ID = 7A
20
0
-1
0
0
4
8
12
16
24
28
10
10
101
QG, Total Gate Charge [nC]
VDS, Drain-Source Voltage [V]
Figure 5. Capacitance Characteristics
Figure 6. Gate Charge Characteristics
©2004 Fairchild Semiconductor Corporation
Rev. A, May 2004
Typical Characteristics (Continued)
1.2
1.1
1.0
3.0
2.5
2.0
1.5
1.0
0.5
0.0
0.9
※
Notes :
※
Notes :
1. V = 0 V
2. IDG=S 250 µ A
1. V = 10 V
2. IDG=S 3.5 A
0.8
-100
-50
0
50
100
150
200
-100
-50
0
50
100
150
200
T, Junction Temperature [oC]
T, Junction Temperature [oC]
J
J
Figure 7. Breakdown Voltage Variation
vs Temperature
Figure 8. On-Resistance Variation
vs Temperature
Operation in This Area
is Limited by R DS(on)
Operation in This Area
is Limited by R DS(on)
100
1 ms
10 ms
100 ms
µs
1
10
10 µs
101
100
10-1
10-2
100
1 ms
10 ms
DC
µs
DC
0
10
-1
10
※
Notes :
※
Notes :
1. TC = 25 oC
1. TC = 25 o
C
C
2. T = 150 oC
2. TJ = 150 o
J
3. Single Pulse
3. Single Pulse
-2
10
0
2
3
100
101
102
103
10
101
10
10
VDS, Drain-Source Voltage [V]
VDS, Drain-Source Voltage [V]
Figure 9-1. Maximum Safe Operating Area
for FQP7N65C
Figure 9-2. Maximum Safe Operating Area
for FQPF7N65C
8
6
4
2
0
25
50
75
100
125
150
TC, Case Temperature [℃]
Figure 10. Maximum Drain Current
vs Case Temperature
©2004 Fairchild Semiconductor Corporation
Rev. A, May 2004
Typical Characteristics (Continued)
10 0
D = 0 .5
0 .2
※
N otes
:
10 -1
1.
Z
(t)
= 0.78 ℃ /W M ax.
2. DθuJtCy Factor, D =t1/t2
0 .1
3. TJM
-
TC
=
P D M
*
Zθ JC (t)
0 .0 5
0 .0 2
PDM
t1
0 .0 1
sin g le p u lse
10 -2
t2
1 0-5
10 -4
1 0-3
10 -2
10 -1
1 00
10 1
t1, S q u are W ave P ulse D u ra tio n [sec]
Figure 11. Transient Thermal Response Curve for FQP7N65C
D = 0 .5
10 0
0 .2
0 .1
0 .0 5
※
N otes
:
10 -1
1.
Z
(t)
= 2.4 ℃ /W M ax.
2. DθuJtCy Factor, D =t1/t2
0 .0 2
0 .0 1
3. TJM
-
TC
=
P D M * Zθ J C(t)
PDM
t1
10 -2
sin g le p u lse
10 -4
t2
1 0-5
1 0-3
10 -2
10 -1
1 00
10 1
t1, S q u are W ave P ulse D u ra tio n [sec]
Figure 11-2. Transient Thermal Response Curve for FQPF7N65C
©2004 Fairchild Semiconductor Corporation
Rev. A, May 2004
Gate Charge Test Circuit & Waveform
VGS
Same Type
50KΩ
as DUT
10V
Qg
12V
200nF
300nF
VDS
VGS
Qgs
Qgd
DUT
3mA
Charge
Resistive Switching Test Circuit & Waveforms
RL
VDS
90%
VDS
VDD
VGS
RG
10%
VGS
DUT
10V
td(on)
tr
td(off)
tf
t on
t off
Unclamped Inductive Switching Test Circuit & Waveforms
BVDSS
L
1
2
----
--------------------
BVDSS - VDD
EAS
=
LIAS
VDS
ID
2
BVDSS
IAS
RG
VDD
ID (t)
VDD
VDS (t)
DUT
10V
t p
t p
Time
©2004 Fairchild Semiconductor Corporation
Rev. A, May 2004
Peak Diode Recovery dv/dt Test Circuit & Waveforms
+
DUT
VDS
_
I SD
L
Driver
RG
Same Type
as DUT
VDD
VGS
• dv/dt controlled by RG
• ISD controlled by pulse period
Gate Pulse Width
VGS
--------------------------
Gate Pulse Period
D =
10V
( Driver )
IFM , Body Diode Forward Current
I SD
di/dt
( DUT )
IRM
Body Diode Reverse Current
Body Diode Recovery dv/dt
VSD
VDS
( DUT )
VDD
Body Diode
Forward Voltage Drop
©2004 Fairchild Semiconductor Corporation
Rev. A, May 2004
Package Dimensions
TO-220
4.50 ±0.20
9.90 ±0.20
(8.70)
+0.10
–0.05
1.30
ø3.60 ±0.10
1.27 ±0.10
1.52 ±0.10
0.80 ±0.10
+0.10
–0.05
0.50
2.40 ±0.20
2.54TYP
2.54TYP
[2.54 ±0.20]
[2.54 ±0.20]
10.00 ±0.20
Dimensions in Millimeters
©2004 Fairchild Semiconductor Corporation
Rev. A, May 2004
Package Dimensions (Continued)
TO-220F
2.54 ±0.20
10.16 ±0.20
ø3.18 ±0.10
(7.00)
(0.70)
(1.00x45°)
MAX1.47
0.80 ±0.10
#1
0.35 ±0.10
+0.10
–0.05
0.50
2.76 ±0.20
2.54TYP
2.54TYP
[2.54 ±0.20]
[2.54 ±0.20]
9.40 ±0.20
Dimensions in Millimeters
©2004 Fairchild Semiconductor Corporation
Rev. A, May 2004
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SuperSOT™-8
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A
CEx™
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I2C™
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FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY
PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY
LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN;
NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR
CORPORATION.
As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the body,
or (b) support or sustain life, or (c) whose failure to perform
when properly used in accordance with instructions for use
provided in the labeling, can be reasonably expected to
result in significant injury to the user.
2. A critical component is any component of a life support
device or system whose failure to perform can be
reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative or In
Design
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
Preliminary
First Production
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
No Identification Needed
Obsolete
Full Production
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
Not In Production
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
©2004 Fairchild Semiconductor Corporation
Rev. I11
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