FSUSB20MUX_12 [FAIRCHILD]
Low-Power, 1-Port, High-Speed USB (480Mbps) Switch;型号: | FSUSB20MUX_12 |
厂家: | FAIRCHILD SEMICONDUCTOR |
描述: | Low-Power, 1-Port, High-Speed USB (480Mbps) Switch |
文件: | 总12页 (文件大小:703K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
April 2012
FSUSB20 — Low-Power, 1-Port, High-Speed USB
(480Mbps) Switch
Features
Description
FSUSB20 is
a
low-power, high-bandwidth switch
.
.
.
.
.
.
.
.
-30dB Off Isolation: 250MHz
specially designed for switching high-speed USB 2.0
signals in handset and consumer applications; such as
cell phone, digital camera, and notebook with hubs or
controllers of limited USB I/O. The wide bandwidth
(>720MHz) allows signals to pass with minimum edge
and phase distortion. Superior channel-to-channel
crosstalk results in minimal interference. It is compatible
with the high-speed USB 2.0 standard.
-30dB Non-adjacent Channel Crosstalk: 250MHz
On Resistance: 4.5Ω Typical (RON)
-3dB Bandwidth: >720MHz
Low-Power Consumption: 1µA Maximum
Control Input: LVTTL Compatible
Bi-Directional Operation
.
USB High-Speed and Full-Speed Signaling
Capability
Applications
.
Cell Phones, PDAs, Digital Cameras, Notebook
Computers
Ordering Information
Operating
Part Number Temperature
Range
Packing
Package
Method
Tape and
Reel
FSUSB20L10X
FSUSB20BQX
FSUSB20MUX
-40 to +85°C 10-Lead MicroPak™, 1.6 x 2.1mm
14-Terminal Depopulation Quad Very-Thin Flat Pack No Lead
-40 to +85°C
-40 to +85°C
Tube
(DQFN), JEDEC MO-241, 2.5 X 3.0mm
10-Lead Molded Small Outline Package (MSOP), JEDEC MO-187,
3.0mm Wide
Tape and
Reel
©2005 Fairchild Semiconductor Corporation
FSUSB20 • Rev. 1.0.3
www.fairchildsemi.com
Connection Diagrams
Figure 1. MicroPak™ (Top View)
Figure 2. Analog Symbol
Figure 3. DQFN (Top Through View)
Figure 4. MSOP (Top Through View)
Pin Descriptions
Pin # MicroPak™ / MSOP
Pin # DQFN
Pin Names
Description
Select Input
Bus B
1
2
S
2, 3, 7, 8
3, 5, 10, 12
1B1, 1B2, 2B2, 2B1
5
4, 6
9
7
GND
1A, 2A
OE
Ground
6, 9
12
Bus A
Bus Switch Enable
Supply Voltage
10
14
VCC
Truth Table
S
OE
Function
Disconnect
A=B1
Don’t Care
LOW
HIGH
LOW
LOW
HIGH
A=B2
© 2005 Fairchild Semiconductor Corporation
FSUSB20 • Rev. 1.0.3
www.fairchildsemi.com
2
Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.
The absolute maximum ratings are stress ratings only.
Symbol
VCC
Parameter
Min.
-0.5
-0.5
-0.5
-50
Max.
4.6
Unit
V
Supply Voltage
VS
DC Switch Voltage
DC Input Voltage(1)
VCC + 0.05
4.6
V
VIN
V
IIK
DC Input Diode Current, VIN<0V
DC Output Sink Current
mA
mA
mA
°C
IOUT
50
ICC / IGND
TSTG
DC VCC / GND Current
±100
-65
Storage Temperature Range
+150
All Pins
7000
7000
ESD
Human Body Model, JESD22-A114
V
I/O to GND
Note:
1. The input and output negative voltage ratings may be exceeded if the input and output diode current ratings are
observed.
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not
recommend exceeding them or designing to Absolute Maximum Ratings.
Symbol
VCC
Parameter
Min.
3.0
0
Max.
3.6
Unit
V
Power Supply Operating
VIN
Input Voltage
VCC
VCC
5
V
VOUT
Output Voltage
0
V
Switch Control Input(2)
Switch I/O
0
tr, tf
Input Rise and Fall Time
ns/V
°C
0
DC
+85
TA
Operating Temperature, Free Air
-40
Note:
2. Unused control inputs must be held HIGH or LOW. They may not float.
© 2005 Fairchild Semiconductor Corporation
www.fairchildsemi.com
FSUSB20 • Rev. 1.0.3
3
DC Electrical Characteristics
Typical values are at VCC = 3.0V and TA = 25°C.
TA=-40 to +85°C
Symbol
Parameter
Condition
VCC (V)
Unit
Min.
Typ.
Max.
VIK
VIH
VIL
IIN
Clamp Diode Voltage
IIN = -18mA
3.0
3.0 to 3.6
3.0 to 3.6
3.6
-1.2
V
V
High-Level Input Voltage
Low-Level Input Voltage
Input Leakage Current
Off-State Leakage Current
2.0
0.8
±1.0
±1.0
7
V
µA
µA
0 ≤ VIN ≤ 3.6V
0 ≤ A, B ≤ VCC
IOFF
3.6
VIN = 0.8V, ION = 8mA
3.0
5
RON
Switch On Resistance(3)
Ω
VIN = 3.0V, ION = 8mA
3.0
4.5
6.5
VIN = 0.8V, VIN = 0V - 1.5V,
Delta RON
3.0
3.0
3.6
0.3
1
ΔRON
Ω
Ω
I
ON = 8mA
RFLAT(ON) On Resistance Flatness(4) IOUT = 8mA
VIN = VCC or GND,
OUT = 0
ICC
Quiescent Supply Current
1
µA
I
Notes:
3. Measured by the voltage drop between the A and B pins at the indicated current through the switch. On
resistance is determined by the lower of the voltages on the A or B pins.
4. Flatness is defines as the difference between the maximum and the minimum value on resistance over the
specified range of conditions.
© 2005 Fairchild Semiconductor Corporation
FSUSB20 • Rev. 1.0.3
www.fairchildsemi.com
4
AC Electrical Characteristics
Typical values are at VCC = 3.3V and TA = 25°C.
Symbol
Parameter
Condition
VCC(V)
Typ.
Max.
Unit
Figure
Turn-On Time
S-to-Bus B
Figure 9
Figure 10
tON
VB = 0.8V
3.0 to 3.6
4.8
7.0
ns
Turn-Off Time
S-to-Bus B
Figure 9
Figure 10
tOFF
VB = 0.8V
CL = 10pF
3.0 to 3.6
2.2
4.0
ns
tPD
Propagation Delay
3.0 to 3.6
3.0 to 3.6
0.25
-26
ns
Figure 14
Figure 11
f = 250MHz,
RL = 50Ω
Non-Adjacent Off
Isolation
OIRR
dB
f = 250MHz,
RL = 50Ω
Non-Adjacent
Channel Crosstalk
XTALK
BW
3.0 to 3.6
3.0 to 3.6
-45
dB
Figure 12
Figure 13
750
435
RL = 50Ω, CL = 0pF
RL = 50Ω, CL = 5pF
-3dB Bandwidth
MHz
USB Related AC Electrical Characteristics
Typical values are at VCC = 3.3V and TA = 25°C.
Symbol
Parameter
Condition
VCC (V)
Typ.
Unit
Figure
Channel-to Channel
Skew
Figure 14
Figure 16
tSK(O)
CL = 10pF
3.0 to 3.6
3.0 to 3.6
3.0 to 3.6
0.051
ns
Skew of Opposite
Transition of the
Same Output
Figure 14
Figure 16
tSK(P)
CL = 10pF
0.020
0.170
ns
ns
RL = 50Ω, CL = 10pF
tR = tF = 750ps at 480MPs
TJ
Total Jitter
Capacitance
Typical values are at VCC = 3.3V and TA = 25°C.
Symbol
CIN
Parameter
Control Pin Input Capacitance
A/B On Capacitance
Condition
Typ.
Unit
pF
VCC = 0V
2.5
12.0
4.5
CON
VCC = 3.3V, /OE = 0V
VCC and /OE = 3.3V
pF
COFF
Port B Off Capacitance
pF
© 2005 Fairchild Semiconductor Corporation
FSUSB20 • Rev. 1.0.3
www.fairchildsemi.com
5
Performance Characteristics
Freqency Response
0
Freqency Response
0
-10
-1
-2
-3
-4
-5
-6
-7
-8
-20
-30
-40
-50
-60
-70
-80
-90
-100
-110
-120
1
10
100
1000
10000
1
10
100
1000
Frequency (MHz)
Frequency (MHz)
CL = 0pF, VCC = 3.3V
VBIAS = 0.5V, VCC = 3.3V
Figure 5. Gain vs. Frequency
Figure 6. Off Isolation
10.0
9.0
8.0
7.0
6.0
5.0
4.0
3.0
Freqency Response
0
-10
-20
-30
-40
-50
-60
-70
-80
85°C
V
R
B2 = 800.000mV
ON = 5.402
-90
-100
-110
-120
25°C
2.0
1.0
0.0
V
B2 = 800.000mV
ON = 4.437
-40°C
R
V
B2 = 800.000mV
1
10
100
1000
RON = 3.561
Frequency (MHz)
0.00
0.50
1.00
1.50
VB2 (V)
2.00
2.50
3.00
VBIAS = 0.5V, VCC = 3.3V
Figure 7. Crosstalk
Figure 8. RON
© 2005 Fairchild Semiconductor Corporation
FSUSB20 • Rev. 1.0.3
www.fairchildsemi.com
6
AC Loadings and Waveforms
A
nB1
nB2
10pF
50Ω
GND
+
VB
Control
S OE
–
GND
Notes: Input driven by 50Ω source terminated in 50Ω.
CL includes load and stray capacitance.
Input PRR-1.0MHz, tW = 500ns.
Figure 9. AC Test Circuit
tr = 2.5ns
90% 90%
1.5V 1.5V
tf = 2.5ns
3.0V
SELECT
INPUT
10%
tON
10%
tOFF
GND
VOH
90%
90%
OUTPUT
VOL
Figure 10. AC Waveforms
B1
B1
A
A
Network Analyzer
100Ω
100Ω
50Ω
50Ω
B2
Network Analyzer
50Ω
S
Control
S
Control
OE
OE
Figure 11. Off Isolation Test
Figure 12. Crosstalk Test
© 2005 Fairchild Semiconductor Corporation
FSUSB20 • Rev. 1.0.3
www.fairchildsemi.com
7
AC Loadings and Waveforms
A
B
Network Analyzer
50Ω
S
Control
OE
GND
Figure 13. Bandwidth Test
800mV
Input
400mV
tPLH
tPHL
VOH
VOL
Output
Figure 14. Propagation Delay
800mV
50%
50%
Input
400mV
0
tPHL
tPLH
VOH
50%
VOL
50%
Output
tSK(P) = | tPHL - tPHL
|
Figure 15. Pulse Skew tSP(P)
800mV
50%
50%
Input
400mV
tPHL1
tPLH1
0
50%
50%
Output 1
tSK(O)
tSK(O)
50%
50%
Output 2
tPHL2
tPLH2
tSK(O) = | tPLH1 - tPLH2 | or | tPHL1 - tPHL2
|
Figure 16. Output Skew tSK(O)
© 2005 Fairchild Semiconductor Corporation
FSUSB20 • Rev. 1.0.3
www.fairchildsemi.com
8
Physical Dimensions
0.10
C
2.10
A
2X
1.62
B
KEEPOUT ZONE, NO TRACES
OR VIAS ALLOWED
(0.11)
0.56
1.12
1.60
PIN1 IDENT IS
2X LONGER THAN
OTHER LINES
0.10
C
10X
(0.35)
(0.25)
2X
10X
0.50
TOP VIEW
RECOMMENDED LAND PATTERN
0.55 MAX
0.05 C
0.05 C
0.05
0.00
(0.20)
C
0.35
0.25
SIDE VIEW
(0.15)
D
DETAIL A
(0.36)
0.35
0.25
0.65
0.55
0.35
0.25
DETAIL A 2X SCALE
1
4
0.56
NOTES:
10
5
A. PACKAGE CONFORMS TO JEDEC
REGISTRATION MO-255, VARIATION UABD .
B. DIMENSIONS ARE IN MILLIMETERS.
C. DIMENSIONS AND TOLERANCES PER
ASME Y14.5M, 1994.
D. PRESENCE OF CENTER PAD IS PACKAGE
SUPPLIER DEPENDENT. IF PRESENT IT
IS NOT INTENDED TO BE SOLDERED AND
HAS A BLACK OXIDE FINISH.
(0.29)
0.35
6
9
9X
0.25
0.50
0.25
0.15
9X
1.62
0.10
0.05
C
C
A B
ALL FEATURES
E. DRAWING FILENAME: MKT-MAC10Arev5.
BOTTOM VIEW
Figure 17. 10-Lead MicroPak™, 1.6 x 2.1mm
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the
warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/
For current tape and reel specifications, visit Fairchild Semiconductor’s online packaging area:
http://www.fairchildsemi.com/products/logic/pdf/micropak_tr.pdf.
© 2005 Fairchild Semiconductor Corporation
FSUSB20 • Rev. 1.0.3
www.fairchildsemi.com
9
Physical Dimensions
Figure 18. 14-Terminal Depopulation Quad Very-Thin Flat Pack No Lead (DQFN), JEDEC MO-241, 2.5 X 3.0mm
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the
warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/
For current tape and reel specifications, visit Fairchild Semiconductor’s online packaging area:
http://www.fairchildsemi.com/ms/MS/MS-522.pdf.
© 2005 Fairchild Semiconductor Corporation
FSUSB20 • Rev. 1.0.3
www.fairchildsemi.com
10
Physical Dimensions
Figure 19. 10-Lead Molded Small Outline Package (MSOP), JEDEC MO-187, 3.0mm Wide
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the
warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/
For current tape and reel specifications, visit Fairchild Semiconductor’s online packaging area:
http://www.fairchildsemi.com/products/analog/pdf/msop10_tr.pdf
© 2005 Fairchild Semiconductor Corporation
FSUSB20 • Rev. 1.0.3
www.fairchildsemi.com
11
© 2005 Fairchild Semiconductor Corporation
FSUSB20 • Rev. 1.0.3
www.fairchildsemi.com
12
相关型号:
©2020 ICPDF网 联系我们和版权申明