IRFM120ATF [FAIRCHILD]

Power Field-Effect Transistor, 2.3A I(D), 100V, 0.2ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET;
IRFM120ATF
型号: IRFM120ATF
厂家: FAIRCHILD SEMICONDUCTOR    FAIRCHILD SEMICONDUCTOR
描述:

Power Field-Effect Transistor, 2.3A I(D), 100V, 0.2ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET

晶体 晶体管 开关 脉冲 光电二极管
文件: 总7页 (文件大小:269K)
中文:  中文翻译
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IRFM120A  
Advanced Power MOSFET  
IEEE802.3af Compatible  
FEATURES  
BVDSS = 100 V  
RDS(on) = 0.2 !  
ID = 2.3 A  
! Avalanche Rugged Technology  
! Rugged Gate Oxide Technology  
! Lower Input Capacitance  
! Improved Gate Charge  
! Extended Safe Operating Area  
! Lower Leakage Current : 10 #A (Max.) @ VDS = 100V  
! Lower RDS(ON) : 0.155 ! (Typ.)  
SOT-223  
2
1
3
1. Gate 2. Drain 3. Source  
Absolute Maximum Ratings  
Symbol  
Characteristic  
Drain-to-Source Voltage  
Value  
100  
2.3  
Units  
VDSS  
V
Continuous Drain Current (TA=25%)  
Continuous Drain Current (TA=70%)  
Drain Current-Pulsed  
ID  
A
1.84  
18  
IDM  
VGS  
EAS  
IAR  
&
A
V
Gate-to-Source Voltage  
"20  
123  
2.3  
Single Pulsed Avalanche Energy  
Avalanche Current  
'
&
&
(
mJ  
A
EAR  
dv/dt  
Repetitive Avalanche Energy  
Peak Diode Recovery dv/dt  
mJ  
V/ns  
W
0.24  
6.5  
*
Total Power Dissipation (TA=25%)  
2.4  
PD  
*
Linear Derating Factor  
Operating Junction and  
W/%  
0.019  
TJ , TSTG  
- 55 to +150  
300  
Storage Temperature Range  
%
Maximum Lead Temp. for Soldering  
TL  
Purposes, 1/8” from case for 5-seconds  
Thermal Resistance  
Symbol  
Characteristic  
Junction-to-Ambient  
Typ.  
--  
Max.  
Units  
R$JA  
*
52  
%/W  
* When mounted on the minimum pad size recommended (PCB Mount).  
Rev. C  
N-CHANNEL  
POWER MOSFET  
IRFM120A  
Electrical Characteristics (TA=25% unless otherwise specified)  
Symbol  
BVDSS  
Characteristic  
Min. Typ. Max. Units  
Test Condition  
V
GS=0V,ID=250#A  
Drain-Source Breakdown Voltage  
Breakdown Voltage Temp. Coeff.  
Gate Threshold Voltage  
V
V/%  
V
100 --  
--  
.BV/.TJ  
VGS(th)  
ID=250#A  
See Fig 7  
-- 0.12 --  
V
V
V
DS=5V,ID=250#A  
2.0  
--  
--  
4.0  
100  
GS=20V  
Gate-Source Leakage , Forward  
Gate-Source Leakage , Reverse  
--  
--  
--  
--  
--  
IGSS  
nA  
GS=-20V  
-- -100  
VDS=30V  
-
--  
--  
--  
1
#A  
IDSS  
VDS=100V  
10  
Drain-to-Source Leakage Current  
V
DS=80V,TA=125%  
100  
Static Drain-Source  
On-State Resistance  
Forward Transconductance  
Input Capacitance  
V
GS=10V,ID=1.15A  
+
+
)
--  
--  
RDS(on)  
0.2  
--  
--  
--  
--  
--  
--  
--  
--  
--  
--  
--  
S
3.12 --  
370 480  
gfs  
Ciss  
Coss  
Crss  
td(on)  
tr  
VDS=40V,ID=1.15A  
VGS=0V,VDS=25V,f =1MHz  
110  
45  
40  
40  
90  
70  
22  
--  
Output Capacitance  
Reverse Transfer Capacitance  
Turn-On Delay Time  
Rise Time  
95  
38  
14  
14  
36  
28  
16  
2.7  
7.8  
pF  
ns  
See Fig 5  
VDD=50V,ID=9.2A,  
RG=18)  
td(off)  
tf  
Turn-Off Delay Time  
Fall Time  
See Fig 13  
+ ,  
Qg  
Total Gate Charge  
Gate-Source Charge  
Gate-Drain(“Miller”) Charge  
VDS=80V,VGS=10V,  
ID=9.2A  
nC  
Qgs  
Qgd  
--  
See Fig 6 & Fig 12 + ,  
Source-Drain Diode Ratings and Characteristics  
Symbol  
IS  
Characteristic  
Continuous Source Current  
Pulsed-Source Current  
Diode Forward Voltage  
Reverse Recovery Time  
Reverse Recovery Charge  
Min. Typ. Max. Units  
Test Condition  
Integral reverse pn-diode  
in the MOSFET  
--  
--  
--  
--  
--  
--  
2.3  
18  
1.5  
--  
A
ISM  
&
+
VSD  
trr  
V
--  
TJ=25%,IS=2.3A,VGS=0V  
TJ=25%,IF=9.2A  
ns  
#C  
98  
Qrr  
-- 0.34 --  
diF/dt=100A/#s  
+
Notes ;  
& Repetitive Rating : Pulse Width Limited by Maximum Junction Temperature  
' L=35mH, IAS=2.3A, VDD=25V, RG=27), Starting TJ =25%  
( ISD*9.2A, di/dt*300A/#s, VDD*BVDSS , Starting TJ =25%  
+ Pulse Test : Pulse Width = 250#s, Duty Cycle * 2%  
, Essentially Independent of Operating Temperature  
- Adjusted for Cisco  
N-CHANNEL  
POWER MOSFET  
IRFM120A  
Fig 1. Output Characteristics  
Fig 2. Transfer Characteristics  
VGS  
Top :  
15 V  
10 V  
8.0 V  
7.0 V  
6.0 V  
5.5V  
5.0 V  
1
10  
1
10  
Bottom : 4.5V  
150 oC  
0
10  
0
25 oC  
10  
@ Notes:  
1. V =0V  
GS  
@Notes:  
2. V =40V  
DS  
1. 250 sPulseTest  
"
- 55 oC  
3. 250 s PulseTest  
"
2. T = 25 oC  
A
-1  
10  
-1  
0
1
2
4
6
8
10  
10  
10  
10  
VGS , Gate-Source Voltage [V]  
VDS , Drain-Source Voltage [V]  
Fig 3. On-Resistance vs. Drain Current  
Fig 4. Source-Drain Diode Forward Voltage  
0.4  
1
10  
V
GS = 10 V  
0.3  
0.2  
0.1  
0.0  
0
10  
V
GS = 20 V  
@ Notes:  
1. VGS =0V  
150oC  
@Note: T = 25 oC  
25 oC  
2. 250 s PulseTest  
"
J
-1  
10  
0
10  
20  
30  
40  
0.4  
0.6  
0.8  
1.0  
1.2  
1.4  
1.6  
1.8  
2.0  
2.2  
I , Drain Current [A]  
VSD , Source-Drain Voltage [V]  
D
Fig 5. Capacitance vs. Drain-Source Voltage  
Fig 6. Gate Charge vs. Gate-Source Voltage  
600  
400  
200  
C
iss=C +Cgd (C =shorted)  
gs ds  
VDS =20V  
C
oss=C +C  
ds gd  
C iss  
10  
Crss=C  
gd  
VDS =50V  
VDS =80V  
C oss  
5
0
@Notes:  
1. VGS = 0 V  
2. f= 1MHz  
C rss  
@ Notes: I =9.2A  
D
00  
10  
1
0
5
10  
15  
20  
10  
Q , Total Gate Charge [nC]  
VDS , Drain-Source Voltage [V]  
G
N-CHANNEL  
POWER MOSFET  
IRFM120A  
Fig 7. Breakdown Voltage vs. Temperature  
Fig 8. On-Resistance vs. Temperature  
1.2  
1.1  
1.0  
0.9  
0.8  
3.0  
2.5  
2.0  
1.5  
1.0  
0.5  
0.0  
@ Notes :  
@Notes:  
1. V =10V  
1. V = 0 V  
GS  
GS  
2. I =4.6A  
2. I = 250 A  
"
D
D
-75 -50 -25  
0
25  
50  
75  
100 125 150 175  
o
-75 -50 -25  
0
25  
50  
75  
100 125 150 175  
o
T , Junction Temperature [C]  
T , Junction Temperature [C]  
J
J
Fig 9. Max. Safe Operating Area  
Fig 10. Max. Drain Current vs. Ambient Temperature  
2.5  
2
10  
Operation inThisArea  
isLimitedbyRDS(on)  
2.0  
1.5  
1.0  
0.5  
0.0  
10 s  
"
1
10  
100 s  
1ms  
"
10ms  
100ms  
0
10  
DC  
@Notes:  
-1  
10  
1. T = 25 oC  
A
2. T = 150 oC  
J
3. SinglePulse  
-2  
10  
-1  
0
1
2
25  
50  
75  
100  
125  
150  
10  
10  
10  
10  
o
V
DS , Drain-Source Voltage [V]  
T , Ambient Temperature [C]  
A
Fig 11. Thermal Response  
102  
101  
D=0.5  
0.2  
@ Notes :  
0.1  
1. Z!JA(t)=52 oC/W Max.  
2. Duty Factor, D=t1/t2  
3. TJM-TA=PDM*Z!JA(t)  
0.05  
0.02  
0.01  
100  
PDM  
t1  
t2  
single pulse  
10-4 10-3  
10-1  
10-5  
10-2  
10-1  
100  
101  
102  
103  
t1 , Square Wave Pulse Duration [sec]  
N-CHANNEL  
POWER MOSFET  
IRFM120A  
Fig 12. Gate Charge Test Circuit & Waveform  
* Current Regulator ”  
VGS  
Same Type  
as DUT  
50K!  
Qg  
12V  
200nF  
10V  
300nF  
VDS  
Qgs  
Qgd  
VGS  
DUT  
R2  
3mA  
R1  
Charge  
Current Sampling (IG) Current Sampling (ID)  
Resistor  
Resistor  
Fig 13. Resistive Switching Test Circuit & Waveforms  
RL  
Vout  
Vin  
Vout  
90%  
VDD  
( 0.5 rated VDS  
)
RG  
DUT  
10%  
Vin  
10V  
td(on)  
tr  
td(off)  
tf  
t on  
t off  
Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms  
BVDSS  
--------------------  
BVDSS -- VDD  
1
2
2
LL  
ID  
----  
EAS  
=
LL IAS  
VDS  
BVDSS  
IAS  
Vary tp to obtain  
required peak ID  
RG  
ID (t)  
C
VDD  
DUT  
VDD  
VDS (t)  
10V  
t p  
t p  
Time  
N-CHANNEL  
POWER MOSFET  
IRFM120A  
Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms  
+
DUT  
VDS  
--  
I S  
L
Driver  
VGS  
Same Type  
as DUT  
RG  
VDD  
VGS  
• dv/dt controlled by /G  
• IS controlled by Duty Factor 0?  
Gate Pulse Width  
--------------------------  
VGS  
D =  
Gate Pulse Period  
10V  
( Driver )  
IFM , Body Diode Forward Current  
I S  
di/dt  
( DUT )  
IRM  
Body Diode Reverse Current  
Body Diode Recovery dv/dt  
Vf  
VDS  
( DUT )  
VDD  
Body Diode  
Forward Voltage Drop  
TRADEMARKS  
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is  
not intended to be an exhaustive list of all such trademarks.  
ACEx™  
PACMAN™  
POP™  
Power247™  
PowerTrench  
QFET™  
QS™  
SPM™  
Stealth™  
SuperSOT™-3  
SuperSOT™-6  
SuperSOT™-8  
SyncFET™  
ImpliedDisconnect™  
ISOPLANAR™  
LittleFET™  
MicroFET™  
MicroPak™  
MICROWIRE™  
MSX™  
FACT™  
ActiveArray™  
Bottomless™  
CoolFET™  
CROSSVOLT™  
DOME™  
EcoSPARK™  
E2CMOSTM  
EnSignaTM  
FACT Quiet Series™  
â
FAST  
â
FASTr™  
FRFET™  
GlobalOptoisolator™  
GTO™  
HiSeC™  
I2C™  
QT Optoelectronics™ TinyLogic™  
Quiet Series™  
RapidConfigure™  
RapidConnect™  
TruTranslation™  
UHC™  
UltraFET  
MSXPro™  
OCX™  
â
OCXPro™  
OPTOLOGIC  
Across the board. Around the world.™  
The Power Franchise™  
ProgrammableActive Droop™  
â
â
SILENT SWITCHER VCX™  
SMARTSTART™  
OPTOPLANAR™  
DISCLAIMER  
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER  
NOTICE TOANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD  
DOES NOTASSUMEANY LIABILITYARISING OUT OF THEAPPLICATION OR USE OFANY PRODUCT  
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT  
RIGHTS, NOR THE RIGHTS OF OTHERS.  
LIFE SUPPORT POLICY  
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT  
DEVICES OR SYSTEMS WITHOUTTHE EXPRESS WRITTENAPPROVALOF FAIRCHILD SEMICONDUCTOR CORPORATION.  
As used herein:  
1. Life support devices or systems are devices or  
systems which, (a) are intended for surgical implant into  
the body, or (b) support or sustain life, or (c) whose  
failure to perform when properly used in accordance  
with instructions for use provided in the labeling, can be  
reasonably expected to result in significant injury to the  
user.  
2. A critical component is any component of a life  
support device or system whose failure to perform can  
be reasonably expected to cause the failure of the life  
support device or system, or to affect its safety or  
effectiveness.  
PRODUCT STATUS DEFINITIONS  
Definition of Terms  
Datasheet Identification  
Product Status  
Definition  
Advance Information  
Formative or  
In Design  
This datasheet contains the design specifications for  
product development. Specifications may change in  
any manner without notice.  
Preliminary  
First Production  
This datasheet contains preliminary data, and  
supplementary data will be published at a later date.  
Fairchild Semiconductor reserves the right to make  
changes at any time without notice in order to improve  
design.  
No Identification Needed  
Obsolete  
Full Production  
This datasheet contains final specifications. Fairchild  
Semiconductor reserves the right to make changes at  
any time without notice in order to improve design.  
Not In Production  
This datasheet contains specifications on a product  
that has been discontinued by Fairchild semiconductor.  
The datasheet is printed for reference information only.  
Rev. I1  

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