IRLW640ATM [FAIRCHILD]
Power Field-Effect Transistor, 18A I(D), 200V, 0.18ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, TO-263AB, D2PAK-3;型号: | IRLW640ATM |
厂家: | FAIRCHILD SEMICONDUCTOR |
描述: | Power Field-Effect Transistor, 18A I(D), 200V, 0.18ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, TO-263AB, D2PAK-3 开关 脉冲 晶体管 |
文件: | 总8页 (文件大小:257K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
IRLW/I640A
FEATURES
BVDSS = 200 V
RDS(on) = 0.18Ω
ID = 18 A
Avalanche Rugged Technology
Rugged Gate Oxide Technology
Lower Input Capacitance
♦
♦
♦
♦
♦
♦
♦
♦
Improved Gate Charge
Extended Safe Operating Area
D2-PAK
I2-PAK
150 C Operating Temperature
°
2
Lower Leakage Current: 10 A (Max.) @ VDS = 200V
µ
Lower RDS(ON): 0.145 (Typ.)
Ω
1
1
2
3
3
1. Gate 2. Drain 3. Source
Absolute Maximum Ratings
Symbol
Characteristic
Value
200
18
Units
VDSS
Drain-to-Source Voltage
V
Continuous Drain Current (TC=25°C)
Continuous Drain Current (TC=100°C)
Drain Current-Pulsed
ID
A
11.4
63
IDM
VGS
EAS
IAR
(1)
A
V
Gate-to-Source Voltage
20
±
(2)
(1)
(1)
(3)
Single Pulsed Avalanche Energy
Avalanche Current
64
mJ
A
18
11
EAR
dv/dt
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
mJ
V/ns
W
5
*
Total Power Dissipation (TA=25°C)
Total Power Dissipation (TC=25°C)
Linear Derating Factor
3.1
110
0.88
PD
W
W/°C
Operating Junction and
TJ , TSTG
- 55 to +150
300
Storage Temperature Range
°C
Maximum Lead Temp. for Soldering
Purposes, 1/8 from case for 5-seconds
TL
Thermal Resistance
Symbol
RθJC
Characteristic
Typ.
Max.
Units
Junction-to-Case
--
--
--
1.14
40
RθJA
*
Junction-to-Ambient
Junction-to-Ambient
°C/W
RθJA
62.5
When mounted on the minimum pad size recommended (PCB Mount).
*
Rev. B
©1999 Fairchild Semiconductor Corporation
1
IRLW/I640A
Electrical Characteristics (TC=25°C unless otherwise specified)
Symbol
BVDSS
Characteristic
Min. Typ. Max. Units
Test Condition
V
GS=0V,ID=250µA
V
Drain-Source Breakdown Voltage
Breakdown Voltage Temp. Coeff.
Gate Threshold Voltage
200 --
--
∆BV/∆TJ
VGS(th)
ID=250µA
See Fig 7
VDS=5V,ID=250µA
GS=20V
VGS=-20V
V/°C
-- 0.17 --
V
1.0
--
--
2.0
100
V
Gate-Source Leakage , Forward
Gate-Source Leakage , Reverse
--
--
--
--
IGSS
nA
-- -100
V
V
DS=200V
--
--
10
IDSS
Drain-to-Source Leakage Current
µA
DS=160V,TC=125°C
100
Static Drain-Source
On-State Resistance
Forward Transconductance
Input Capacitance
RDS(on)
VGS=5V,ID=9A
VDS=40V,ID=9A
(4)
(4)
--
--
0.18
Ω
Ω
gfs
Ciss
Coss
Crss
td(on)
tr
--
--
--
--
--
--
--
--
--
--
--
13.3 --
1310 1705
V
GS=0V,VDS=25V,f =1MHz
See Fig 5
Output Capacitance
Reverse Transfer Capacitance
Turn-On Delay Time
Rise Time
250
120
30
25
100
40
56
--
200
95
pF
ns
11
VDD=100V,ID=18A,
RG=4.6Ω
8
td(off)
tf
Turn-Off Delay Time
Fall Time
46
(4) (5)
(4) (5)
See Fig 13
15
Qg
Total Gate Charge
Gate-Source Charge
Gate-Drain( Miller ) Charge
40
VDS=160V,VGS=5V,
ID=18A
Qgs
Qgd
nC
6.8
18.6
--
See Fig 6 & Fig 12
Source-Drain Diode Ratings and Characteristics
Symbol
IS
Characteristic
Continuous Source Current
Pulsed-Source Current
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
Min. Typ. Max. Units
Test Condition
Integral reverse pn-diode
in the MOSFET
--
--
--
--
--
--
18
63
1.5
--
A
ISM
(1)
(4)
VSD
trr
V
--
TJ=25°C,IS=18A,VGS=0V
TJ=25°C,IF=18A
ns
µC
224
Qrr
-- 1.55 --
(4)
diF/dt=100A/µs
Notes;
(1) Repetitive Rating: Pulse Width Limited by Maximum Junction Temperature
(2) L=0.3mH, IAS=18A, VDD=50V, R =27 , Starting T =25 C
Ω
°
G
J
(3) ISD 18A, di/dt 260A/ s, V
BV
, Starting T =25 C
°
DSS J
≤
≤
µ
≤
DD
(4) Pulse Test: Pulse Width = 250 s, Duty Cycle 2%
µ
≤
(5) Essentially Independent of Operating Temperature
2
IRLW/I640A
Fig 1. Output Characteristics
Fig 2. Transfer Characteristics
V
GS
Top :
7.0V
6.0V
5.5V
5.0V
4.5V
4.0V
3.5V
1
10
1
10
150 oC
Bottom : 3.0V
0
10
25oC
@ Notes:
1. VGS =0 V
@ Notes:
2. VDS =40 V
- 55 oC
0
10
1. 250 s PulseTest
µ
3. 250 s PulseTest
µ
2. T =25 oC
C
-1
10
-1
0
1
0
2
4
6
8
10
10
10
10
V , Drain-Source Voltage [V]
V , Gate-Source Voltage [V]
DS
GS
Fig 3. On-Resistance vs. Drain Current
Fig 4. Source-Drain Diode Forward Voltage
0.4
0.3
0.2
0.1
0.0
VGS =5V
1
10
0
10
VGS =10V
@ Notes:
1. VGS =0 V
150oC
@Note:T =25oC
25oC
2. 250µs PulseTest
J
-1
0.4
10
0
20
40
60
80
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
I , Drain Current [A]
VSD , Source-Drain Voltage [V]
D
Fig 5. Capacitance vs. Drain-Source Voltage
Fig 6. Gate Charge vs. Gate-Source Voltage
2000
1600
1200
800
C
iss=C +Cgd (C =shorted)
gs ds
C
oss=C +C
ds gd
6
Ciss
Crss=C
V
DS =40 V
DS =100 V
DS =160 V
gd
V
V
4
2
0
Coss
@Notes:
1. VGS =0V
2. f=1MHz
Crss
400
@ Notes: I =18 A
D
00
10
1
0
10
20
30
40
10
Q , Total Gate Charge [nC]
VDS , Drain-Source Voltage [V]
G
3
IRLW/I640A
Fig 7. Breakdown Voltage vs. Temperature
Fig 8. On-Resistance vs. Temperature
2.0
1.5
1.0
0.5
0.0
1.2
1.1
1.0
@Notes:
1.VGS =5V
0.9
@ Notes:
1. VGS =0 V
2.I =9A
D
2. I =250 µA
D
-75 -50 -25
0
25
50
75
100 125 150 175
o
0.8
-75 -50 -25
0
25
50
75
100 125 150 175
o
T , Junction Temperature [C]
J
T , Junction Temperature [C]
J
Fig 9. Max. Safe Operating Area
Fig 10. Max. Drain Current vs. Case Temperature
20
Operation in This Area
isLimited byR DS(on)
2
10
15
10
5
100 µs
1 ms
1
10
10ms
DC
@ Notes:
0
1. T =25 oC
10
C
2. T =150 oC
J
3. Single Pulse
-1
0
10
0
1
2
25
50
75
100
125
150
10
10
10
o
T , Case Temperature [C]
VDS , Drain-Source Voltage [V]
c
Fig 11. Thermal Response
100
10-1
10-2
D=0.5
0.2
@ Notes :
1. Z JC(t)=1.14 oC/W Max.
θ
2. Duty Factor, D=t1/t2
0.1
3. TJM-TC=PDM*Z JC(t)
θ
0.05
PDM
0.02
0.01
t1
t2
single pulse
10-5
10-4
10-3
10-2
10-1
100
101
t1 , Square Wave Pulse Duration [sec]
4
IRLW/I640A
Fig 12. Gate Charge Test Circuit & Waveform
Current Regulator
VGS
Same Type
as DUT
50k
Ω
Qg
200nF
12V
5V
300nF
VDS
Qgs
Qgd
VGS
DUT
R2
3mA
R1
Charge
Current Sampling (IG) Current Sampling (ID)
Resistor Resistor
Fig 13. Resistive Switching Test Circuit & Waveforms
RL
Vout
Vin
Vout
90%
VDD
( 0.5 rated VDS
)
RG
DUT
10%
Vin
5V
td(on)
tr
td(off)
tf
t on
t off
Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms
BVDSS
1
2
2
LL
ID
----
--------------------
EAS
=
LL IAS
BVDSS -- VDD
VDS
BVDSS
IAS
Vary tp to obtain
required peak ID
RG
ID (t)
VDD
C
DUT
VDS (t)
VDD
5V
t p
t p
Time
5
IRLW/I640A
Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms
+
DUT
VDS
--
I S
L
Driver
VGS
Same Type
as DUT
RG
VDD
VGS
dv/dt controlled by RG
IS controlled by Duty Factor
D
Gate Pulse Width
--------------------------
VGS
D =
Gate Pulse Period
5V
( Driver )
IFM , Body Diode Forward Current
I S
di/dt
( DUT )
IRM
Body Diode Reverse Current
Body Diode Recovery dv/dt
Vf
VDS
( DUT )
VDD
Body Diode
Forward Voltage Drop
6
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DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.
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FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or
systems which, (a) are intended for surgical implant into
the body, or (b) support or sustain life, or (c) whose
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
reasonably expected to result in significant injury to the
user.
2. A critical component is any component of a life
support device or system whose failure to perform can
be reasonably expected to cause the failure of the life
support device or system, or to affect its safety or
effectiveness.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative or
In Design
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
Preliminary
First Production
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
No Identification Needed
Obsolete
Full Production
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
Not In Production
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
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Avalanche Rugged Technology
Rugged Gate Oxide Technology
Lower Input Capacitance
Quality and reliability
This pagePrint version
Improved Gate Charge
Design tools
Extended Safe Operating Area
150ºC Operating Temperature
Lower Leakage Current: 10µA (Max.)
@ V = 200V
DS
●
Lower R
: 0.609Ω (Typ.)
DS(ON)
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IRLW640ATM
$0.96 TO-263(D2PAK)
2
TAPE REEL
* 1,000 piece Budgetary Pricing
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