KA7633 [FAIRCHILD]
Fixed Multi-output Regulator; 固定式多路输出调节器
| 型号： | KA7633 |
| 厂家： | 
FAIRCHILD SEMICONDUCTOR |
| 描述： | Fixed Multi-output Regulator |
| 文件： | 总8页 (文件大小：104K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
www.fairchildsemi.com
KA7632/KA7633
Fixed Multi-output Regulator
Features
Description
• Output Currents up to 0.5A (output1 & 2)
• Output Current up to 1A with External Transistor
(output3)
• Fixed Precision Output 1 voltage 3.3V ± 2%
• Fixed Precision Output 2 voltage 8V ± 2% (KA7632)
• Fixed Precision Output 2 voltage 9V ± 2% (KA7633)
• Control Signal Generator for Output 3 voltage (5.1V ± 2%)
• Reset Facility for Output Voltage1
The KA7632/KA7633 is a multi-output positive voltage
regulator designed to provide fixed precision output voltages
of 3.3V, 8V (KA7632) / 9V (KA7633) at current up to 0.5A
and 5.1V at current up to 1A with external PNP transistor.
An internal reset circuit generates a reset pulse when the
output 1 decrease below the regulated value. Output2 & 3
can be disabled by TTL input. Protection features include
over voltage protection, short circuit protection and thermal
shutdown.
• Output 2,3 with Disable by TTL Input
• Current Limit Protection at Each Output
• Thermal Shut Down
10-SIP H/S
Internal Block Diagram
Vin1
1
Vin2
2
Vin1
OVP
2.5V
Bandgap
Reference
+
-
10uA
DEL.CAP
3
Output1
9
SCP
Cd
100nF
-
+
6
-
RESET
Vsys
+
50mV
SW
Thermal
Shut Down
Vin2
OVP
10K
+
-
-
+
7
A614 "Y"
Output2
8
Control
SCP
+
-
SCP
10
Output3
Output
2,3
1.4V
5
4
GND
Disable
Rev. 1.0.1
©2001 Fairchild Semiconductor Corporation
KA7632/KA7633
Absolute Maximum Ratings
Parameter
Symbol
Vin
Value
20
Unit
V
Remark
DC Input Voltage
Disable Input Voltage
Output Current
-
Vc
20
V
-
Io
0.5
A
-
Power Dissipation
Junction Temperature
Operating Temperature
Pd
1.5
W
°C
°C
No Heatsink
Tj
+150
0~+125
-
-
Topr
Electrical Characteristics(KA7632)
(Refer to test circuit Vin1=6V ,Vin2=10.5V ,Tj = +25 °C, unless otherwise specified)
Parameter
Output Voltage 1
Symbol
Conditions
Io1=10mA
6V<Vin1<14V
Min.
Typ.
Max.
Unit
3.22
3.14
3.3
3.3
3.38
3.46
Vo1
V
5mA<Io1<500mA
Io2=10mA
10.5V<Vin2<18V
5mA<Io2<500mA
7.84
7.7
8
8
8.16
8.3
Output Voltage 2
Vo2
V
V
Dropout Output Voltage 1,2
Line Regulation 1,2
Vd1,2
Io1,2=500mA
6V <Vin1<14V
-
-
-
-
2.5
40
80
∆Vo 1,2 10.5V <Vin2<18V
mV
Io1,2 = 200mA
5mA < Io1< 500mA
∆Vo 1,2
70
160
Load Regulation 1,2
-
-
mV
5mA <Io2< 500mA
Output Voltage 3
Line Regulation 3
Load Regulation 3
Reset Pulse Delay
Vo3
∆Vo3
∆Vo3
Trd
Vsys=7V, Io3=100mA
13V< Vin2 <18V, Io3 =100mA
5mA < Io3 < 1A
4.97
5.1
-
5.23
50
V
-
-
-
mV
mV
ms
-
110
-
Cd=100nF, Note1
25
Saturation Voltage in Reset
Condition
VrL
I6=5mA
-
-
0.4
V
Leakage Current at Pin 6
Output Voltage Thermal Drift
Short Circuit Output Current
Disable Voltage High
IrH
STt
V6=10V
-
-
10
µA
0 °C <Tj < +125 °C , Note 2
Vin1=6V ,Vin2 =10.5V
Output 2 Active
Output 2 Disabled
0V < Vdis < 7V
Note 2
-
100
-
ppm/°C
A
Isc1,2
VdisH
VdisL
Idis
-
-
1.6
2
-
V
Disable Voltage Low
-
-
0.8
2
V
Disable Bias Current
-100
-
145
-
µA
°C
Junction Temperature for TSD
Quiescent Current
Ttsd
Iq
-
-
-
Io1=10mA, Output2 Disabled
K=Vo1
2
mA
V
Reset Threshold Voltage
Reset Threshold Hysteresis
Vr
K-0.4 K-0.25 K-0.1
20 50 100
Vrth
Note 1
mA
Notes:
1. To check the reset circuit ,the reset output is low to discharge the delay capacitor(=Cd). if it’s less than Vo1-0.25V. And the
reset output is high when the delay capacitor voltage linearly increased by the interal current source(10µA) if it’s more than
Vo1- 0.2V. The equations of delay time is same as below. Trd = (Cd × 2.5) / 10µA
2. These parameters, although guaranteed, are not 100% tested in production.
2
KA7632/KA7633
Electrical Characteristics(KA7633)
(Refer to test circuit Vin1=6V ,Vin2=11.5V ,Tj = +25 °C, unless otherwise specified)
Parameter
Output Voltage 1
Symbol
Conditions
Io1=10mA
6V<Vin1<14V
Min.
Typ.
Max.
Unit
3.22
3.14
3.3
3.3
3.38
3.46
Vo1
V
5mA<Io1<500mA
Io2=10mA
11.5V<Vin2<18V
5mA<Io2<500mA
8.82
8.65
9
9
9.18
9.35
Output Voltage 2
Vo2
V
V
Dropout Output Voltage 1,2
Line Regulation 1,2
Vd1,2
Io1,2=500mA
6V <Vin1<14V
-
-
-
-
2.5
40
80
∆Vo 1,2 11.5V <Vin2<18V
mV
Io1,2 = 200mA
5mA < Io1< 500mA
∆Vo 1,2
70
160
Load Regulation 1,2
-
-
mV
5mA <Io2< 500mA
Output Voltage 3
Line Regulation 3
Load Regulation 3
Reset Pulse Delay
Vo3
∆Vo3
∆Vo3
Trd
Vsys=7V, Io3=100mA
13V< Vin2 <18V, Io3 =100mA
5mA < Io3 < 1A
4.97
5.1
-
5.23
50
V
-
-
-
mV
mV
ms
-
110
-
Cd=100nF, Note1
25
Saturation Voltage in Reset
Condition
VrL
I6=5mA
-
-
0.4
V
Leakage Current at Pin 6
Output Voltage Thermal Drift
Short Circuit Output Current
Disable Voltage High
IrH
STt
V6=10V
-
-
10
-
µA
ppm/°C
A
0 °C <Tj < +125 °C , Note 2
Vin1=6V ,Vin2 =11.5V
Output 2 Active
Output 2 Disabled
0V < Vdis < 7V
Note 2
-
100
Isc1,2
VdisH
VdisL
Idis
-
-
1.6
2
-
V
Disable Voltage Low
-
-
0.8
2
V
Disable Bias Current
-100
-
145
-
µA
°C
Junction Temperature for TSD
Quiescent Current
Ttsd
Iq
-
-
-
Io1=10mA, Output2 Disabled
K=Vo1
2
mA
V
Reset Threshold Voltage
Reset Threshold Hysteresis
Vr
K-0.4 K-0.25 K-0.1
20 50 100
Vrth
Note 1
mA
Notes:
1. To check the reset circuit ,the reset output is low to discharge the delay capacitor(=Cd). if it’s less than Vo1-0.25V. And the
reset output is high when the delay capacitor voltage linearly increased by the interal current source(10µA) if it’s more than
Vo1- 0.2V. The equations of delay time is same as below. Trd = (Cd × 2.5) / 10µA
2. These parameters, although guaranteed, are not 100% tested in production.
3
KA7632/KA7633
Typical Perfomance Characteristics
2.0
7
TJ = 25oC
Io1 =10mA
6
5
1.6
1.2
0.8
0.4
0
4
3
2
TJ = 25oC
Io1 =10mA
6
7.5V<Vin1<14V
1
0
5mA<Io1<500mA
15
20
10
20
0
5
15
10
0
Input Voltage Vin (V)
5
Input Voltage Vin (V)
Figure 2. Output Voltage1 vs. Input Voltage
Figure 1. Quiescent Current vs. Input Voltage
14
12
10
8
14
12
10
8
6
6
TJ = 25oC
4
2
0
4
2
Io1 =10mA
2
10.5V<Vin1<18V
2
0
2
5mA<Io1<500mA
0
0.5
3
1
1.5
2
2.5
10
15
0
5
20
Disable Voltage(V)
Input voltage Vin (V)
Figure 4. Output Voltage vs. Disable Voltage High(Low)
Figure 3. Output Voltage2 vs. Input Voltage
5.105
5.10
40
30
20
5.095
5.09
5.085
5.08
10
0
5.075
5.07
75
-25
0
25
50
100 125
0
0.4
0.8
1.2
1.6
2.0
Temperature Tj(℃)
Disable Voltage(V)
Figure 6. Output Voltage1 vs. Temperature(Tj)
Figure 5. Disable Bias Current vs. Disable Voltage
4
KA7632/KA7633
Typical Perfomance Characteristics (continued)
8.07
8.06
8.05
8.04
8.03
8.02
8.01
8.00
75
-25
0
25
50
100 125 150
Temperature Tj(℃)
Figure 7. Output Voltage2 vs. Temperature(Tj)
5
KA7632/KA7633
Mechanical Dimensions
Package
Dimensions in millimeters
10-SIP H/S
3.25 ±0.20
0.128 ±0.008
#1
#10
1.00 ±0.20
0.039 ±0.008
8.90 ±0.20
7.00 ±0.30
0.350 ±0.008
0.276 ±0.012
13.65 ±0.30
0.537 ±0.012
16.80
0.661
MAX
6
KA7632/KA7633
Ordering Information
Product Number
KA7632
Package
Operating Temperature
10-SIP H/S
0°C to +125°C
KA7633
7
KA7632/KA7633
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY
PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY
LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER
DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES
OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR
CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the body,
or (b) support or sustain life, and (c) whose failure to
perform when properly used in accordance with
instructions for use provided in the labeling, can be
reasonably expected to result in a significant injury of the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be
reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
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8/1/01 0.0m 001
Stock#DSxxxxxxxx
2001 Fairchild Semiconductor Corporation
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