KA9268 [FAIRCHILD]
4-CH Motor Driver; 4 - CH电机驱动器型号: | KA9268 |
厂家: | FAIRCHILD SEMICONDUCTOR |
描述: | 4-CH Motor Driver |
文件: | 总13页 (文件大小:272K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
www.fairchildsemi.com
FAN8000D (KA9268D)
4-CH Motor Driver
Features
Description
• Built in 4-CH balanced transformerless(BTL) driver
• Output gain adjustable
• Built in normal OP-amp
The FAN8000D is a monolithic integrated circuit, suitable
for 4-CH motor driver which drives tracking actuator, focus
actuator, sled motor and tray motor of CD/CD-ROM/DVD
system.
• Built in mute function
• Built in level shift circuit
• Built in thermal shutdown function
• Operating range 4.5~13.2V
28-SSOPH-375
Target Application
Ordering Information
• Compact disk player
Device
Package
Operating Temp.
−40°C ~ +85°C
−40°C ~ +85°C
• Video compact disk player
• Digital Video Disk Player
• Car compact disk player
FAN8000D
28-SSOPH-375
FAN8000DTF 28-SSOPH-375
Rev. .1.0.1
February. 2000.
©2000 Fairchild Semiconductor International
1
FAN8000D (KA9268D)
Pin Assignments
FIN
(GND)
28
27
26
25
24
23
22
21
20
19
18
17
16
15
FAN8000D
1
2
3
4
5
6
7
8
9
10
11
12
13
14
FIN
(GND)
Pin Definitions
Pin Number
Pin Name
DO1.1
DO1.2
DI1.1
I/O
O
O
I
Pin Function Descrition
1
2
Drive output
Drive output
Drive input
Drive input
Regulator
3
4
DI1.2
I
5
REG
-
6
REO
O
I
Regulator output
Mute
7
MUTE
GND1
DI2.1
8
-
Ground 1
9
I
Drive input
Drive input
Drive output
Drive output
Ground 2
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
DI2.2
I
DO2.1
DO2.2
GND2
OPOUT
OPIN(−)
OPIN(+)
DO3.1
DO3.2
DI3.1
O
O
-
O
I
Op-amp output
Op-amp input (−)
Op-amp input (+)
Drive output
I
O
O
I
Drive output
Drive input
DI3.2
I
Drive input
V
V
-
Supply voltage
Supply voltage
2.5V bias voltage
Drive input
CC1
CC2
-
VREF
DI4.1
I
I
2
FAN8000D (KA9268D)
Pin Definitions (Continued)
Pin Number
Pin Name
DI4.2
I/O
I
Pin Function Descrition
25
26
27
28
Drive input
Drive output
Drive output
Ground 3
DO4.1
DO4.2
GND3
O
O
-
Internal Block Diagram
FIN
(GND)
28
27
26
+
25
24
23
22
21
20
19
18
+
17
16
15
10k
10k
−
−
−
TSD
Level
shift
Level
shift
10k
10k
−
−
−
−
−
Regulator
10k
10k
Mute
Level
shift
−
Level
shift
+
−
+
2
−
50k
10k
6
10k
10k
1
3
4
5
7
8
9
10
11
12
13
14
(GND)
FIN
3
FAN8000D (KA9268D)
Equivalent Circuits
Driver input
Driver output
VCC
10k
50
3
10
2.5V
11.8k
0.58k
19 25
1
2
11 12
17 18 26 27
20k
50
4
9
100
20 24
V
REF1
Regulator
Regulator output
VCC VCC
VCC
VCC
53k
23k
VCC
50
5
2k
2k
6
50
10k
10k
10k
Mute input
Bias input
VCC
100k
50
50k
23
50
7
50k
4
FAN8000D (KA9268D)
Equivalent Circuits (Continued)
Op amp output
Op amp input
VCC
VCC
VCC
VCC
VCC
15
16
50
50
50
50
14
50
4.8k
4.8k
Absolute Maximum Ratings ( Ta=25°C)
Parameter
Symbol
Value
18
Unit
V
Supply voltage
V
CC
Power dissipation
Operating temperature
Storage temperature
Maximum output current
Notes:
P
1.7note
−40 ~ +85
−55 ~ +150
1
W
D
T
OPR
°C
°C
A
T
STG
I
OMAX
1. When mounted on 76.2mm × 114mm × 1.57mm PCB (Phenolic resin material).
2. Power dissipation reduces 13.6mW / °C for using above Ta=25°C
3. Do not exceed Pd and SOA (Safe Operating Area).
Pd (mW)
3,000
2,000
1,000
0
0
25
50
75
100
125
150
175
Ambient temperature, Ta [°C]
Recommended Operating Condition ( Ta=25°C)
Parameter
Symbol
Value
4.5 ~ 13.2
Unit
Operating supply voltage
V
V
CC
5
FAN8000D (KA9268D)
Electrical Characteristics
(Unless otherwise specified, Ta = 25 °C, V
= 8V, RL=8Ω)
CC
REGULATOR CIRCUIT
Parameter
Regulator output voltage
Load regulation
Symbol
Conditions
I =100mA
Min.
4.75
Typ.
Max. Units
V
5
0
0
5.25
10.0
20.0
V
REG
L
∆V
I =0 ~ 200mA
L
−40.0
mV
mV
RL
Line regulation
∆V
I =200mA, V =6 ~ 9V −10.0
L CC
CC
DRIVE CIRCUIT
Parameter
Quiescent circuit current
Input offset voltage
Symbol
Conditions
Min.
5.5
Typ.
9.5
0
Max. Units
I
V =0
13.5
mA
mV
CCQ
I
V
-
-
−5.0
−30
0.5
5.0
OF
Output offset voltage
Maximum sink current
Maximum source current
Maximum output voltage
Closed loop voltage gain
Ripple rejection ratio
Slew rate
V
0
30
OO
I
R =4Ω, V
CC
0.8
0.8
3.0
12.0
80.0
2.0
-
A
SINK
L
I
R =4Ω, GND
0.5
-
SOURCE
L
V
V =2V
I
, 1kHz
RMS
2.5
-
V
OM
A
VF
V =0.1V
RMS
, 1kHz
10.5
60.0
1.0
13.5
dB
I
RR
SR
V =−20dB, 120Hz
-
-
I
100Hz, Square wave
V / µs
OP AMP CIRCUIT
Parameter
Input offset voltage
Input bias current
Symbol
Conditions
Min.
−5
-
Typ.
-
Max. Units
V
-
+5
mA
nA
OF1
I
B1
-
-
300
High level output voltage
Low level output voltage
Output sink current
Output source current
Open loop voltage gain
Ripple rejection ratio
Slew Rate
V
-
6
-
-
V
OH1
V
-
-
-
1.8
V
OL1
I
RL=50Ω, GND
10
10
65
50
0.5
40
50
78
70
1
-
-
-
-
-
mA
mA
dB
SINK1
IS
RL=50Ω, V
OURCE1
CC
G
V =−75dB, f=1kHz
IN
V =−20dB, f=120kHz
VO1
RR1
SR1
dB
IN
Square, V
f=120kHz
=2Vp-p,
OUT
V / µs
Common mode rejection ratio
CMRR1
V =−20dB, f=1kHz
IN
70
84
-
dB
6
FAN8000D (KA9268D)
Application Information
1. MUTE
Pin #7
High
Mute circuit
Turn-off
Output driver
bias
7
Low
Turn-on
Open
Turn-on
• When the pin7 is open or the voltage of the pin7 is below 0.5V, the mute circuit is activated so that the output circuit is
muted.
• When the voltage of the pin7 is above 2V, the mute circuit is deactivated and the output circuit operates normally.
• If the chip temperature rises above 175°C, then the TSD (Thermal Shutdown) circuit is activated and the output circuit is
muted.
2. TSD (THERMAL SHUTDOWN)
V
REF BG
Output driver
bias
R11
R12
Q11
• The V
REF BG
is the output voltage of the band-gap-referenced biasing circuit and acts as the input voltage of the TSD
circuit.
• The base-emitter voltage of the TR, Q11 is designed to turn-on at below voltage.
= V × R12 / (R11 + R12) = 460mV
V
BE
REF BG
• When the chip temperature rises up to 175°C, then the turn-on voltage of the Q11 would drop down to 460mV.
(Hysteresis: 25°C)
Hence, the Q11 would turn on so the output circuit will be muted.
7
FAN8000D (KA9268D)
3. OP-AMP
OP-amp is integrated in the IC for user’s convenience.
AMP-I(+)
16 pin
+
14 pin
AMP-O
AMP -I(−)
15 pin
−
4. DRIVER
−∆I
Buffer
+
AMP
VREF
+
Level
shift
(2.5V)
−
−∆V
+∆V
−
Q1
Q3
Q2
Q4
3
10
M
19 25
1
2
10k
100
10k
11
17
27
12
18
26
Buffer
+∆I
4
9
24
20
+
−
• The voltage, V
, is the reference voltage given by the bias voltage of the pin23.
REF
•
The input signal through the pin3 is amplified by 10k/10k times and then fed to the level shift.
• The level shift produces the current due to the difference between the input signal and the arbitrary reference signal. The
current produced as +∆I and −∆I is fed into the driver buffer.
•
Driver Buffer drives the power TR of the output stage according to the input signal.
• The output stage is the BTL driver and the motor is rotating in forward direction by operating TR Q1 and TR Q4. On the
other hand, if TR Q2 and TR Q3 is operating, the motor is rotating in reverse direction
• When the input voltage through the pin3 is below the V
• When the input voltage through the pin3 is above the V
• To change the gain, pin4 or 24 can be used.
, the motor rotates in forward direction.
, the motor rotates in reverse direction.
REF
REF
5. Connect a by-pass capacitor, 0.1µF between the supply voltage source.
V
CC1
22
V
CC2 21
104
6. Radiation fin is connecting to the internal GND of the package.
Connect the fin to the external GND.
8
FAN8000D (KA9268D)
Typical Performance Characteristics
VCC vs. ICC
VCC vs. Imute
13.5
10
8
11.5
9.5
6
4
PIN23=2.5V
7.5
2
5.5
0
4
6
8
10
12
14
16
18
0
4
6
8
10
12
14
16
18
20
V
CC [V]
VCC [V]
VCC vs. Ireg
VCC vs. Isink
5.25
5.15
5.05
4.95
4.85
4.75
1300
1100
900
PIN23=2.5V
RL=4Ω
700
PIN23=2.5V
500
4
6
8
10
12
14
16
18
20
4
6
8
10
12
14
VCC [V]
VCC [V]
VCC vs. Isource
Temp. vs. Isink
1300
1250
1200
1150
1100
1050
1000
1400
1200
1000
800
PIN23=2.5V
RL=4Ω
PIN23=2.5V
RL=4Ω
600
400
4
6
8
10
12
14
-25
0
25
50
75
100
VCC [V]
Temp [°C]
9
FAN8000D (KA9268D)
Typical Performance Characteristics (Continued)
Temp vs. ICC
Temp vs. ICCM
6
5
4
3
2
1
0
13..5
11.5
9.5
7.5
VCC=13V
PIN23=2.5V
PIN23=2.5V
75 100
5.5
-25
0
25
50
-25
0
25
50
75
100
Temp [°C]
Temp [°C]
Temp vs. VREG
Temp vs. ISOURCE
1500
1400
1300
1200
1100
1000
5.25
5.15
5.05
4.95
4.85
4.75
PIN23=2.5V
RL=4Ω
VCC=13V
-25
0
25
50
75
100
-25
0
25
50
75
100
Temp [°C]
Temp [°C]
10
FAN8000D (KA9268D)
Test Circuits
50kΩ 50kΩ
OPI
+
470µF
1
0
2
1MΩ
PC-V
10µF
SW17
+
+
V
1000µF
3
2
10kΩ
SW16
1kΩ
SW14
SW15
10kΩ
1kΩ
0
0
1MΩ
Open
0
SW5
0
SW6
1
SW8
2
1
1
SW9
1
1
Short
2
2
2
OPIN(−)
15
16
14
13
12
11
10
9
OPOUT
4Ω
4Ω
4Ω
OPIN(+) GND2
V
V
DO2.2
DO3.1
17
SW7
8Ω
SW10
DO3.2
DO2.1
18
DR2
10µF
+
10µF
DI3.1
DI2.2
19
+
DI2.1
GND
20 DI3.2
DR3
21
VCC1 F
8
A
N
8
0
0
0
MUTE
1
SW4
V
CC
2
7
22
VCC2 DMUTE
100µF
+
23 Vref
6
5
2.5V
REO
DR4
IL
DI4.1
24
VREF
KS8772
10µF
Pin 21, 22
25
26
27
28
4
3
2
1
DI4.2
DI1.2
DI1.1
+
DR1
+
DO4.1
10µF
SW13
8Ω
DO4.2 DO1.2
8Ω
SW3
GND3
DO1.1
4Ω
4Ω
V
1
2
1
2
4Ω
4Ω
SW11
SW12
0
0
1
2
SW2
SW1
0
11
FAN8000D (KA9268D)
Application Circuits
15 OPIN(−)
14
13
12
OPOUT
GND2
OPIN(+)
DO3.1
DO3.2
16
17
18
19
20
21
DO2.2
SPINDLE
MOTOR
SLED MOTOR
DO2.1 11
SPINDLE
10
DI3.1
DI3.2
DI2.2
SERVO
F
A
N
8
DI2.1
GND
9
8
SLED
MUTE
VCC1
OFF: HIGH
ON: LOW
BIAS
V
CC
0
5V
VCC2
7
6
5
4
3
2
1
22
23
24
25
26
27
28
MUTE
REO
0
0
D
REG.OUT
Vref
TRACKING
VREF
DI1.2
DI4.1
DI4.2
KSB772
AMP
V
CC
FOCUS
DI1.1
DO1.2
DO1.1
DO4.1
DO4.2
GND3
TRACKING
ACTUATOR
FOCUS
ACTUATOR
12
FAN8000D (KA9268D)
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY
PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY
LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER
DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES
OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR
INTERNATIONAL. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the body,
or (b) support or sustain life, and (c) whose failure to
perform when properly used in accordance with
instructions for use provided in the labeling, can be
reasonably expected to result in a significant injury of the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be
reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
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12/1/00 0.0m 001
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2000 Fairchild Semiconductor International
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