KM4101IC8TR3

更新时间:2025-07-03 01:49:41
品牌:FAIRCHILD
描述:Low Cost, +2.7V and +5V, 260MHz Rail-to-Rail Amplifiers

KM4101IC8TR3 概述

Low Cost, +2.7V and +5V, 260MHz Rail-to-Rail Amplifiers 低成本, + 2.7V和+ 5V ,为260MHz ,轨到轨放大器 运算放大器

KM4101IC8TR3 规格参数

是否Rohs认证:不符合生命周期:Obsolete
零件包装代码:SOIC包装说明:SOIC-8
针数:8Reach Compliance Code:compliant
ECCN代码:EAR99HTS代码:8542.33.00.01
风险等级:5.61Is Samacsys:N
放大器类型:OPERATIONAL AMPLIFIER架构:VOLTAGE-FEEDBACK
最大平均偏置电流 (IIB):8 µA25C 时的最大偏置电流 (IIB):8 µA
标称共模抑制比:87 dB频率补偿:YES
最大输入失调电压:8000 µVJESD-30 代码:R-PDSO-G8
JESD-609代码:e0长度:4.9 mm
低-偏置:NO低-失调:NO
微功率:NO功能数量:1
端子数量:8最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装等效代码:SOP8,.25
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
包装方法:TAPE AND REEL峰值回流温度(摄氏度):NOT SPECIFIED
功率:NO电源:2.7/5 V
可编程功率:NO认证状态:Not Qualified
座面最大高度:1.75 mm标称压摆率:140 V/us
子类别:Operational Amplifiers最大压摆率:5.2 mA
供电电压上限:6 V标称供电电压 (Vsup):2.7 V
表面贴装:YES技术:BIPOLAR
温度等级:INDUSTRIAL端子面层:Tin/Lead (Sn/Pb)
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
标称均一增益带宽:86000 kHz最小电压增益:1780
宽带:YES宽度:3.9 mm
Base Number Matches:1

KM4101IC8TR3 数据手册

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www.fairchildsemi.com  
KM4100/KM4101  
Low Cost, +2.7V and +5V, 260MHz Rail-to-Rail Amplifiers  
Features  
General Description  
The KM4100 (single) and KM4101 (single with  
disable) are low cost, voltage feedback amplifiers.  
These amplifiers are designed to operate on +2.7V,  
+5V, or 2.5V supplies. The input voltage range  
extends 300mV below the negative rail and 1.2V  
below the positive rail.  
260MHz bandwidth  
Fully specified at +2.7V and +5V supplies  
Output voltage range:  
0.036V to 4.953V; V = +5; R = 2k  
s
L
Input voltage range: -0.3V to +3.8V; V = +5  
s
150V/µs slew rate  
4.2mA supply current  
Power down to I = 127µA (KM4101)  
60mA linear output current  
90mA output short circuit current  
Directly replaces AD8051 and LM7131 in single  
supply applications  
The KM4100 offers superior dynamic performance  
with a 260MHz small signal bandwidth and 150V/µs  
slew rate. The combination of low power, high  
output current drive, and rail-to-rail performance  
make the KM4100 well suited for battery-powered  
communication/computing systems.  
s
Small package options (SOT-23, SOIC)  
The combination of low cost and high performance  
make the KM4100 suitable for high volume applications  
in both consumer and industrial applications such as  
wireless phones, scanners, and color copiers.  
Applications  
A/D driver  
Active filters  
CCD imaging systems  
Output Swing  
CD/DVD ROM  
2.7  
Coaxial cable drivers  
High capacitive load driver  
Portable/battery-powered applications  
Twisted pair driver  
Video driver  
KM4100/KM4101 Packages  
V
R
= +2.7V  
= 2k  
s
SOT23-5 (KM4100)  
SOT23-6 (KM4101)  
L
G = -1  
0
Out  
-Vs  
+In  
1
2
3
5
+Vs Out  
-Vs  
1
2
3
6
5
4
+Vs  
DIS  
-In  
Time (0.5µs/div)  
-
-
4
-In  
+In  
SOIC (KM4100)  
SOIC (KM4101)  
NC  
-In  
1
8
7
6
5
NC  
+Vs  
Out  
NC  
NC  
-In  
1
8
7
6
5
DIS  
+Vs  
Out  
NC  
2
3
4
2
3
4
-
-
+
+
+In  
-Vs  
+In  
-Vs  
REV. 1A February 2001  
DATA SHEET  
KM4100/KM4101  
(V = +2.7V, G = 2, R = 2kto V /2; unless noted)  
KM4100/KM4101 Electrical Characteristics  
s
L
s
Parameters  
Conditions  
TYP  
Min & Max UNITS  
NOTES  
Case Temperature  
+25°C  
+25°C  
Frequency Domain Response  
-3dB bandwidth  
G = +1, V = 0.05Vpp  
o
215  
85  
MHz  
MHz  
MHz  
MHz  
1
G = +2, V = 0.2Vpp  
o
full power bandwidth  
gain bandwidth product  
G = +2, V = 2Vpp  
o
36  
86  
Time Domain Response  
rise and fall time  
settling time to 0.1%  
overshoot  
1
0.2V step  
3.7  
40  
9
ns  
ns  
1V step  
0.2V step,  
2.7V step, G = -1  
%
slew rate  
140  
V/µs  
Distortion and Noise Response  
2nd harmonic distortion  
3rd harmonic distortion  
THD  
input voltage noise  
input current noise  
1Vpp, 5MHz  
1Vpp, 5MHz  
1Vpp, 5MHz  
>1MHz  
86  
85  
76  
16  
1.3  
dBc  
dBc  
1
1
1
dB  
nV/Hz  
pA/Hz  
>1MHz  
DC Performance  
input offset voltage  
average drift  
-1.6  
10  
3
8
8
mV  
µV/°C  
µA  
2
2
input bias current  
average drift  
7
nA/°C  
µA  
input offset current  
power supply rejection ratio  
open loop gain  
0
1
52  
65  
5
2
2
2
2
2
DC  
57  
75  
3.9  
58  
dB  
dB  
quiescent current  
quiescent current (disabled)  
mA  
µA  
100  
Input Characteristics  
input resistance  
4.3  
1.5  
-0.3 to 1.5  
87  
MΩ  
pF  
V
input capacitance  
input common mode voltage range  
common mode rejection ratio  
DC, Vcm = 0V to Vs - 1.5  
72  
dB  
2
Disable Characteristics (KM4101)  
turn on time  
150  
25  
75  
ns  
ns  
dB  
turn off time  
off isolation  
5MHz, RL = 100Ω  
Output Characteristics  
output voltage swing  
RL = 10kto Vs/2  
RL = 2kto Vs/2  
RL = 150to Vs/2  
0.023 to 2.66  
V
V
0.025 to 2.653 0.1 to 2.6  
2
2
0.065 to 2.55 0.3 to 2.325  
V
linear output current  
60  
55  
90  
mA  
mA  
mA  
V
-40°C to +85°C  
short circuit output current  
power supply operating range  
2.7  
2.5 to 5.5  
Min/max ratings are based on product characterization and simulation. Individual parameters are tested as noted. Outgoing quality levels  
are determined from tested parameters.  
NOTES:  
1) R = 1kwas used used for optimal performance. (For G = +1, R = 0)  
f
f
2) 100% tested at +25°C.  
Absolute Maximum Ratings  
Package Thermal Resistance  
Package  
θ
JA  
supply voltage  
0 to +6V  
+175°C  
-65°C to +150°C  
+300°C  
maximum junction temperature  
storage temperature range  
lead temperature (10 sec)  
5 lead SOT23  
6 lead SOT23  
8 lead SOIC  
256°C/W  
230°C/W  
152°C/W  
operating temperature range (recommended) -40°C to +85°C  
input voltage range  
+Vs +0.5V; -Vs -0.5V  
internal power dissipation  
see power derating curves  
2
REV. 1A February 2001  
KM4100/KM4101  
DATA SHEET  
(V = +5V, G = 2, R = 2kto V /2; unless noted)  
KM4100/KM4101 Electrical Characteristics  
s
L
s
Parameters  
Conditions  
TYP  
Min & Max UNITS  
NOTES  
Case Temperature  
+25°C  
+25°C  
Frequency Domain Response  
-3dB bandwidth  
G = +1, V = 0.05Vpp  
o
260  
90  
MHz  
MHz  
MHz  
MHz  
1
G = +2, V = 0.2Vpp  
o
full power bandwidth  
gain bandwidth product  
G = +2, V = 2Vpp  
o
40  
90  
Time Domain Response  
rise and fall time  
settling time to 0.1%  
overshoot  
1
0.2V step  
3.6  
40  
7
ns  
ns  
2V step  
0.2V step,  
5V step, G = -1  
%
slew rate  
150  
V/µs  
Distortion and Noise Response  
2nd harmonic distortion  
3rd harmonic distortion  
THD  
input voltage noise  
input current noise  
2Vpp, 5MHz  
2Vpp, 5MHz  
2Vpp, 5MHz  
>1MHz  
70  
78  
68  
16  
1.3  
dBc  
dBc  
dB  
nV/Hz  
pA/Hz  
1
1
1
>1MHz  
DC Performance  
input offset voltage  
average drift  
1.4  
10  
3
8
8
mV  
µV/°C  
µA  
2
2
input bias current  
average drift  
7
nA/°C  
µA  
input offset current  
power supply rejection ratio  
open loop gain  
0
0.8  
52  
2
2
2
2
2
DC  
57  
78  
4.2  
127  
dB  
68  
dB  
quiescent current  
quiescent current (disabled)  
5.2  
170  
mA  
µA  
Input Characteristics  
input resistance  
4.3  
1.5  
-0.3 to 3.8  
87  
MΩ  
pF  
V
input capacitance  
input common mode voltage range  
common mode rejection ratio  
DC, Vcm = 0V to Vs - 1.5  
72  
dB  
2
Disable Characteristics (KM4101)  
turn on time  
150  
25  
75  
ns  
ns  
dB  
turn off time  
off isolation  
5MHz, RL = 100Ω  
Output Characteristics  
output voltage swing  
RL = 10kto Vs/2  
RL = 2kto Vs/2  
RL = 150to Vs/2  
0.027 to 4.97  
V
V
0.036 to 4.953 0.1 to 4.9  
2
2
0.12 to 4.8  
0.3 to 4.625  
V
linear output current  
60  
55  
90  
5
mA  
mA  
mA  
V
-40°C to +85°C  
short circuit output current  
power supply operating range  
2.5 to 5.5  
Min/max ratings are based on product characterization and simulation. Individual parameters are tested as noted. Outgoing quality levels  
are determined from tested parameters.  
NOTES:  
1) R = 1kwas used used for optimal performance. (For G = +1, R = 0)  
f
f
2) 100% tested at +25°C.  
REV. 1A February 2001  
3
DATA SHEET  
KM4100/KM4101  
(V = +5V, G = 2, R = 2k, R = 2kto V /2; unless noted)  
KM4100/KM4101 Performance Characteristics  
s
f
L
s
Non-Inverting Freq. Response V = +5V  
s
Inverting Freq. Response V = +5V  
s
G = -1  
G = 1  
f
G = -2 R = 2k  
f
R = 0  
R = 2kΩ  
f
G = 2  
R = 1kΩ  
f
G = -10  
f
G = 10  
f
R = 2kΩ  
R = 2kΩ  
G = 5  
G = -5  
R = 2kΩ  
f
R = 2kΩ  
f
0.1  
1
10  
100  
0.1  
1
10  
100  
Frequency (MHz)  
Frequency (MHz)  
Non-Inverting Freq. Response V = +2.7  
s
Inverting Freq. Response V = +2.7  
s
G = -1  
G = 1  
f
R = 2kΩ  
f
R = 0  
G = -2  
R = 2kΩ  
G = 2  
f
R = 1kΩ  
f
G = -10  
R = 2kΩ  
f
G = 10  
f
R = 2kΩ  
G = -5  
R = 2kΩ  
f
G = 5  
R = 2kΩ  
f
0.1  
1
10  
100  
0.1  
1
10  
100  
Frequency (MHz)  
Frequency (MHz)  
Frequency Response vs. C  
Large Signal Frequency Response  
L
C
= 100pF  
L
R
= 25Ω  
V
V
= 1V  
= 2V  
s
o
pp  
C
R
= 50pF  
L
= 33Ω  
s
o
pp  
C
R
= 20pF  
L
+
-
= 20Ω  
Rs  
s
CL RL  
1k  
C
= 10pF  
L
R
= 0Ω  
1kΩ  
s
0.1  
1
10  
100  
0.1  
1
10  
100  
Frequency (MHz)  
Frequency (MHz)  
Frequency Response vs. Temperature  
Input Voltage Noise  
100  
90  
80  
70  
60  
50  
40  
30  
20  
10  
0
1
10  
100  
1k  
10k  
100k  
1M  
Frequency (MHz)  
Frequency (Hz)  
4
REV. 1A February 2001  
KM4100/KM4101  
DATA SHEET  
(V = +5V, G = 2, R = 2k, R = 2kto V /2; unless noted)  
KM4100/KM4101 Performance Characteristics  
s
f
L
s
2nd & 3rd Harmonic Distortion; V = +5V  
2nd & 3rd Harmonic Distortion; V = +2.7V  
s
s
-20  
-30  
-40  
-50  
-60  
-70  
-80  
-90  
-20  
-30  
-40  
-50  
-60  
-70  
-80  
-90  
V
= 2V  
V = 1V  
o
o
pp  
pp  
R = 1kΩ  
R = 1kΩ  
3rd  
= 150Ω  
2nd  
= 150Ω  
f
f
R
R
L
L
3rd  
= 150Ω  
2nd  
= 150Ω  
R
L
R
L
2nd  
= 2kΩ  
2nd  
R
R
= 2kΩ  
L
L
3rd  
L
3rd  
L
R
= 2kΩ  
R
= 2kΩ  
0
5
10  
15  
0
5
10  
15  
20  
20  
Frequency (MHz)  
Frequency (MHz)  
2nd Harmonic Distortion vs. V  
3rd Harmonic Distortion vs. V  
o
o
-20  
-30  
-40  
-50  
-60  
-70  
-80  
-90  
-20  
-30  
-40  
-50  
-60  
-70  
-80  
-90  
R = 1kΩ  
f
R = 1kΩ  
f
20MHz  
10MHz  
20MHz  
10MHz  
5MHz  
5MHz  
0.5  
1.0  
1.5  
2.0  
0.5  
1.0  
1.5  
2.0  
2.5  
2.5  
100  
100  
Output Amplitude (V  
)
Output Amplitude (V )  
pp  
pp  
PSRR  
CMRR  
0
-10  
-20  
-30  
-40  
-50  
-60  
-70  
-40  
-50  
-60  
-70  
-80  
-90  
1k  
0.01  
0.1  
1
0.01  
0.1  
1.0  
10  
10  
100  
Frequency (MHz)  
Frequency (MHz)  
Open Loop Gain & Phase vs. Frequency  
Output Current  
80  
70  
60  
50  
40  
30  
20  
10  
0
0.8  
0.6  
0.4  
0.2  
0
|Gain|  
Linear output current +60mA  
Short circuit current +90mA  
0
-0.2  
-0.4  
Phase  
-45  
-90  
-135  
-180  
-0.6  
-0.8  
-10  
-20  
0.01  
0.1  
1
10  
100  
-100  
-50  
0
50  
Frequency (MHz)  
Output Current (mA)  
REV. 1A February 2001  
5
DATA SHEET  
KM4100/KM4101  
(V = +5V, G = 2, R = 2k, R = 2kto V /2; unless noted)  
KM4100/KM4101 Performance Characteristics  
s
f
L
s
Small Signal Pulse Response V = +5V  
s
Small Signal Pulse Response V = +2.7V  
s
R = 1k  
R = 1kΩ  
f
f
Time (20ns/div)  
Time (20ns/div)  
Large Signal Pulse Response V = +5V  
s
Output Swing  
2.7  
R = 1kΩ  
f
V
R
= +2.7V  
= 2kΩ  
s
L
G = -1  
0
Time (20ns/div)  
Time (0.5µs/div)  
Enable/Disable Response  
CMIR  
V
= 0.2V sinusoid  
pp  
in  
with 0.1V offset  
5V  
Disable  
Pulse  
0
0V  
Output  
Time (2µs/div)  
-1  
0
1
2
3
4
5
CMIR (1V/div)  
6
REV. 1A February 2001  
KM4100/KM4101  
DATA SHEET  
Frequency Reponse vs. R  
General Description  
f
The KM4100/KM4101 are single supply, general  
purpose, voltage-feedback amplifiers fabricated on a  
complementary bipolar process using a patent pending  
topology. They feature a rail-to-rail output stage and  
are unity gain stable. Both gain bandwidth and slew  
rate are insensitive to temperature.  
G = 2  
R
V
= 2kΩ  
= +5V  
L
s
R = 2kΩ  
f
R = 1kΩ  
f
The common mode input range extends to 300mV  
below ground and to 1.2V below V . Exceeding these  
s
values will not cause phase reversal. However, if the  
input voltage exceeds the rails by more than 0.5V, the  
input ESD devices will begin to conduct. The output  
will stay at the rail during this overdrive condition.  
1
10  
100  
Frequency (MHz)  
Figure 2: Frequency Response vs. R  
The design uses a Darlington output stage. The output  
stage is short circuit protected and offers soft”  
saturation protection that improves recovery time.  
f
Power Dissipation  
The maximum internal power dissipation allowed is  
directly related to the maximum junction temperature.  
If the maximum junction temperature exceeds 150°C,  
some reliability degradation will occur. If the maximum  
junction temperature exceeds 175°C for an extended  
time, device failure may occur.  
The typical circuit schematic is shown in Figure 1.  
+Vs  
6.8µF  
+
The KM4100/KM4101 are short circuit protected.  
However, this may not guarantee that the maximum  
junction temperature (+150°C) is not exceeded under  
all conditions. Follow the maximum power derating  
curves shown in Figure 3 to ensure proper operation.  
0.01µF  
In  
+
Out  
KM4100  
-
Maximum Power Dissipation  
Rf  
2.0  
Rg  
1.5  
SOIC-8 lead  
1.0  
SOT23-6 lead  
Figure 1: Typical Configuration  
SOT23-5 lead  
0.5  
At non-inverting gains other than G = +1, keep R  
g
below 1kto minimize peaking; thus, for optimum  
response at a gain of +2, a feedback resistor of 1kis  
recommended. Figure 2 illustrates the KM4100/  
KM4101 frequency response with both 1kand 2kΩ  
feedback resistors.  
0
-50  
-30  
-10  
10  
30  
50  
70  
90  
Ambient Temperature ( C)  
Figure 3: Power Derating Curves  
Overdrive Recovery  
Enable/Disable Function (KM4101)  
The KM4101 offers an active-low disable pin that can  
be used to lower its supply current. Leave the pin  
floating to enable the part. Pull the disable pin to the  
negative supply (which is ground in a single supply  
application) to disable the output. During the disable  
condition, the nominal supply current will drop to  
below 127µA and the output will be at high impedance  
with about 2pF capacitance.  
For an amplifier, an overdrive condition occurs when  
the output and/or input ranges are exceeded. The  
recovery time varies based on whether the input or  
output is overdriven and by how much the ranges are  
exceeded. The KM4100/KM4101 will typically recover  
in less than 20ns from an overdrive condition. Figure  
4 shows the KM4100 in an overdriven condition.  
REV. 1A February 2001  
7
DATA SHEET  
KM4100/KM4101  
Overdrive Recovery  
Refer to the evaluation board layouts shown in Figure  
7 for more information.  
R
V
= 2kΩ  
L
Input  
=2V  
in  
pp  
G = 5  
f
Evaluation Board Information  
R = 1kΩ  
The following evaluation boards are available to aid  
in the testing and layout of this device:  
Output  
Eval Board  
Description  
Single Channel,  
Products  
KEB002  
KM4100IT5,  
Dual Supply 5 & 6 lead SOT23 KM4101IT6  
KEB003  
Single Channel, Dual Supply KM4100IC8,  
8 lead SOIC  
KM4101IC8  
Time (20ns/div)  
Figure 4: Overdrive Recovery  
Evaluation board schematics and layouts are shown in  
Figure 6 and Figure 7.  
Driving Capacitive Loads  
The Frequency Response vs. C plot on page 4,  
illustrates the response of the KM4100 and KM4101. A  
The KEB002 and KEB003 evaluation boards are built  
for dual supply operation. Follow these steps to use  
the board in a single supply application:  
L
small series resistance (R ) at the output of the amplifier,  
s
illustrated in Figure 5, will improve stability and  
1.  
2.  
Short -V to ground  
Use C3 and C4, if the -V pin of the KM4100 or  
s
settling performance. R values in the Frequency  
s
s
Response vs. C plot were chosen to achieve maximum  
L
KM4101 is not directly connected to the  
ground plane.  
bandwidth with less than 1dB of peaking. For maximum  
flatness, use a larger R .  
s
+
Rs  
-
CL RL  
Rf  
Rg  
Figure 5: Typical Topology for driving  
a capacitive load  
Layout Considerations  
General layout and supply bypassing play major roles  
in high frequency performance. Fairchild has evaluation  
boards to use as a guide for high frequency layout  
and to aid in device testing and characterization.  
Follow the steps below as a basis for high frequency  
layout:  
Include 6.8µF and 0.01µF ceramic capacitors  
Place the 6.8µF capacitor within 0.75 inches  
of the power pin  
Place the 0.01µF capacitor within 0.1 inches  
Figure 6: Evaluation Board Schematic  
(SOIC pinout shown)  
of the power pin  
Remove the ground plane under and around the  
part, especially near the input and output pins to  
reduce parasitic capacitance  
Minimize all trace lengths to reduce  
series inductances  
8
REV. 1A February 2001  
KM4100/KM4101  
DATA SHEET  
KM4100/KM4101 Evaluation Board Layout  
Figure 7a: KEB002 (top side)  
Figure 7b: KEB002 (bottom side)  
Figure 7c: KEB003 (top side)  
Figure 7d: KEB003 (bottom side)  
REV. 1A February 2001  
9
DATA SHEET  
KM4100/KM4101  
KM4100/KM4101 Package Dimensions  
C
L
SOT23-5  
e
b
2
SYMBOL  
MIN  
0.90  
0.00  
0.90  
0.25  
0.09  
2.80  
2.60  
1.50  
0.35  
MAX  
1.45  
0.15  
1.30  
0.50  
0.20  
3.10  
3.00  
1.75  
0.55  
A
A1  
A2  
b
C
D
E
E1  
L
C
C
L
E
L
E1  
e1  
D
e
e1  
α
0.95 ref  
1.90 ref  
α
C
0
10  
C
L
NOTE:  
1. All dimensions are in millimeters.  
Foot length measured reference to flat  
foot surface parallel to DATUM ’A’ and lead surface.  
2
A
A2  
3. Package outline exclusive of mold flash & metal burr.  
4. Package outline inclusive of solder plating.  
5. Comply to EIAJ SC74A.  
A1  
6. Package ST 0003 REV A supercedes SOT-D-2005 REV C.  
C
L
e
SOT23-6  
b
2
SYMBOL  
MIN  
0.90  
0.00  
0.90  
0.25  
0.09  
2.80  
2.60  
1.50  
0.35  
MAX  
1.45  
0.15  
1.30  
0.50  
0.20  
3.10  
3.00  
1.75  
0.55  
A
A1  
C
L
C
L
A2  
b
C
D
E
E
E1  
E1  
L
e1  
D
e
e1  
α
0.95 ref  
1.90 ref  
α
C
0
10  
C
L
NOTE:  
1. All dimensions are in millimeters.  
2
Foot length measured reference to flat  
foot surface parallel to DATUM Aand lead surface.  
A
A2  
3. Package outline exclusive of mold flash & metal burr.  
4. Package outline inclusive of solder plating.  
5. Comply to EIAJ SC74A.  
A1  
6. Package ST 0004 REV A supercedes SOT-D-2006 REV C.  
SOIC-8  
MIN  
SOIC  
SYMBOL  
MAX  
0.25  
0.46  
0.25  
4.98  
3.99  
A1  
B
C
D
E
e
0.10  
0.36  
0.19  
4.80  
3.81  
1.27 BSC  
D
7¡  
e
ZD  
C
L
H
h
L
5.80  
0.25  
0.41  
1.52  
0
6.20  
0.50  
1.27  
1.72  
8
C
E
H
L
A
ZD  
A2  
0.53 ref  
1.37  
1.57  
Pin No. 1  
B
DETAIL-A  
L
NOTE:  
h x 45¡  
DETAIL-A  
1. All dimensions are in millimeters.  
2. Lead coplanarity should be 0 to 0.10mm (.004") max.  
3. Package surface finishing:  
A1  
A2  
α
A
(2.1) Top: matte (charmilles #18~30).  
(2.2) All sides: matte (charmilles #18~30).  
(2.3) Bottom: smooth or matte (charmilles #18~30).  
C
4. All dimensions excluding mold flashes and end flash  
from the package body shall not exceed o.152mm (.006)  
per side(d).  
10  
REV. 1A February 2001  
KM4100/KM4101  
DATA SHEET  
Ordering Information  
Model  
Part Number  
Package Container Pack Qty  
KM4100 KM4100IC8  
KM4100IC8TR3  
KM4100IT5  
SOIC-8  
SOIC-8  
Rail  
95  
Reel  
2500  
<3000  
3000  
95  
SOT23-5 Partial Reel  
KM4100IT5TR3  
KM4101 KM4101IC8  
KM4101IC8TR3  
KM4101IT6  
SOT23-5  
SOIC-8  
SOIC-8  
Reel  
Rail  
Reel  
2500  
<3000  
3000  
SOT23-6 Partial Reel  
SOT23-6 Reel  
KM4101IT6TR3  
Temperature range for all parts: -40°C to +85°C  
DISCLAIMER  
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICES TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD  
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT  
RIGHTS, NOR THE RIGHTS OF OTHERS.  
LIFE SUPPORT POLICY  
FAIRCHILDS PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT  
OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein:  
1.  
Life support devices or systems are devices or systems which, (a) are intended for  
surgical implant into the body, or (b) support or sustain life, and (c) whose failure to  
perform when properly used in accordance with instructions for use provided in the  
labeling, can be reasonably expected to result in a significant injury of the user.  
2.  
A critical component in any component of a life support device or system whose  
failure to perform can be reasonably expected to cause the failure of the life  
support device or system, or to affect its safety or effectiveness.  
www.fairchildsemi.com  
© 2001 Fairchild Semiconductor Corporation  

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