MM74C906M [FAIRCHILD]
Hex Open Drain N-Channel Buffers . Hex Open Drain P-Channel Buffers; 十六开漏N沟道缓冲器。六角漏极开路P沟道缓冲器
| 型号： | MM74C906M |
| 厂家： | 
FAIRCHILD SEMICONDUCTOR |
| 描述： | Hex Open Drain N-Channel Buffers . Hex Open Drain P-Channel Buffers |
| 文件： | 总5页 (文件大小：56K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
October 1987
Revised January 1999
MM74C906 • MM74C907
Hex Open Drain N-Channel Buffers •
Hex Open Drain P-Channel Buffers
All inputs are protected from static discharge by diode
clamps to VCC and to ground.
General Description
The MM74C906 and MM74C907 buffers employ monolithic
CMOS technology in achieving open drain outputs. The
MM74C906 consists of six inverters driving six N-channel
devices; and the MM74C907 consists of six inverters driv-
ing six P-channel devices. The open drain feature of these
buffers makes level shifting or wire AND and wire OR func-
tions by just the addition of pull-up or pull-down resistors.
Features
■ Wide supply voltage range: 3V to 15V
■ Guaranteed noise margin: 1V
■ High noise immunity: 0.45 VCC (typ.)
■ High current sourcing and sinking open drain outputs
Ordering Code:
Order Number Package Number
Package Description
MM74C906M
MM74C906N
MM74C907N
M14A
N14A
N14A
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150” Narrow
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagram
Logic Diagrams
Pin Assignments for DIP and SOIC
MM74C906
MM74C907
Top View
© 1999 Fairchild Semiconductor Corporation
DS005911.prf
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Operating VCC Range
Absolute Maximum VCC
Lead Temperature (TL)
(Soldering, 10 seconds)
3V to 15V
18V
Absolute Maximum Ratings(Note 1)
Voltage at Any Input Pin
Voltage at Any Output Pin
Operating Temperature Range
MM74C906/MM74C907
Storage Temperature Range
Power Dissipation
−0.3V to VCC +0.3V
260°C
−40°C to +85°C
−65°C to +150°C
Note 1: “Absolute Maximum Ratings” are those values beyond which the
safety of the device cannot be guaranteed. Except for “Operating Tempera-
ture Range” they are not meant to imply that the devices should be oper-
ated at these limits. The table of “Electrical Characteristics” provides
conditions for actual device operation.
Dual-In-Line
700 mW
500 mW
Small Outline
DC Electrical Characteristics
Min/Max limits apply across temperature range unless otherwise noted
Symbol
Parameter
Conditions
Min
Typ
Max
Units
CMOS TO CMOS
V
Logical “1” Input Voltage
V
V
V
V
V
V
V
= 5V
3.5
8.0
V
V
IN(1)
CC
CC
CC
CC
CC
CC
CC
= 10V
= 5V
V
Logical “0” Input Voltage
1.5
2
V
IN(0)
= 10V
V
I
I
I
Logical “1” Input Current
Logical “0” Input Current
Supply Current
= 15V, V = 15V
0.005
−0.005
0.05
1
µA
µA
µA
IN(1)
IN(0)
CC
IN
= 15V, V = 0V
−1.0
IN
= 15V, Output Open
15
5
Output Leakage
MM74C906
V
V
V
V
= 4.75V, V = V − 1.5V
0.005
0.005
µA
µA
CC
CC
CC
CC
IN
CC
= 4.75V, V
= 18V
OUT
MM74C907
= 4.75V, V = 1V + 0.1 V
5
IN
CC
= 4.75V, V
= V −18V
CC
OUT
CMOS/LPTTL INTERFACE
V
V
Logical “1” Input Voltage
Logical “0” Input Voltage
V
V
= 4.75V
= 4.75V
V − 1.5V
CC
V
V
IN(1)
IN(0)
CC
0.8
CC
OUTPUT DRIVE CURRENT
MM74C906
V
V
V
V
V
V
V
V
V
V
V
V
= 4.75V, V = 1V +0.1 V
IN CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
= 4.75V, V
= 4.75V, V
= 0.5V
= 1.0V
2.1
4.2
8.0
mA
mA
OUT
OUT
12.0
MM74C907
MM74C906
MM74C907
= 4.75V, V = V −1.5V
IN
CC
= 4.75V, V
= 4.75V, V
= V − 0.5V
−1.05
−2.1
−1.5
−3.0
mA
mA
OUT
OUT
CC
= V − 1V
CC
= 10V, V = 2V
IN
= 10V, V
= 10V, V
= 0.5V
= 1V
4.2
8.4
−20
−30
mA
mA
OUT
OUT
= 10V, V = 8V
IN
= 10V, V
= 10V, V
= 9.5V
= 9V
−2.1
−4.2
−4.0
−8.0
mA
mA
OUT
OUT
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2
AC Electrical Characteristics (Note 2)
TA = 25°C, CL = 50 pF, unless otherwise specified
Symbol
Parameter
Conditions
Min
Typ
Max
Units
t
Propagation Delay Time
to a Logical “0”
pd
MM74C906
V
V
V
V
= 5.0V, R = 10k
150
75
ns
ns
ns
ns
CC
CC
CC
CC
=10V, R = 10k
= 5.0V (Note 3)
= 10V (Note 3)
MM74C907
150 + 0.7 RC
75 + 0.7 RC
t
Propagation Delay Time
to a Logical “1”
pd
MM74C906
V
V
V
V
= 5.0V (Note 3)
= 10V (Note 3)
= 5.0V, R = 10k
= 10V, R = 10k
150 + 0.7 RC
75 + 0.7 RC
150
ns
ns
ns
ns
pF
pF
pF
CC
CC
CC
CC
MM74C907
75
C
C
C
Input Capacitance
(Note 4)
5.0
20
30
IN
Output Capacity
(Note 4)
OUT
PD
Power Dissipation Capacity
(Note 5) Per Buffer
Note 2: AC Parameters are guaranteed by DC correlated testing.
Note 3: “C” used in calculating propagation includes output load capacity (C ) plus device output capacity (C
).
OUT
L
Note 4: Capacitance is guaranteed by periodic testing.
Note 5: C
determines the no load AC power consumption of any CMOS device. For complete explanation see Family Characteristics Application Note,
PD
AN-90. (Assumes outputs are open).
Typical Applications
Wire OR Gate
Wire AND Gate
Note: Can be extended to more than 2 inputs.
Note: Can be extended to more than 2 inputs.
CMOS or TTL to PMOS Interface
CMOS or TTL to CMOS at a Higher VCC
Note: V + V ≤ 18V
CC
DD
V
≤ 15V
CC
3
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Physical Dimensions inches (millimeters) unless otherwise noted
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150” Narrow
Package Number M14A
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4
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
Package Number N14A
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be rea-
sonably expected to result in a significant injury to the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be rea-
sonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
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Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications.
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