MM74C93 [FAIRCHILD]
4-Bit Decade Counter 4-Bit Binary Counter; 4位十进制计数器4位二进制计数器型号: | MM74C93 |
厂家: | FAIRCHILD SEMICONDUCTOR |
描述: | 4-Bit Decade Counter 4-Bit Binary Counter |
文件: | 总7页 (文件大小:57K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
October 1987
Revised January 1999
MM74C90 • MM74C93
4-Bit Decade Counter • 4-Bit Binary Counter
to operate it as a divide-by-2, -8, or -16 divider. Counting
occurs on the negative going edge of the input pulse.
General Description
The MM74C90 decade counter and the MM74C93 binary
counter and complementary MOS (CMOS) integrated cir-
cuits constructed with N- and P-channel enhancement
mode transistors. The 4-bit decade counter can reset to
zero or preset to nine by applying appropriate logic level on
the R01, R02, R91 and R92 inputs. Also, a separate flip-flop
All inputs are protected against static discharge damage.
Features
■ Wide supply voltage range: 3V to 15V
■ Guaranteed noise margin: 1V
on the A-bit enables the user to operate it as a divide-by-2,
5 or 10 frequency counter. The 4-bit binary counter can be
reset to zero by applying high logic level on inputs R01 and
■ High noise immunity: 0.45 VCC (typ.)
■ Low power compatibility:
Fan out of 2 TTL driving 74L
R02, and a separate flip-flop on the A-bit enables the user
■ The MM74C93 follows the MM74L93 Pinout
Ordering Code:
Order Number
MM74C90N
Package Number
N14A
Package Description
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
MM74C93N
N14A
Connection Diagrams
Pin Assignments for DIP
MM74C93
MM74C90
Top View
Top View
© 1999 Fairchild Semiconductor Corporation
DS005889.prf
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Logic Diagrams
MM74C90
MM74C93
Truth Tables
MM74C90 4-Bit Decade Counter BCD Count Sequence
MM74C93 4-Bit Binary Counter Binary Count Sequence
Count
Output
Count
Output
QD
QC
QB
QA
QD
QC
QB
QA
0
1
2
3
4
5
6
7
8
9
L
L
L
L
L
L
L
L
H
H
L
L
L
L
L
H
L
0
1
L
L
L
L
L
L
L
H
L
L
H
H
L
2
L
L
H
H
L
L
H
L
3
L
L
H
L
H
H
H
H
L
4
L
H
H
H
H
L
L
H
L
5
L
L
H
L
H
H
L
6
L
H
H
L
H
L
7
L
H
L
8
H
H
H
H
H
H
H
H
L
L
H
9
L
L
H
L
10
11
12
13
14
15
L
H
H
L
Output Q is connected to Input B for BCD count.
A
H = HIGH Level
L = LOW Level
X = Irrelevant
L
H
L
H
H
H
H
L
H
L
H
H
H
Output Q is connected to input B for binary count sequence.
A
H = HIGH Level
L = LOW Level
X = Irrelevant
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2
Function Tables
Reset/Count Function Table
Reset Inputs Output
R01
R02
R91
R92
QD
QC
QB
QA
H
H
X
X
L
H
H
X
L
L
X
H
X
L
X
L
L
L
L
L
L
L
L
L
L
L
H
L
H
H
Count
X
X
L
X
L
Count
Count
Count
L
X
L
X
X
Reset/Count Function Table
Output
Reset
Inputs
R01
R02
QD
QC
QB
QA
H
L
H
X
L
L
L
L
L
Count
Count
X
3
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Absolute Maximum VCC
Storage Temperature Range (TS)
Lead Temperature (TL)
18V
Absolute Maximum Ratings(Note 1)
−65°C to +150°C
Voltage at Any Pin (Note 1)
Operating Temperature Range (TA)
MM74C90, MM74C93
Power Dissipation (PD)
Dual-In-Line
−0.3V to VCC +0.3V
(Soldering, 10 seconds)
260°C
−40°C to +85°C
Note 1: “Absolute Maximum Ratings” are those values beyond which the
safety of the device cannot be guaranteed. Except for “Operating Tempera-
ture Range”, they are not meant to imply that the devices should be oper-
ated at these limits. The table of “Electrical Characteristics” provides
conditions for actual device operation.
700 mW
500 mW
Small Outline
Operating VCC Range
3V to 15V
DC Electrical Characteristics
Min/Max limits apply across temperature range unless otherwise noted
Symbol
Parameter
Conditions
Min
Typ
Max
Units
CMOS TO CMOS
V
V
V
V
Logical “1” Input Voltage
Logical “0” Input Voltage
Logical “1” Output Voltage
Logical “0” Output Voltage
V
V
V
V
V
V
V
V
V
V
V
= 5V
3.5
8.0
V
V
IN(1)
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
= 10V
= 5V
1.5
2.0
V
IN(0)
= 10V
V
= 5V, I = −10 µA
4.5
9.0
V
OUT(1)
OUT(0)
O
= 10V, I = −10 µA
V
O
= 5V, I = +10 µA
0.5
1.0
1.0
V
O
= 10V, I = +10 µA
V
O
I
I
I
Logical “1” Input Current
Logical “0” Input Current
Supply Current
= 15V, V = 15V
0.005
−0.005
0.05
µA
µA
µA
IN(1)
IN(0)
CC
IN
= 15V, V = 0V
−1.0
IN
= 15V
300
CMOS/LPTTL INTERFACE
V
V
V
V
Logical “1” Input Voltage
MM74C90, MM74C93
Logical “0” Input Voltage
MM74C90, MM74C93
Logical “1” Output Voltage
MM74C90, MM74C93
Logical “0” Output Voltage
MM74C90, MM74C93
IN(1)
V
V
V
V
= 4.75V
= 4.75V
V
−1.5
CC
V
V
CC
CC
CC
CC
IN(0)
0.8
0.4
OUT(1)
OUT(0)
= 4.75V, I = −360 µA
2.4
V
O
= 4.75V, I = −360 µA
V
O
OUTPUT DRIVE (See Family Characteristics Data Sheet) (Short Circuit Current)
I
I
I
I
Output Source Current
(P-Channel)
V
= 5V, V = 0V
OUT
−1.75
−8.0
1.75
8.0
−3.3
−15
3.6
16
mA
mA
mA
mA
SOURCE
SOURCE
SINK
CC
T
= 25°C
A
Output Source Current
(P-Channel)
V
= 10V, V
= 0V
OUT
CC
T
= 25°C
A
Output Sink Current
(N-Channel)
V
= 5V, V
= V
CC
OUT CC
T
= 25°C
A
Output Sink Current
(N-Channel)
V
= 10V, V
= V
OUT CC
SINK
CC
T
= 25°C
A
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4
AC Electrical Characteristics (Note 2)
TA = 25°C, CL = 50 pF, unless otherwise specified
Symbol
, t
Parameter
Conditions
Min
Typ
Max
Units
t
t
t
t
t
t
t
t
Propagation Delay Time
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
= 5V
= 10
200
80
400
150
850
300
800
300
1050
400
1000
400
1200
500
800
300
300
150
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
pd0 pd1
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
from A to Q
IN
A
, t
Propagation Delay Time from
to Q (MM74C93)
= 5V
= 10V
= 5V
= 10V
= 5V
= 10
450
160
450
160
500
200
500
200
600
250
450
160
150
75
pd0 pd1
A
IN
B
, t
Propagation Delay Time from
to Q (MM74C90)
pd0 pd1
A
IN
B
, t
Propagation Delay Time
from A to Q (MM74C93)
pd0 pd1
IN
C
, t
Propagation Delay Time from
to Q (MM74C93)
= 5V
= 10V
= 5V
= 10V
= 5V
= 10V
= 5V
= 10V
pd0 pd1
A
IN
C
, t
Propagation Delay Time from
to Q (MM74C93)
pd0 pd1
A
IN
D
, t
Propagation Delay Time from
to Q (MM74C90)
pd0 pd1
A
IN
D
, t
Propagation Delay Time from
or R to Q , Q , Q or Q
pd0 pd1
R
01
02
A
B
C
D
D
(MM74C93)
Propagation Delay Time from
or R to Q , Q , Q or Q
t
t
, t
V
V
= 5V
200
75
400
150
ns
ns
pd0 pd1
CC
R
= 10V
01
02
A
B
C
CC
(MM74C90)
Propagation Delay Time from
or R to Q or Q
, t
V
V
= 5V
250
100
500
200
ns
ns
pd0 pd1
CC
R
= 10V
91
92
A
D
CC
(MM74C90)
t
t
t
Min. R or R Pulse Width
V
V
V
V
V
V
V
V
V
V
V
V
= 5V
600
30
250
125
250
125
200
100
ns
ns
PW
PW
PW
01
02
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
(MM74C93)
= 10V
= 5V
Min. R or R Pulse Width
600
300
500
250
ns
01
02
(MM74C90)
= 10V
= 5V
ns
Min. R or R Pulse Width
ns
91
92
(MM74C90)
= 10V
= 10V
= 10V
= 5V
ns
t , t
Maximum Clock Rise
and Fall Time
15
5
µs
r
f
µs
t
f
Minimum Clock Pulse Width
250
100
2
100
50
ns
W
= 10V
= 5V
ns
Maximum Clock Frequency
Input Capacitance
MHz
MHz
pF
pF
MAX
= 10V
5
C
C
Any Input (Note 3)
5
IN
Power Dissipation Capacitance
Per Package (Note 4)
45
PD
Note 2: AC Parameters are guaranteed by DC correlated testing.
Note 3: Capacitance is guaranteed by periodic testing.
Note 4: C determines the no load ac power consumption of any CMOS device. For complete explanation see Family Characteristics application note—
PD
AN-90.
5
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AC Test Circuits
MM74C90
MM74C93
Clock rise and fall time t = t = 20 ns
r
f
Clock rise and fall time t = t = 20 ns
r
f
Switching Time Waveforms
MM74C90 and MM74C93 are solid line waveforms. Dashed line waveforms are for MM74C90 only.
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6
Physical Dimensions inches (millimeters) unless otherwise noted
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
Package Number N14A
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be rea-
sonably expected to result in a significant injury to the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be rea-
sonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
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Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications.
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