MM74HC132 [FAIRCHILD]
Quad 2-Input NAND Schmitt Trigger; 四2输入与非施密特触发器型号: | MM74HC132 |
厂家: | FAIRCHILD SEMICONDUCTOR |
描述: | Quad 2-Input NAND Schmitt Trigger |
文件: | 总6页 (文件大小:82K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
September 1983
Revised February 1999
MM74HC132
Quad 2-Input NAND Schmitt Trigger
General Description
Features
The MM74HC132 utilizes advanced silicon-gate CMOS
technology to achieve the low power dissipation and high
noise immunity of standard CMOS, as well as the capability
to drive 10 LS-TTL loads.
■ Typical propagation delay: 12 ns
■ Wide power supply range: 2V–6V
■ Low quiescent current: 20 µA maximum (74HC Series)
■ Low input current: 1 µA maximum
The 74HC logic family is functionally and pinout compatible
with the standard 74LS logic family. All inputs are protected
from damage due to static discharge by internal diode
clamps to VCC and ground.
■ Fanout of 10 LS-TTL loads
■ Typical hysteresis voltage: 0.9V at VCC=4.5V
Ordering Code:
Order Number Package Number
Package Description
MM74HC132M
MM74HC132SJ
MM74HC132MTC
MM74HC132N
M14A
M14D
MTC14
N14A
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150” Narrow Body
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. (Tape and Reel not available in N14A.)
Connection Diagram
Logic Diagram
Pin Assignment for DIP, SOIC, SOP, and TSSOP
Top View
© 1999 Fairchild Semiconductor Corporation
DS005309.prf
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Lead Temperature (TL)
(Soldering 10 seconds)
Absolute Maximum Ratings(Note 1)
(Note 2)
260°C
Supply Voltage (VCC
DC Input Voltage (VIN
DC Output Voltage (VOUT
Clamp Diode Current (IIK, IOK
DC Output Current, per pin (IOUT
DC VCC or GND Current, per pin (ICC
)
−0.5 to +7.0V
−1.5 to VCC +1.5V
−0.5 to VCC +0.5V
±20 mA
Recommended Operating
Conditions
)
)
Min
Max
6
Units
)
Supply Voltage (VCC
DC Input or Output Voltage
(VIN, VOUT
Operating Temperature Range (TA) −40
)
2
V
V
)
±25 mA
0
VCC
)
±50 mA
)
Storage Temperature Range (TSTG
Power Dissipation (PD)
(Note 3)
)
−65°C to +150°C
+125
°C
Note 1: Absolute Maximum Ratings are those values beyond which dam-
age to the device may occur.
600 mW
500 mW
S.O. Package only
Note 2: Unless otherwise specified all voltages are referenced to ground.
Note 3: Power Dissipation temperature derating — plastic “N” package: −
DC Electrical Characteristics (Note 4)
T
= -40 to 85°C
T
= -40 to 125°C
T
= 25°C
A
A
A
V
Symbol
Parameter
Conditions
Min
Units
CC
Typ
Guaranteed Limits
V
Positive Going
2.0V
4.5V
6.0V
2.0V
4.5V
6.0V
2.0V
4.5V
6.0V
2.0V
4.5V
6.0V
2.0V
4.5V
6.0V
2.0V
4.5V
6.0V
2.0V
4.5V
6.0V
4.5V
6.0V
2.0V
4.5V
6.0V
4.5V
6.0V
6.0V
6.0V
1.0
1.0
2.0
3.0
1.5
3.15
4.2
0.3
0.9
1.2
1.0
2.2
3.0
0.2
0.4
0.5
1.0
1.4
1.5
1.9
4.4
5.9
3.84
5.34
0.1
0.1
0.1
0.33
0.33
±1.0
20
1.0
2.0
3.0
1.5
3.15
4.2
0.3
0.9
1.2
1.0
2.2
3.0
0.2
0.4
0.5
1.0
1.4
1.5
1.9
4.4
5.9
3.7
5.2
0.1
0.1
0.1
0.4
0.4
±1.0
40
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
µA
µA
T+
T−
H
Threshold Voltage
2.0
3.0
1.5
3.15
4.2
0.3
0.9
1.2
1.0
2.2
3.0
0.2
0.4
0.5
1.0
1.4
1.5
1.9
4.4
5.9
3.98
5.48
0.1
0.1
0.1
0.26
0.26
±0.1
2.0
Max
Min
Max
Min
Max
V
V
Negative Going
Threshold Voltage
Hysteresis Voltage
V
V
Minimum HIGH Level
Output Voltage
V
= V or V
IL
2.0
4.5
6.0
4.2
5.7
0
OH
IN
IH
|I
| ≤ 20 µA
OUT
V
= V or V
IH IL
IN
|I
|I
| ≤ 4.0 mA
| ≤ 5.2 mA
OUT
OUT
Maximum LOW Level
Output Voltage
V
= V or V
IH IL
OL
IN
|I
| ≤ 20 µA
0
OUT
V
= V or V
IL
0
IN
IH
|I
|I
| ≤ 4.0 mA
| ≤ 5.2 mA
0.2
0.2
OUT
OUT
I
I
Maximum Input Current
Maximum Quiescent
Supply Current
V
V
= V or GND
CC
IN
CC
IN
= V or GND
IN
CC
I
= 0 µA
OUT
Note 4: For a power supply of 5V ±10% the worst case output voltages (V , and V ) occur for HC at 4.5V. Thus the 4.5V values should be used when
OH
OL
designing with this supply. Worst case V and V occur at V = 5.5V and 4.5V respectively. (The V value at 5.5V is 3.85V.) The worst case leakage cur-
IH
IL
CC
IH
rent (I , I , and I ) occur for CMOS at the higher voltage and so the 6.0V values should be used.
IN CC
OZ
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2
AC Electrical Characteristics
V
CC = 5V, TA = 25°C, C = 15 pF, t = t = 6 ns
L r f
Guaranteed
Limit
Symbol
, t
Parameter
Maximum Propagation Delay
Conditions
Typ
Units
t
12
20
ns
PHL PLH
AC Electrical Characteristics
V
CC = 2.0V to 6.0V, CL = 50 pF, t = t = 6 ns (unless otherwise specified)
r f
T
A
= −40 to 85°C T = −55 to 125°C
A
T
Typ
63
13
11
= 25°C
A
V
Symbol
Parameter
Conditions
Units
CC
Guaranteed Limits
t
t
, t
Maximum
2.0V
4.5V
6.0V
2.0V
4.5V
6.0V
125
158
32
27
95
19
16
186
37
ns
ns
ns
ns
ns
ns
pF
PHL PLH
Propagation Delay
25
21
75
15
13
32
, t
Maximum Output
Rise and Fall Time
30
8
110
22
TLH THL
7
19
C
C
Power Dissipation
(per gate)
130
PD
Capacitance (Note 5)
Maximum Input Capacitance
5
10
10
pF
IN
2
Note 5: C determines the no load dynamic power consumption, P = C
V
f + I
V
, and the no load dynamic current consumption,
PD
D
PD CC
CC CC
I
= C
V
f + I
.
CC
S
PD CC
3
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Physical Dimensions inches (millimeters) unless otherwise noted
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150” Narrow Body
Package Number M14A
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Package Number M14D
www.fairchildsemi.com
4
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Package Number MTC14
5
www.fairchildsemi.com
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
Package Number N14A
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be rea-
sonably expected to result in a significant injury to the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be rea-
sonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
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Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications.
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