MM74HC594M_NL [FAIRCHILD]
Serial In Parallel Out, HC/UH Series, 8-Bit, Right Direction, True Output, CMOS, PDSO16, 0.150 INCH, LEAD FREE, MS-012, SOIC-16;
| 型号： | MM74HC594M_NL |
| 厂家： | 
FAIRCHILD SEMICONDUCTOR |
| 描述： | Serial In Parallel Out, HC/UH Series, 8-Bit, Right Direction, True Output, CMOS, PDSO16, 0.150 INCH, LEAD FREE, MS-012, SOIC-16 光电二极管 输出元件 逻辑集成电路 触发器 |
| 文件： | 总7页 (文件大小：58K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
January 1992
Revised May 1999
MM74HC594
8-Bit Shift Register with Output Registers
The 74HC logic family is speed, function, and pin-out com-
patible with the standard 74LS logic family. All inputs are
protected from damage due to static discharge by internal
diode clamps to VCC and ground.
General Description
This high speed shift register utilizes advanced silicon-gate
CMOS technology. This device possesses the high noise
immunity and low power consumption of standard CMOS
integrated circuits, as well as the ability to drive 15 LS-TTL
loads.
Features
■ Low quiescent current: 80 µA maximum
■ Low input current: 1 µA maximum
■ 8-bit serial-in, parallel-out shift register with storage
■ Wide operating voltage range: 2V to 6V
■ Cascadable
This device contains an 8-bit serial-in, parallel-out shift reg-
ister that feeds an 8-bit D-type storage register. Separate
clocks and direct overriding clears are provided for both the
shift register and the storage register. The shift register has
a direct-overriding clear, serial input, and serial output
(standard) pins for cascading. Both the shift register and
storage register use positive-edge triggered clocks. If both
clocks are connected together, the shift register state will
always be one clock pulse ahead of the storage register.
■ Shift register has direct clear
■ Guaranteed shift frequency: DC to30 MHz
Ordering Code:
Order Number Package Number
Package Description
MM74HC594M
MM74HC594N
M16A
N16E
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagram
Truth Table
RCK SCK SCLR RCLR
Function
Storage Register cleared
Shift Register cleared
Q’H = 0
X
X
X
L
X
X
L
X
Shift Register clocked
X
↑
H
H
H
H
QN = Qn−1, Q0 = SER
Contents of Shift
Register transferred
to output latches
↑
X
© 1999 Fairchild Semiconductor Corporation
DS010915.prf
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Logic Diagram
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2
Absolute Maximum Ratings(Note 1)
(Note 2)
Recommended Operation
Conditions
Supply Voltage (VCC
DC Input Voltage (VIN
DC Output Voltage (VOUT
Clamp Diode Current (IIK, IOK
DC Output Current, per pin (IOUT
DC VCC or GND Current, per pin (ICC
)
−0.5 to +7.0V
−1.5 to VCC +1.5V
−0.5 to VCC +0.5V
±20 mA
)
Min Max Units
)
Supply Voltage (VCC
DC Input or Output Voltage
(VIN, VOUT
)
2
0
6
V
V
)
VCC
)
±35 mA
)
)
±70 mA
Operating Temperature Range (TA) −40 +85
°C
Storage Temperature Range (TSTG
Power Dissipation (PD)
(Note 3)
)
−65°C to +150°C
Input Rise or Fall Times
(tr, tf)
V
CC = 2.0V
1000
500
ns
ns
ns
600 mW
500 mW
V
V
CC = 4.5V
CC = 6.0V
S.O. Package only
400
Note 1: Absolute Maximum Ratings are those values beyond which dam-
age to the device may occur.
Lead Temperature (TL)
(Soldering 10 seconds)
260°C
Note 2: Unless otherwise specified all voltages are referenced to ground.
Note 3: Power Dissipation temperature derating—plastic “N” package: −12
mW/°C from 65°C to 85°C.
DC Electrical Characteristics (Note 4)
T
= 25°C
T = −40 to 85°C
A
A
V
Symbol
Parameter
Conditions
Units
CC
Typ
Guaranteed Limits
V
V
V
Minimum HIGH Level
Input Voltage
2.0V
4.5V
6.0V
2.0V
4.5V
6.0V
1.5
1.5
3.15
4.2
IH
3.15
4.2
V
Maximum LOW Level
Input Voltage
0.5
0.5
IL
1.35
1.8
1.35
1.8
V
V
Minimum HIGH Level
Output Voltage
V
= V or V
IH IL
OH
IN
|I
| ≤ 20 µA
2.0V
4.5V
6.0V
2.0
4.5
6.0
1.9
4.4
5.9
1.9
4.4
5.9
OUT
Q’
V
= V or V
IH IL
H
IN
|I
|I
| ≤ 4.0 mA
| ≤ 5.2 mA
4.5V
6.0V
4.7
5.2
3.98
5.48
3.84
5.34
V
V
OUT
OUT
Q
thru Q
V
= V or V
IH IL
A
H
IN
|I
|I
| ≤ 6.0 mA
| ≤ 7.8 mA
4.5V
6.0V
4.2
5.7
3.98
5.48
3.84
5.34
OUT
OUT
V
Maximum LOW Level
Output Voltage
V
= V or V
IH IL
OL
IN
|I
| ≤ 20 µA
2.0V
4.5V
6.0V
0
0
0
0.1
0.1
0.1
0.1
0.1
0.1
OUT
V
V
Q’
V
= V or V
IH IL
H
IN
|I
|I
| ≤ 4.0 mA
| ≤ 5.2 mA
4.5V
6.0V
0.2
0.2
0.26
0.26
0.33
0.33
OUT
OUT
Q
thru Q
V
= V or V
IH IL
A
H
IN
|I
|I
| ≤ 6.0 mA
| ≤ 7.8 mA
4.5V
6.0V
6.0V
0.2
0.2
0.26
0.26
±0.1
0.33
0.33
±1.0
V
OUT
OUT
I
I
Maximum Input
Current
V
= V or GND
µA
µA
IN
IN
CC
Maximum Quiescent
Supply Current
V
= V or GND
6.0V
8.0
80
CC
IN
CC
I
= 0 µA
OUT
Note 4: For a power supply of 5V ±10% the worst case output voltages (V , and V ) occur for HC at 4.5V. Thus the 4.5V values should be used when
OH
OL
designing with this supply. Worst case V and V occur at V = 5.5V and 4.5V respectively. (The V value at 5.5V is 3.85V.) The worst case leakage cur-
IH
IL
CC
IH
rent (I , I , and I ) occur for CMOS at the higher voltage and so the 6.0V values should be used.
IN CC
OZ
3
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AC Electrical Characteristics
V
= 2.0V to 6.0V, C = 50 pF, t = t = 6 ns (unless otherwise specified)
CC
L
r
f
T
= 25°C
−40°C to +85°C
Guaranteed Limits
A
V
Symbol
Parameter
Conditions
= 50 pF
Units
CC
Typ
f
Maximum Operating
Frequency
C
2.0V
4.5V
6.0V
2.0V
4.5V
6.0V
2.0V
2.0V
4.5V
4.5V
6.0V
6.0V
2.0V
6
4.8
24
MAX
L
L
30
MHz
35
28
t
, t
Maximum Propagation Delay
from SCK to Q’
C
= 50 pF
150
30
185
37
PHL PLH
ns
H
25
31
t
, t
Maximum Propagation Delay
from RCK to Q thru Q
C
C
C
C
C
C
= 50 pF
= 150 pF
= 50 pF
= 150 pF
= 50 pF
= 150 pF
150
200
30
185
250
37
PHL PLH
L
L
L
L
L
L
ns
ns
ns
A
H
40
50
25
31
34
43
t
, t
Maximum Propagation Delay
from SCLR to Q’
150
185
PHL PLH
ns
ns
ns
ns
4.5V
6.0V
2.0V
30
25
37
31
H
t
Maximum Propagation Delay
C
C
= 50 pF
125
155
PHL
L
from RCLR to Q thru Q
4.5V
6.0V
2.0V
4.5V
6.0V
2.0V
25
21
31
26
A
H
= 150 pF
200
40
250
50
L
34
43
t
50
63
SCLR LOW to RCK
RCLR HIGH to SCK
S
4.5V
6.0V
2.0V
10
9
13
11
5
t
5
S
ns
ns
ns
ns
ns
4.5V
6.0V
2.0V
4.5V
6.0V
2.0V
4.5V
5
5
5
5
t
Minimum Setup Time
from SER to SCK
90
18
15
20
10
110
22
19
20
10
S
t
Minimum Removal Time
from SCLR to SCK
R
6.0V
10
90
18
15
5
10
110
22
19
5
t
Minimum Setup Time
from SCK to RCK
2.0V
S
4.5V
6.0V
2.0V
4.5V
6.0V
2.0V
4.5V
t
Minimum Hold Time
SER to SCK
H
5
5
5
5
t
Minimum Pulse Width
of SCK or SCLR or
RCK or RCLR
100
20
125
25
W
ns
6.0V
17
21
t , t
Maximum Input Rise and
Fall Time, Clock
2.0V
4.5V
6.0V
2.0V
4.5V
6.0V
2.0V
4.5V
6.0V
1000
500
400
60
1000
500
400
75
r
f
ns
ns
ns
t
, t
Maximum Output
Rise and Fall Time
THL TLH
12
15
Q
- Q
10
13
A
H
t
, t
Maximum Output
Rise and Fall Time
75
95
THL TLH
15
19
Q’
13
16
H
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4
AC Electrical Characteristics (Continued)
T
= 25°C
−40°C to +85°C
Guaranteed Limits
A
V
Symbol
Parameter
Conditions
Units
CC
Typ
C
Power Dissipation Capacitance,
90
G = V
PD
CC
pF
Outputs Enabled (Note 5)
150
5
G = GND
C
C
Maximum Input Capacitance
Maximum Output Capacitance
10
20
10
20
pF
pF
IN
15
OUT
Note 5: C determines the no load dynamic power consumption, and the no load dynamic current consumption.
PD
5
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Physical Dimensions inches (millimeters) unless otherwise noted
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
Package Number M16A
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6
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Package Number N16E
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FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be rea-
sonably expected to result in a significant injury to the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be rea-
sonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
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Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications.
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