MM82C19 [FAIRCHILD]
16-Line to 1-Line Multiplexer; 16号线到1线多路复用器
| 型号： | MM82C19 |
| 厂家： | 
FAIRCHILD SEMICONDUCTOR |
| 描述： | 16-Line to 1-Line Multiplexer |
| 文件： | 总7页 (文件大小：65K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
October 1987
Revised January 2004
MM82C19
16-Line to 1-Line Multiplexer
General Description
Features
The MM82C19 multiplex 16 digital lines to 1 output. A 4-bit
address code determines the particular 1-of-16 inputs
which is routed to the output. The data is inverted from
input to output.
■ Wide supply voltage range: 3.0V to 15V
■ Guaranteed noise margin: 1.0V
■ High noise immunity: 0.45 VCC (typ.)
■ TTL compatibility: Drive 1 TTL Load
A strobe override places the output of MM82C19 in the
high-impedance state.
All inputs are protected from damage due to static dis-
charge by diode clamps to VCC and GND.
Ordering Code:
Order Number Package Number
Package Description
MM82C19N
N24A
24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-011, 0.600" Wide
Connection Diagram
© 2004 Fairchild Semiconductor Corporation
DS005891
www.fairchildsemi.com
Truth Table
MM82C19
Inputs
STROBE E0 E1 E2 E3 E4 E5 E6 E7 E8 E9 E10 E11 E12 E13 E14 E15
Output
D
X
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
C
X
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
B
X
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
A
X
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
W
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
X
0
X
X
X
0
X
X
X
X
X
0
X
X
X
X
X
X
X
0
X
X
X
X
X
X
X
X
X
0
X
X
X
X
X
X
X
X
X
X
X
0
X
X
X
X
X
X
X
X
X
X
X
X
X
0
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
0
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
0
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
0
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
0
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
0
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
0
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
0
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
0
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
0
High-Z
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
1
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
1
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
1
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
1
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
1
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
1
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
1
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
1
X
X
X
X
X
X
X
X
X
X
X
X
X
X
1
X
X
X
X
X
X
X
X
X
X
X
X
1
X
X
X
X
X
X
X
X
X
X
1
X
X
X
X
X
X
X
X
1
X
X
X
X
X
X
1
X
X
X
X
1
X
X
1
www.fairchildsemi.com
2
Logic Diagram
3
www.fairchildsemi.com
Absolute Maximum Ratings(Note 1)
Voltage at Any Pin
Operating Temperature Range
Storage Temperature Range
Power Dissipation
Dual-In-Line
−0.3V to VCC + 0.3V
−55°C to +125°C
−65°C to +150°C
700 mW
500 mW
3.0V to 15V
18V
Small Outline
Note 1: “Absolute Maximum Ratings” are those values beyond which the
safety of the device cannot be guaranteed. Except for “Operating Tempera-
ture Range” they are not meant to imply that the devices should be oper-
ated at these limits. The Electrical Characteristic table provides conditions
for actual device operation.
Operating VCC Range
VCC
Lead Temperature
(soldering, 10 seconds)
260°C
DC Electrical Characteristics
Min/Max limits apply across temperature range unless otherwise noted.
Symbol
Parameter
Conditions
Min
Typ
Max
Units
CMOS to CMOS
VIN(1)
Logical “1” Input Voltage
Logical “0” Input Voltage
Logical “1” Output Voltage
Logical “0” Output Voltage
V
V
V
V
V
V
V
V
V
V
CC = 5.0V
CC = 10V
CC = 5.0V
CC = 10V
3.5
8.0
V
V
V
V
VIN(0)
1.5
2.0
VOUT(1)
CC = 5.0V, IO = −10 µA
CC = 10V, IO = −10 µA
CC = 5.0V, IO = +10 µA
CC = 10V, IO = +10 µA
CC = 15V, VIN = 15V
CC = 15V, VIN = 0V
4.5
9.0
VOUT(0)
0.5
1.0
1.0
IIN(1)
IIN(0)
IOZ
Logical “1” Input Current
Logical “0” Input Current
Output Current in High
Impedance State
0.005
V
−1.0
−1.0
−0.005
µA
MM82C19
VCC = 15V, VO = 15V
VCC = 15V, VO = 0V
VCC = 15V
0.005
−0.005
0.05
1.0
µA
µA
ICC
Supply Current
300
CMOS/LPTTL Interface
VIN(1)
Logical “1” Input Voltage
74C, 82C, VCC = 4.75V
V
CC−1.5
V
V
V
V
VIN(0)
Logical “0” Input Voltage
Logical “1” Output Voltage
Logical “0” Output Voltage
74C, 82C, VCC = 4.75V
0.8
0.4
VOUT(1)
VOUT(0)
74C, 82C, VCC = 4.75V, IO = −1.6 mA
74C, 82C, VCC = 4.75V, IO = 1.6 mA
2.4
Output Drive (Short Circuit Current)
ISOURCE
ISOURCE
ISINK
Output Source Current
(P-Channel)
VCC = 5.0V, VOUT = 0V, TA = 25°C
VCC = 10V, VOUT = 0V, TA = 25°C
VCC = 5.0V, VOUT = VCC, TA = 25°C
VCC = 10V, VOUT = VCC, TA = 25°C
−4.35
−20
4.35
20
−8
−40
8
mA
mA
mA
mA
Output Source Current
(P-Channel)
Output Sink Current
(N-Channel)
ISINK
Output Sink Current
(N-Channel)
40
www.fairchildsemi.com
4
AC Electrical Characteristics (Note 2)
TA = 25°C, CL = 50 pF, unless otherwise noted
Symbol
Parameter
Propagation Delay Time to a
Logical “0” or Logical “1”
from Data Inputs to Output
Conditions
Min
Typ
250
110
290
120
290
120
Max
600
300
650
330
650
330
Units
tpd0, tpd1
V
V
V
V
V
V
CC = 5.0V
CC = 10V
ns
CC = 5.0V, CL = 150 pF
CC = 10V, CL = 150 pF
CC = 5.0V
tpd0, tpd1
Propagation Delay Time to a
Logical “0” or Logical “1”
from Data Select Inputs to Output
Propagation Delay Time to a
Logical “0” or Logical “1”
from Strobe to Output MM74C150
Delay from Strobe to High
Impedance State MM82C19
Delay from Strobe to Logical
“1” Level or to Logical “0”
Level (from High Impedance State)
MM82C19
ns
ns
CC = 10V
tpd0, tpd1
V
CC = 5.0V
CC = 10V
120
55
300
150
V
t1H, t0H
V
V
V
V
CC = 5.0V, RL = 10k, CL = 5 pF
CC = 10V, RL = 10k, CL = 5 pF
CC = 5.0V, RL = 10k, CL = 5 pF
CC = 10V, RL = 10k, CL = 5 pF
80
60
80
30
200
150
250
120
ns
ns
tH1, tH0
CIN
Input Capacitance
Any Input (Note 3)
(Note 3)
5.0
pF
pF
COUT
Output Capacitance
11.0
MM82C19
CPD
Power Dissipation Capacitance
(Note 4)
100
pF
Note 2: AC Parameters are guaranteed by DC correlated testing.
Note 3: Capacitance is guaranteed by periodic testing.
Note 4: CPD determines the no load AC power consumption of any CMOS device. For complete explanation, see Family Characteristics, application note
AN-90.
5
www.fairchildsemi.com
Switching Time Waveforms
CMOS to CMOS
t1H and tH1
t1H
tH1
t0H and tH0
t0H
tH0
Note: Delays measured with input tr, tf ≤ 20 ns.
www.fairchildsemi.com
6
Physical Dimensions inches (millimeters) unless otherwise noted
24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-011, 0.600" Wide
Package Number N24A
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be rea-
sonably expected to result in a significant injury to the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be rea-
sonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
www.fairchildsemi.com
7
www.fairchildsemi.com
相关型号：
MM82C19WM
Multiplexer, CMOS Series, 1-Func, 16 Line Input, 1 Line Output, Inverted Output, PDSO24
FAIRCHILD
©2020 ICPDF网 联系我们和版权申明