NC7WB3306L8X [FAIRCHILD]
TinyLogic UHS 2-Bit Low Power Bus Switch; TinyLogic UHS 2位低功耗总线开关
| 型号： | NC7WB3306L8X |
| 厂家： | 
FAIRCHILD SEMICONDUCTOR |
| 描述： | TinyLogic UHS 2-Bit Low Power Bus Switch |
| 文件： | 总9页 (文件大小：184K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
May 2000
Revised September 2003
NC7WB3306
TinyLogic UHS 2-Bit Low Power Bus Switch
General Description
Features
The NC7WB3306 is a 2-bit ultra high-speed CMOS FET
bus switch with TTL-compatible active LOW control inputs.
The low On Resistance of the switch allows inputs to be
connected to outputs with minimal propagation delay and
without generating additional ground bounce noise. The
device is organized as a 2-bit switch with independent bus
enable (OE) controls. When OE is LOW, the switch is ON
and Port A is connected to Port B. When OE is HIGH, the
■ Space saving US8 surface mount package
■ MicroPak leadless package
■ Typical 3Ω switch resistance at 5.0V VCC
■ Minimal propagation delay through the switch
■ Power down high impedance input/output
■ Zero bounce in flow through mode.
■ TTL compatible active LOW control inputs
■ Control inputs are overvoltage tolerant
switch is OPEN and
a high-impedance state exists
between the two ports. Control inputs tolerate voltages up
to 5.5V independent of VCC
.
Ordering Code:
Product
Code
Order
Package
Package Description
Supplied As
Number
Number Top Mark
NC7WB3306K8X MAB08A
NC7WB3306L8X MAC08A
WB06 8-Lead US8, JEDEC MO-187, Variation CA 3.1mm Wide 3k Units on Tape and Reel
U3 8-Lead MicroPak, 1.6 mm Wide 5k Units on Tape and Reel
TinyLogic is a registered trademark of Fairchild Semiconductor Corporation.
MicroPak is a trademark of Fairchild Semiconductor Corporation.
© 2003 Fairchild Semiconductor Corporation
DS500377
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Logic Symbol
Connection Diagrams
(Top View)
Pin One Orientation Diagram
Pin Descriptions
Pin Name
Description
Bus A
A
B
Bus B
AAA represents Product Code Top Mark - see ordering code
OE
Bus Enable Input
Note: Orientation of Top Mark determines Pin One location. Read the top
product code mark left to right, Pin One is the lower left pin (see diagram).
Function Table
Pad Assignments for MicroPak
Bus Enable Input OE
Function
L
B Connected to A
Disconnected
H
H = HIGH Logic Level
L = LOW Logic Level
(Top Thru View)
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2
Absolute Maximum Ratings(Note 1)
Recommended Operating
Conditions (Note 3)
Supply Voltage (VCC
)
−0.5V to +7.0V
−0.5V to +7.0V
−0.5V to +7.0V
DC Switch Voltage (VS)
DC Output Voltage (VIN) (Note 2)
DC Input Diode Current
Supply Operating (VCC
Control Input Voltage (VIN
Switch Input Voltage (VIN
Output Voltage (VOUT
)
4.0V to 5.5V
0V to 5.5V
)
)
0V to 5.5V
(IIK) VIN < 0V
−50 mA
128 mA
)
0V to 5.5V
DC Output (IOUT) Current
DC VCC or Ground Current (ICC/GND)
Operating Temperature (TA)
Input Rise and Fall Time (tr, tf)
Control Input
−40°C to +85°C
±100 mA
Storage Temperature Range (TSTG
)
−65°C to +150°C
+150°C
0 ns/V to 5 ns/V
0 ns/V to DC
250°C/W
Junction Lead Temperature under Bias (TJ)
Lead Temperature (TL)
Switch I/O
Thermal Resistance (θJA
)
(Soldering, 10 seconds)
+260°C
Power Dissipation (PD) @ +85°C
250 mW
Note 1: The “Absolute Maximum Ratings” are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum ratings.
The “Recommended Operating Conditions” table will define the conditions
for actual device operation.
Note 2: The input and output negative voltage ratings may be exceeded if
the input and output diode current ratings are observed.
Note 3: Unused logic inputs must be held HIGH or LOW. They may not
float.
DC Electrical Characteristics
VCC
T
A = −40°C to +85°C
Symbol
Parameter
Units
Conditions
IIN = −18 mA
(V)
4.5
Min
Typ
Max
VIK
Clamp Diode Voltage
−1.2
V
V
VIH
VIL
HIGH Level Input Voltage
LOW Level Input Voltage
HIGH Level Output Voltage
Input Leakage Current
Switch OFF Leakage Current
Switch On Resistance
(Note 4)
4.0 to 5.5
4.0 to 5.5
4.5 to 5.5
5.5
2.0
0.8
V
VOH
IIN
see Figure 3
V
VIN = VCC
±1.0
±1.0
7
µA
µA
0 ≤ VIN ≤ 5.5V
0 ≤ A, B, ≤ VCC
IOFF
RON
5.5
4.5
3
3
VIN = 0V, IIN = 64 mA
VIN = 0V, IIN = 30 mA
VIN = 2.4V, IIN = 15 mA
VIN = 2.4V, IIN = 15 mA
VIN = VCC or GND,
4.5
7
Ω
4.5
6
15
20
3
4.0
10
ICC
Quiescent Supply Current
5.5
µA
I
OUT = 0
IN = 3.4V, IO = 0,
Control Input Only
∆ICC
Increase in ICC per Input
(Note 5)
5.5
1
2.5
mA
V
Note 4: Measured by the voltage drop between A and B pins at the indicated current through the switch. On Resistance is determined by the lower of the
voltages on the two (A or B) pins.
Note 5: Per TTL driven input (VIN = 3.4V, control input only). A and B pins do not contribute to ICC.
3
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AC Electrical Characteristics
TA = −40°C to +85°C
VCC
CL = 50 pF, RU = RD = 500Ω
Symbol
Parameter
Units
Conditions
Figure
(V)
Min
Typ
Max
Number
tPHL
tPLH
tPZL
tPZH
tPLZ
tPHZ
,
Propagation Delay Bus-to-Bus
(Note 6)
4.0 to 5.5
0.25
ns
VI = OPEN
Figures
1, 2
,
Output Enable Time
4.5 to 5.5
4.0
0.8
0.8
0.8
0.8
2.5
3.0
3.1
2.9
4.2
4.6
4.8
4.4
VI = 7V for tPZL
VI = 0V for tPZH
VI = 7V for tPLZ
VI = 0V for tPHZ
Figures
1, 2
ns
ns
,
Output Disable Time
4.5 to 5.5
4.0
Figures
1, 2
Note 6: This parameter is guaranteed. The bus switch contributes no propagation delay other than the RC delay of the typical On Resistance of the switch
and the 50 pF load capacitance, when driven by an ideal voltage source (zero output impedance). The specified limit is calculated on this basis.
Capacitance
Symbol
Parameter
Typ
Max
Units
Conditions
CIN
Control Pin Input Capacitance
2.5
pF
V
V
V
CC = 0V
CI/O (OFF)
CI/O (ON)
Port OFF Capacitance
Switch ON Capacitance
6
pF
pF
CC = 5.0V = OE
12
CC = 5.0V, OE = 0V
AC Loading and Waveforms
Input driven by 50Ω source terminated in 50Ω.
CL includes load and stray capacitance.
Input PRR = 1.0 MHz tw = 500 ns.
FIGURE 1. AC Test Circuit
FIGURE 2. AC Waveforms
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4
DC Characteristics
FIGURE 3. Typical High Level Output Voltage vs. Supply Voltage
5
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Tape and Reel Specification
TAPE FORMAT for US8
Package
Tape
Section
Number
Cavities
125 (typ)
250
Cavity
Status
Empty
Filled
Cover Tape
Status
Designator
Leader (Start End)
Carrier
Sealed
K8X
Sealed
Trailer (Hub End)
75 (typ)
Empty
Sealed
TAPE DIMENSIONS inches (millimeters)
TAPE FORMAT for MicroPak
Package
Tape
Section
Number
Cavities
125 (typ)
250
Cavity
Status
Empty
Filled
Cover Tape
Status
Designator
Leader (Start End)
Carrier
Sealed
L8X
Sealed
Trailer (Hub End)
75 (typ)
Empty
Sealed
TAPE DIMENSIONS inches (millimeters)
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6
Tape and Reel Specification (Continued)
REEL DIMENSIONS inches (millimeters)
Tape
Size
A
B
C
D
N
W1
W2
W3
7.0
0.059
0.512
0.795
2.165 0.331 + 0.059/−0.000
0.567
W1 + 0.078/−0.039
(W1 + 2.00/−1.00)
8 mm
(177.8) (1.50) (13.00) (20.20) (55.00) (8.40 + 1.50/−0.00)
(14.40)
7
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Physical Dimensions inches (millimeters) unless otherwise noted
8-Lead US8, JEDEC MO-187, Variation CA 3.1mm Wide
Package Number MAB08A
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8
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
8-Lead MicroPak, 1.6 mm Wide
Package Number MAC08A
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be rea-
sonably expected to result in a significant injury to the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be rea-
sonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
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9
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