RC5061 [FAIRCHILD]
High Performance Programmable Synchronous DC-DC Controller for Multi-Voltage Platforms; 高性能可编程同步DC -DC控制器,用于多电压平台型号: | RC5061 |
厂家: | FAIRCHILD SEMICONDUCTOR |
描述: | High Performance Programmable Synchronous DC-DC Controller for Multi-Voltage Platforms |
文件: | 总18页 (文件大小:137K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
www.fairchildsemi.com
RC5 0 6 1
Hig h P e rfo rm a n c e P ro g ra m m a b le S yn c h ro n o u s
DC-DC Co n t ro lle r fo r Mu lt i-Vo lt a g e P la t fo rm s
Features
Applications
• Programmable output for Vcore from 1.3V to 3.5V using
an integrated 5-bit DAC
• Power supply for Pentium® III Camino Platform
• Power supply for Pentium III Whitney Platform
• VRM for Pentium III processor
• Controls adjustable linears for Vtt (1.5V), and Vclock
(2.5V)
• Programmable multi-output power supply
• Meets VRM specification with as few as 5 capacitors
• Meets 1.550V +40/-70mV over initial tolerance,
temperature and transients
Description
The RC5061 is a synchronous mode DC-DC controller IC
which provides a highly accurate, programmable set of output
voltages for multi-voltage platforms such as the Intel Camino,
and provides a complete solution for the Intel Whitney and other
high-performance processors. The RC5061 features remote
voltage sensing, independently adjustable current limit, and
Active Droop for optimal converter transient response. The
RC5061 uses a 5-bit D/A converter to program the output
voltage from 1.3V to 3.5V. The RC5061 uses a high level of
integration to deliver load currents in excess of 16A from a 5V
• Remote sense
• Active Droop (Voltage Positioning)
• Drives N-Channel MOSFETs
• Overcurrent protection using MOSFET sensing
• 85% efficiency typical at full load
• Integrated Power Good and Enable/Soft Start functions
• 20 pin SOIC package
Block Diagram
+5V
VCCA 17
+3.3V
9
+
-
REF
PWRGD,
OCL
10
+1.5V
+2.5V
VCCP
OCL
11
12
+
-
REF
+12V
+5V
PWRGD,
OCL
15
-
+
RS
OSC
16
-
+
VCCP
HIDRV
20
1
Digital
2
VCC
Control
-
+
-
19 LODRV
+
18
GNDP
1.24V
Reference
5-Bit
14
Power
Good
PWRGD
DAC
8 7 6 5 4
3
13
ENABLE/SS
VID4
VID0VID2
GNDA
VID1 VID3
Pentium is a registered trademark of Intel Corporation.
REV. 1.0.0 7/6/00
RC5061
PRODUCT SPECIFICATION
source with minimal external circuitry. Synchronous-mode
operation offers optimum efficiency over the entire specified
output voltage range. An on-board precision low TC reference
achieves tight tolerance voltage regulation without expensive
external components, while Active Droop permits exact tailor-
ing of voltage for the most demanding load transients. The
RC5061 includes linear regulator controllers for Vtt termina-
tion (1.5V), and Vclock (2.5V), each adjustable with an exter-
nal divider. The RC5061 also offers integrated functions
including Power Good, Output Enable/Soft Start and current
limiting, and is available in a 20 pin SOIC package.
Pin Assignments
VCCP
LODRV
GNDP
VCCA
VFB
HIDRV
SW
GNDA
VID4
VID3
VID2
VID1
VID0
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
RC5061
IFB
PWRGD
SS/ENABLE
VCKFB
VCKGATE
VTTGATE
VTTFB
Pin Definitions
Pin
Number Pin Name
Pin Function Description
1
HIDRV
High Side FET Driver. Connect this pin through a resistor to the gate of an N-channel
MOSFET. The trace from this pin to the MOSFET gate should be <0.5".
2
SW
High side Driver Source and Low side Driver Drain Switching Node. Together with
IFB pin allows FET sensing for Vcc current.
3
GNDA
VID0-4
Analog Ground. Return path for low power analog circuitry. This pin should be
connected to a low impedance system ground plane to minimize ground loops.
4-8
Voltage Identification Code Inputs. These open collector/TTL compatible inputs will
program the output voltage over the ranges specified in Table 2. Pull-up resistors are
internal to the controller.
9
VTTGATE
VTTFB
Gate Driver for VTT Transistor. For 1.5V output.
Voltage Feedback for VTT.
10
11
12
13
VCKGATE
VCKFB
Gate Driver for VCK Transistor. For 2.5V output.
Voltage Feedback for VCK.
ENABLE/SS Output Enable. A logic LOW on this pin will disable all outputs. An internal current source
allows for open collector control. This pin also doubles as soft start for all outputs.
14
15
PWRGD
IFB
Power Good Flag. An open collector output that will be logic LOW if any output voltage
is not within ±12% of the nominal output voltage setpoint.
Vcc Current Feedback. Pin 15 is used in conjunction with pin 2 as the input for the Vcc
current feedback control loop. Layout of these traces is critical to system performance.
See Application Information for details.
16
VFB
Vcc Voltage Feedback. Pin 16 is used as the input for the Vcc voltage feedback control
loop. See Application Information for details regarding correct layout.
17
18
19
VCCA
GNDP
LODRV
Analog VCC. Connect to system 5V supply and decouple with a 0.1µF ceramic capacitor.
Power Ground. Return pin for high currents flowing in pin 20 (VCCP).
Vcc Low Side FET Driver. Connect this pin through a resistor to the gate of an N-channel
MOSFET for synchronous operation. The trace from this pin to the MOSFET gate should
be <0.5".
20
VCCP
Power VCC. For all FET drivers. Connect to system 12V supply through a 33Ω, and
decouple with a 1µF ceramic capacitor.
2
REV. 1.0.0 7/6/00
PRODUCT SPECIFICATION
RC5061
Absolute Maximum Ratings
Supply Voltage VCCA to GND
Supply Voltage VCCP to GND
Voltage Identification Code Inputs, VID0-VID4
All Other Pins
13.5V
15V
VCCA
13.5V
Junction Temperature, TJ
150°C
Storage Temperature
-65 to 150°C
300°C
Lead Soldering Temperature, 10 seconds
1
Thermal Resistance Junction-to-ambient, ΘJA
75°C/W
Note:
1. Component mounted on demo board in free air.
Recommended Operating Conditions
Parameter
Conditions
Min.
4.5
Typ.
Max.
Units
V
Supply Voltage VCCA
Input Logic HIGH
5
5.25
2.0
V
Input Logic LOW
0.8
70
V
Ambient Operating Temperature
Output Driver Supply, VCCP
0
°C
V
10.8
12
13.2
Electrical Specifications
(VCCA = 5V, VCCP = 12V, VOUT = 2.0V, and TA = +25°C using circuit in Figure 1 unless otherwise noted.)
The • denotes specifications which apply over the full operating temperature range.
Parameter
Conditions
Min.
Typ.
Max.
Units
VCC Regulator
Output Voltage
Output Current
Initial Voltage Setpoint
See Table 1
•
1.3
3.5
V
A
18
ILOAD = 0.8A, VOUT = 2.400V
VOUT = 2.000V
2.397 2.424 2.454
2.000 2.020 2.040
1.550 1.565 1.580
V
V
V
VOUT = 1.550V
Output Temperature Drift
TA = 0 to 70°C, VOUT = 2.000V
VOUT = 1.550V
•
•
+8
+6
mV
mV
Line Regulation
VIN = 4.75V to 5.25V
ILOAD = 0.8A to 12.5A
•
-4
mV/V
KΩ
Internal Droop Impedance
Maximum Droop
Output Ripple
13.0
14.4
60
15.8
mV
20MHz BW, ILOAD = 18A
11
mVpk
V
Total Output Variation,
Steady State1
VOUT = 2.000V
VOUT = 1.550V3
•
•
1.940
1.480
2.070
1.590
Total Output Variation,
Transient2
ILOAD = 0.8A to 18A, VOUT = 2.000V
VOUT = 1.550V3
•
•
1.900
1.480
2.100
1.590
V
Short Circuit Detect Current
Efficiency
•
45
50
85
50
60
µA
%
ILOAD = 18A, VOUT = 2.0V
See Figure 3
Output Driver Rise & Fall
Time
nsec
Output Driver Deadtime
See Figure 3
50
nsec
REV. 1.0.0 7/6/00
3
RC5061
PRODUCT SPECIFICATION
Electrical Specifications (Continued)
(VCCA = 5V, VCCP = 12V, VOUT = 2.0V, and TA = +25°C using circuit in Figure 1 unless otherwise noted.)
The • denotes specifications which apply over the full operating temperature range.
Parameter
Conditions
Min.
0
Typ.
Max.
100
4.26
9.35
17
Units
%
Duty Cycle
5V UVLO
•
•
•
3.74
7.65
5
4
V
12V UVLO
8.5
10
V
Soft Start Current
VTT Linear Regulator
Output Voltage
µA
ILOAD ≤ 2A
•
•
•
1.455
2.375
255
1.5
80
1.545
2.625
345
V
Under Voltage Trip Level
VCLK Linear Regulator
Output Voltage
Over Current
%VO
ILOAD ≤ 2A
2.5
80
V
Under Voltage Trip Level
Common Functions
Oscillator Frequency
PWRGD Threshold
Over Current
%VO
310
30
kHz
Logic HIGH, All Outputs
Logic LOW, Any Output
•
•
92
88
108
112
%VOUT
Linear Regulator Under
Voltage Delay Time
Over Current
µsec
Notes:
1. Steady State Voltage Regulation includes Initial Voltage Setpoint, Droop, Output Ripple and Output Temperature Drift and is
measured at the converter’s VFB sense point.
2. As measured at the converter’s VFB sense point. For motherboard applications, the PCB layout should exhibit no more than
0.5mΩ trace resistance between the converter’s output capacitors and the CPU. Remote sensing should be used for optimal
performance.
3. Using the VFB pin for remote sensing of the converter’s output at the load, the converter will be in compliance with Intel’s
VRM 8.4 specification of +50, –80mV. If Intel specifications on maximum plane resistance from the converter’s output
capacitors to the CPU are met, the specification of +40, –70mV at the capacitors will also be met.
4
REV. 1.0.0 7/6/00
PRODUCT SPECIFICATION
RC5061
Table 1. Output Voltage Programming Codes
VID4
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
VID3
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
VID2
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
VID1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
VID0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
Nominal VOUT
1.30V
1.35V
1.40V
1.45V
1.50V
1.55V
1.60V
1.65V
1.70V
1.75V
1.80V
1.85V
1.90V
1.95V
2.00V
2.05V
2.0V
2.1V
2.2V
2.3V
2.4V
2.5V
2.6V
2.7V
2.8V
2.9V
3.0V
3.1V
3.2V
3.3V
3.4V
3.5V
Note:
1. 0 = processor pin is tied to GND.
1 = processor pin is open.
REV. 1.0.0 7/6/00
5
RC5061
PRODUCT SPECIFICATION
Typical Operating Characteristics
(VCCA = 5V, VCCP = 12V, and TA = +25°C using circuits in Figure 1, unless otherwise noted.)
Droop, VCPU = 2.0V, RD = 8K Ω
VCPU Efficiency vs. Output Current
2.04
2.03
2.02
2.01
2.00
1.99
1.98
1.97
1.96
1.95
1.94
88
86
84
82
80
78
76
74
72
70
68
66
64
VOUT = 2.000V
VOUT = 1.550V
0
3
6
9
12
15
18
Output Current (A)
0
3
6
9
12
15
18
Output Current (A)
CPU Output Voltage vs. Output Current
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
0
5
10
15
20
25
Output Current (A)
Output Programming, VID4 = 1
Output Programming, VID4 = 0
2.1
3.5
3.0
2.5
2.0
1.5
1.0
1.9
1.7
1.5
1.3
1.1
1.30 1.40 1.50 1.60 1.70 1.80 1.90 2.00
2.1 2.2 2.3 2.4 2.5 2.6 2.7 2.8 2.9 3.0 3.1 3.2. 3.3 3.4 3.5
DAC Setpoint
DAC Setpoint
6
REV. 1.0.0 7/6/00
PRODUCT SPECIFICATION
RC5061
Typical Operating Characteristics (continued)
Transient Response, 12.5A to 0.5A
Output Ripple, 2.0V @ 18A
1.590V
1.550V
1.480V
Time (100µs/div)
Time (1µs/div)
Switching Waveforms, 18A Load
Transient Response, 0.5A to 12.5A
HIDRV
pin
1.590V
1.550V
LODRV
pin
1.480V
Time (1µs/div)
Time (100µs/div)
Output Startup from Enable
Output Startup, System Power-up
Time (10ms/div)
Time (10ms/div)
REV. 1.0.0 7/6/00
7
RC5061
PRODUCT SPECIFICATION
Typical Operating Characteristics (continued)
Linear Regulator Noise
2.042
2.040
2.038
2.036
2.034
2.030
2.028
2.026
0
25
70
100
Time (100µs/div)
Temperature (°C)
Application Circuit
L1
(Optional)
+5V
CIN*
C1
R6
R7
C2
R2
R1
1
20
19
18
Q1
Q2
+12V
L2
2
3
C5
VO
4
17
16
15
14
COUT
*
VID4
U1
RC5061
R3
VCC
5
6
7
8
9
D1
VID3
VID2
VID1
C3
R4
PWRGD
C6
3.3V IN
Q3
13
12
11
VID0
ENABLE/SS
C4
10
C11
Q4
C10
1.5V†
C8
2.5V†
* Refer to Appendix for values
of COUT, CIN and R7.
† Adjustable with an external
divider.
C9
Figure 1. Typical Application Circuit
(Worst Case Analyzed! See Appendix for Details)
8
REV. 1.0.0 7/6/00
PRODUCT SPECIFICATION
RC5061
Table 2. RC5061 Application Bill of Materials
(Components based on Worst Case Analysis—See Appendix for Details)
Reference Manufacturer Part #
Quantity
Description
Requirements/Comments
C1
AVX
1
4.7µF, 10V Capacitor
TAJB475M010R5
C2, C5
C3-4,C6
C8-9
Panasonic
ECU-V1C105ZFX
2
3
2
1µF, 16V Capacitor
Panasonic
ECU-V1H104ZFX
100nF, 50V Capacitor
1000µF, 6.3V Electrolytic
Sanyo
6MV1000FA
C10-11
CIN
Any
2
*
22µF, 6.3V Capacitor
Low ESR
IRMS = 2A
Sanyo
10MV1200GX
1200µF, 10V Electrolytic
COUT
D1
Sanyo
6MV1500GX
*
1
1500µF, 6.3V Electrolytic
8A Schottky Diode
ESR ≤ 44mΩ
Motorola
MBRD835L
L1
Any
Any
Optional
2.5µH, 8A Inductor
DCR ~ 10mΩ
See Note 1.
L2
1
1
1.3µH, 20A Inductor
N-Channel MOSFET
DCR ~ 2mΩ
Q1
Fairchild
RDS(ON) = 20mΩ @
FDB6030L
VGS = 4.5V See Note 2.
Q2
Fairchild
FDB7030BL
1
2
N-Channel MOSFET
N-Channel MOSFET
RDS(ON) = 10mΩ @
VGS = 4.5V See Note 2.
Q3-4
Fairchild
FDB4030L
R1
Any
Any
Any
Any
Any
1
2
1
1
1
1
33Ω
R2-3
R4
4.7Ω
10KΩ
R6
10Ω
R7
*
U1
Fairchild
DC/DC Controller
RC5061M
Notes:
1. Inductor L1 is recommended to isolate the 5V input supply from noise generated by the MOSFET switching, and to comply
with Intel dI/dt requirements. L1 may be omitted if desired.
2. For 17.4A designs using the TO-220 MOSFETs, heatsinks with thermal resistance Θ < 20°C/W should be used. For designs
SA
using the TO-263 MOSFETs, adequate copper area should be used. For details and a spreadsheet on MOSFET selections,
refer to Applications Bulletins AB-8 and AB-15.
*Refer to Appendix for values.
REV. 1.0.0 7/6/00
9
RC5061
PRODUCT SPECIFICATION
L1
(Optional)
+5V
CIN*
C1
R6
C2
R2
Q1
R7
R1
1
20
19
18
17
R10
+12V
C5
L2
2
3
R8
VO
4
COUT
*
Q2
VID4
U1
RC5061
VCC
R4
R3
5
6
7
8
9
16
15
14
13
D1
VID3
VID2
VID1
C3
PWRGD
3.3V IN
Q3
VID0
ENABLE/SS
C6
12
11
C4
10
C10
Q5
C11
1.5V†
C8
2.5V†
C9
*Refer to Table 3 for values
of COUT and CIN
.
† Adjustable with an external
divider.
Figure 2. Application Circuit for Coppermine/Camino Motherboards
(Typical Design)
10
REV. 1.0.0 7/6/00
PRODUCT SPECIFICATION
RC5061
Table 3. RC5061 Application Bill of Materials for Intel Coppermine/Camino Motherboards
(Typical Design)
Reference Manufacturer Part #
Quantity
Description
Requirements/Comments
C1
AVX
1
4.7µF, 10V Capacitor
TAJB475M010R5
C2, C5
C3-4,C6
C8-9
Panasonic
ECU-V1C105ZFX
2
3
2
1µF, 16V Capacitor
Panasonic
ECU-V1H104ZFX
100nF, 50V Capacitor
1000µF, 6.3V Electrolytic
Sanyo
6MV1000FA
C10-11
CIN
Any
2
3
22µF, 6.3V Capacitor
Low ESR
IRMS = 2A
Sanyo
10MV1200GX
1200µF, 10V Electrolytic
COUT
D1
Sanyo
6MV1500GX
12
1
1500µF, 6.3V Electrolytic
8A Schottky Diode
ESR ≤ 44mΩ
Motorola
MBRD835L
L1
Any
Any
Optional
2.5µH, 5A Inductor
DCR ~ 10mΩ
See Note 1.
L2
1
1
1.3µH, 15A Inductor
N-Channel MOSFET
DCR ~ 3mΩ
Q1
Fairchild
RDS(ON) = 20mΩ @
FDB6030L
VGS = 4.5V See Note 2.
Q2
Fairchild
FDB7030BL
1
2
N-Channel MOSFET
N-Channel MOSFET
RDS(ON) = 10mΩ @
VGS = 4.5V See Note 2.
Q3-4
Fairchild
FDB4030L
R1
R2-3
R4
R6
R7
R8
U1
Any
Any
Any
Any
Any
N/A
1
2
1
1
1
1
1
33Ω
4.7Ω
10KΩ
10Ω
6.24KΩ
30mΩ
PCB Trace Resistor
Fairchild
DC/DC Controller
RC5061M
Notes:
1. Inductor L1 is recommended to isolate the 5V input supply from noise generated by the MOSFET switching, and to comply
with Intel dI/dt requirements. L1 may be omitted if desired.
2. For 12.5A designs using the TO-220 MOSFETs, heatsinks with thermal resistance Θ < 20°C/W should be used. For
SA
designs using the TO-263 MOSFETs, adequate copper area should be used. For details and a spreadsheet on MOSFET
selections, refer to Applications Bulletins AB-8 and AB-15.
REV. 1.0.0 7/6/00
11
RC5061
PRODUCT SPECIFICATION
High Current Output Drivers
Test Parameters
The RC5061 contains two identical high current output drivers
that utilize high speed bipolar transistors in a push-pull config-
uration. The drivers’ power and ground are separated from
the chip’s power and ground for switching noise immunity.
The power supply pin, VCCP, is supplied from an external
12V source through a series 33Ω resistor. The resulting volt-
age is sufficient to provide the gate to source drive to the
tR
tF
5V
2V
HIDRV
to SW
5V
2V
tDT
tDT
external MOSFETs required in order to achieve a low RDS,ON
.
LODRV
2V
2V
Internal Voltage Reference
Figure 3. Ouput Drive Timing Diagram
The reference included in the RC5061 is a precision band-gap
voltage reference. Its internal resistors are precisely trimmed
to provide a near zero temperature coefficient (TC). Based on
the reference is the output from an integrated 5-bit DAC. The
DAC monitors the 5 voltage identification pins, VID0-4. When
the VID4 pin is at logic HIGH, the DAC scales the reference
voltage from 2.0V to 3.5V in 100mV increments. When VID4
is pulled LOW, the DAC scales the reference from 1.30V to
2.05V in 50mV increments. All VID codes are available, includ-
ing those below 1.80V.
Application Information
The RC5061 Controller
The RC5061 is a programmable synchronous DC-DC con-
troller IC. When designed around the appropriate external
components, the RC5061 can be configured to deliver more
than 16A of output current, as appropriate for the Katmai and
Coppermine and other processors. The RC5061 functions as
a fixed frequency PWM step down regulator.
Power Good (PWRGD)
Main Control Loop
The RC5061 Power Good function is designed in accordance
with the Pentium III DC-DC converter specifications and
provides a continuous voltage monitor on the VFB pin. The
circuit compares the VFB signal to the VREF voltage and
outputs an active-low interrupt signal to the CPU should the
power supply voltage deviate more than ±12% of its nominal
setpoint. The Power Good flag provides no other control
function to the RC5061.
Refer to the RC5061 Block Diagram on page 1. The RC5061
implements “summing mode control”, which is different from
both classical voltage-mode and current-mode control. It
provides superior performance to either by allowing a large
converter bandwidth over a wide range of output loads.
The control loop of the regulator contains two main sections:
the analog control block and the digital control block. The
analog section consists of signal conditioning amplifiers feeding
into a comparator which provides the input to the digital control
block. The signal conditioning section accepts input from the
DROOP (current feedback) and VFB (voltage feedback) pins
and sets up two controlling signal paths. The first, the voltage
control path, amplifies the difference between the VFB signal
and the reference voltage from the DAC and presents the
output to one of the summing amplifier inputs. The second,
current control path, takes the difference between the DROOP
and SW pins when the high-side MOSFET is on, reproducing
the voltage across the MOSFET and thus the input current; it
presents the resulting signal to another input of the summing
amplifier. These two signals are then summed together. This
output is then presented to a comparator looking at the oscillator
ramp, which provides the main PWM control signal to the
digital control block.
Output Enable/Soft Start (ENABLE/SS)
The RC5061 will accept an open collector/TTL signal for
controlling the output voltage. The low state disables the output
voltage. When disabled, the PWRGD output is in the low state.
Even if an enable is not required in the circuit, this pin should
have attached a capacitor (typically 100nF) to softstart the
switching. A larger value may occasionally be required if the
converter has a very large capacitor at its output.
Over-Voltage Protection
The RC5061 constantly monitors the output voltage for protec-
tion against over-voltage conditions. If the voltage at the VFB
pin exceeds the selected program voltage, an over-voltage
condition is assumed and the RC5061 disables the output
drive signal to the external high-side MOSFET. The DC-DC
converter returns to normal operation after the output voltage
returns to normal levels.
The digital control block takes the analog comparator input
and the main clock signal from the oscillator to provide the
appropriate pulses to the HIDRV and LODRV output pins.
These two outputs control the external power MOSFETs.
Oscillator
The RC5061 oscillator section uses a fixed frequency of
operation of 300KHz.
There is an additional comparator in the analog control section
whose function is to set the point at which the RC5061 current
limit comparator disables the output drive signals to the
external power MOSFETs.
12
REV. 1.0.0 7/6/00
PRODUCT SPECIFICATION
RC5061
Some margin should be maintained away from both Lmin and
Lmax. Adding margin by increasing L almost always adds
expense since all the variables are predetermined by system
performance except for CO, which must be increased to
increase L. Adding margin by decreasing L can be done by
purchasing capacitors with lower ESR. The RC5061 pro-
vides significant cost savings for the newer CPU systems
that typically run at high supply current.
Design Considerations and Component
Selection
Additional information on design and component selection
may be found in Fairchild’s Application Note 57.
MOSFET Selection
This application requires N-channel Logic Level Enhancement
Mode Field Effect Transistors. Desired characteristics are as
follows:
RC5061 Short Circuit Current Characteristics
The RC5061 protects against output short circuit on the core
supply by turning off both the high-side and low-side
MOSFETs and resetting softstart. The short circuit limit is
set with the RS resistor, as given by the formula
• Low Static Drain-Source On-Resistance, RDS,ON < 20mΩ
(lower is better)
• Low gate drive voltage, VGS = 4.5V rated
• Power package with low Thermal Resistance
• Drain-Source voltage rating > 15V.
ISC *RDS, on
RS
=
IDetect
The on-resistance (RDS,ON) is the primary parameter for
MOSFET selection. The on-resistance determines the power
dissipation within the MOSFET and therefore significantly
affects the efficiency of the DC-DC Converter. For details
and a spreadsheet on MOSFET selection, refer to Applica-
tions Bulletin AB-8.
with IDetect ≈ 50µA, ISC is the desired current limit, and
DS,on the high-side MOSFET’s on resistance. Remember to
make the RS large enough to include the effects of initial tol-
R
erance and temperature variation on the MOSFET’s RDS,on
Alternately, use of a sense resistor in series with the source
of the MOSFET eliminates this source of inaccuracy in the
.
current limit. The value of RS should be less than 8.3KΩ. If a
greater value is necessary, a lower RDS,on MOSFET should
be used instead.
Inductor Selection
Choosing the value of the inductor is a tradeoff between
allowable ripple voltage and required transient response. The
system designer can choose any value within the allowed
minimum to maximum range in order to either minimize ripple
or maximize transient performance. The first order equation
(close approximation) for minimum inductance is:
As an example, Figure 4 shows the typical characteristic of
the DC-DC converter circuit with an FDB6030L high-side
MOSFET (RDS = 20mΩ maximum at 25°C * 1.25 at 75°C =
25mΩ) and a 8.2KΩ RS.
(V – Vout
)
Vout
Vin
ESR
in
CPU Output Voltage vs. Output Current
Lmin
=
x
x
Vripple
f
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
where:
Vin = Input Power Supply
Vout = Output Voltage
f = DC/DC converter switching frequency
ESR = Equivalent series resistance of all output capacitors in
parallel
ripple = Maximum peak to peak output ripple voltage budget.
V
0
5
10
15
20
25
The first order equation for maximum allowed inductance is:
Figure 4. RC5061 Short Circuit Characteristic
(V – Vout) Dm Vtb
in
The converter exhibits a normal load regulation characteristic
until the voltage across the MOSFET exceeds the internal
short circuit threshold of 50µA * 8.2KΩ = 410mV, which
occurs at 410mV/25mΩ = 16.4A. (Note that this current limit
level can be as high as 410mV/15mΩ = 27A, if the MOSFET
has typical RDS,on rather than maximum, and is at 25°C).
2CO
=
Lmax
2
Ipp
where:
Co = The total output capacitance
Ipp = Maximum to minimum load transient current
Vtb = The output voltage tolerance budget allocated to load
transient
Dm = Maximum duty cycle for the DC/DC converter (usually
95%).
At this point, the internal comparator trips and signals the con-
troller to discharge the softstart capacitor. This causes a drastic
reduction in the output voltage as the load regulation collapses
into the short circuit control mode. With a 40mΩ output short,
REV. 1.0.0 7/6/00
13
RC5061
PRODUCT SPECIFICATION
the voltage is reduced to 16.4A * 40mΩ = 650mV. The output
voltage does not return to its nominal value until the output
current is reduced to a value within the safe operating ranges
for the DC-DC converter.
It is necessary to have some low ESR aluminum electrolytic
capacitors at the input to the converter. These capacitors
deliver current when the high side MOSFET switches on.
Figure 5 shows 3 x 1000µF, but the exact number required
will vary with the speed and type of the processor. For the
top speed Katmai and Coppermine, the capacitors should be
rated to take 9A and 6A of ripple current respectively.
Capacitor ripple current rating is a function of temperature,
and so the manufacturer should be contacted to find out the
ripple current rating at the expected operational temperature.
For details on the design of an input filter, refer to Applica-
tions Bulletin AB-15.
If any of the linear regulator outputs are loaded heavily
enough that their output voltage drops below 80% of nominal
for > 30µsec, all RC5061 outputs, including the switcher, are
shut off and remain off until power is recycled.
Schottky Diode Selection
The application circuit of Figure 1 shows a Schottky diode,
D1, which is used as a free-wheeling diode to assure that the
body-diode in Q2 does not conduct when the upper MOSFET
is turning off and the lower MOSFET is turning on. It is
undesirable for this diode to conduct because its high forward
voltage drop and long reverse recovery time degrades efficiency,
and so the Schottky provides a shunt path for the current.
Since this time duration is very short, the selection criterion
for the diode is that the forward voltage of the Schottky at
the output current should be less than the forward voltage of
the MOSFET’s body diode.
2.5µH
Vin
5V
1000µF, 10V
0.1µF
Electrolytic
Figure 5. Input Filter
Active Droop
The RC5061 includes active droop; as the ouptut current
increases, the output voltage drops. This is done in order to
allow maximum headroom for transient response of the con-
verter. The current is sensed by measuring the voltage across
the high-side MOSFET during its on time. Note that this makes
the droop dependent on the temperature of the MOSFET. How-
ever, when the formula given for selecting RS (current limit) is
used, there is a maximum droop possible (-40mV), and when
this value is reached, additional drop across the MOSFET will
not cause any increase in droop—until current limit is reached.
Output Filter Capacitors
The output bulk capacitors of a converter help determine its
output ripple voltage and its transient response. It has already
been seen in the section on selecting an inductor that the ESR
helps set the minimum inductance, and the capacitance value
helps set the maximum inductance. For most converters,
however, the number of capacitors required is determined by
the transient response and the output ripple voltage, and these
are determined by the ESR and not the capacitance value.
That is, in order to achieve the necessary ESR to meet the
transient and ripple requirements, the capacitance value
required is already very large.
Additional droop can be added to the active droop using a
discrete resistor (typically a PCB trace) outside the control
loop, as shown in Figure 2. This is typically only required for
the most demanding applications, such as for the next gener-
ation Intel processor (tolerance = +40/-70mV), as shown in
Figure 2.
The most commonly used choice for output bulk capacitors is
aluminum electrolytics, because of their low cost and low ESR.
The only type of aluminum capacitor used should be those that
have an ESR rated at 100kHz. Consult Application Bulletin
AB-14 for detailed information on output capacitor selection.
Remote Sense
The RC5061 offers remote sense of the output voltage to
minimize the output capacitor requirements of the converter.
It is highly recommended that the remote sense pin, Pin 16,
be tied directly to the processor power pins, so that the
effects of power plane impedance are eliminated. Further
details on use of the remote sense feature of the RC5061 may
be found in Applications Bulletin AB-24.
The output capacitance should also include a number of
small value ceramic capacitors placed as close as possible to
the processor; 0.1µF and 0.01µF are recommended values.
Input Filter
The DC-DC converter design may include an input inductor
between the system +5V supply and the converter input as
shown in Figure 5. This inductor serves to isolate the +5V
supply from the noise in the switching portion of the DC-DC
converter, and to limit the inrush current into the input capac-
itors during power up. A value of 2.5µH is recommended.
14
REV. 1.0.0 7/6/00
PRODUCT SPECIFICATION
RC5061
• Each VCC and GND pin should have its own via to the
Adjusting the Linear Regulators’Output Voltages
appropriate plane. This helps provide isolation between pins.
Any or all of the linear regulators’ outputs may be adjusted
high to compensate for voltage drop along traces, as shown
in Figure 6.
• Place the MOSFETs, inductor, and Schottky as close
together as possible for the same reasons as in the first
bullet above. Place the input bulk capacitors as close to
the drains of the high side MOSFETs as possible. In
addition, placement of a 0.1µF decoupling cap right on
the drain of each high side MOSFET helps to suppress
some of the high frequency switching noise on the input
of the DC-DC converter.
VGATE
VOUT
R
VFB
• Place the output bulk capacitors as close to the CPU as
possible to optimize their ability to supply instantaneous
current to the load in the event of a current transient.
Additional space between the output capacitors and the
CPU will allow the parasitic resistance of the board traces
to degrade the DC-DC converter’s performance under
severe load transient conditions, causing higher voltage
deviation. For more detailed information regarding
capacitor placement, refer to Application Bulletin AB-5.
10KΩ
Figure 6. Adjusting the Output Voltage of the Linear
Regulator
The resistor value should be chosen as
• A PC Board Layout Checklist is available from Fairchild
Applications. Ask for Application Bulletin AB-11.
Vout
R = 10KΩ*
–1
Vnom
Additional Information
For additional information contact Fairchild Semiconductor at
http://www.fairchildsemi.com/cf/tsg.htm or contact an autho-
rized representative in your area.
For example, to get the VTT voltage to be 1.55V instead of
1.50V, use R = 10KΩ * [(1.55/1.50) – 1] = 333Ω.
PCB Layout Guidelines
• Placement of the MOSFETs relative to the RC5061 is
critical. Place the MOSFETs such that the trace length of
the HIDRV and LODRV pins of the RC5061 to the FET
gates is minimized. A long lead length on these pins will
cause high amounts of ringing due to the inductance of the
trace and the gate capacitance of the FET. This noise radiates
throughout the board, and, because it is switching at such
a high voltage and frequency, it is very difficult to suppress.
• In general, all of the noisy switching lines should be kept
away from the quiet analog section of the RC5061. That
is, traces that connect to pins 1, 2, 19, and 20 (HIDRV, SW,
LODRV and VCCP) should be kept far away from the
traces that connect to pins 3, 16 and 17.
• Place the 0.1µF decoupling capacitors as close to the
RC5061 pins as possible. Extra lead length on these
reduces their ability to suppress noise.
REV. 1.0.0 7/6/00
15
RC5061
PRODUCT SPECIFICATION
The value of R7 must be ≤ 8.3KΩ. If a greater value is calcu-
lated, RD must be reduced.
Appendix
Worst-Case Formulae for the Calculation of
Cout, R7, and Cin (Circuit of Figure 1 only)
Number of capacitors needed fo Cout = the greater of:
The following formulae design the RC5061 for worst-case
operation, including initial tolerance and temperature depen-
dence of all of the IC parameters (initial setpoint, reference
tolerance and tempco, active droop tolerance, current sensor
gain), the initial tolerance and temperature dependence of
the MOSFET, and the ESR of the capacitors. The following
information must be provided:
ESR * IO
X =
VT-
or
ESR * IO
Y =
14400 * IO * RD
VT+, the value of the positive transient voltage limit;
VT+ –0.004 * Vnom
+
18 * R5 * 1.1
|VT-|, the absolute value of the negative transient voltage
limit;
Example: Suppose that the transient limits are ±134mV, cur-
rent I is 14.2A, and the nominal voltage is 2.000V, using
MOSFET current sensing and the usual caps. We have VT+
IO, the maximum output current;
=
|VT-| = 0.134, IO = 14.2, Vnom = 2.000, and ∆RD = 0.67. We
calculate:
Vnom, the nominal output voltage;
Vin, the input voltage (typically 5V);
2
2.000
5
2.000
5
ESR, the ESR of the ouput caps, per cap (44mΩ for the
Sanyo parts shown in this datsheet);
–
14.2 *
=
3.47
4 caps
Cin
=
2
RD, the on-resistance of the MOSFET (10mΩ for the
FDB7030);
14.2 * 0.010 * (1 + 0.67) * 1.0
50 * 10-6
5.2KΩ
=
R5 =
∆RD, the tolerance of the current sensor (usually about 67%
for MOSFET sensing, including temperature).
0.044 * 14.2
= 4.66
X
=
Irms, the rms current rating of the input caps (2A for the
0.134
sanyo parts shown in this datasheet.)
0.044 * 14.2
= 4.28
Y
=
2
14400 * 14.2 * 0.020
18 * 10400 * 1.1
Vnom
Vnom
Vin
0.134 – 0.004 * 2.000 +
IO*
–
Vin
Cin
=
Irms
Since X > Y, we choose X, and round up to find we need 5
capacitors for COUT
IO* RD * (1 + ∆RD) * 1.10
.
R7 =
50 * 10-6
16
REV. 1.0.0 7/6/00
PRODUCT SPECIFICATION
RC5061
Mechanical Dimension
20-Lead SOIC
Notes:
Inches
Millimeters
Symbol
Notes
1. Dimensioning and tolerancing per ANSI Y14.5M-1982.
Min.
Max.
Min.
Max.
2. "D" and "E" do not include mold flash. Mold flash or
protrusions shall not exceed .010 inch (0.25mm).
A
.093
.004
.013
.009
.496
.291
.104
.012
.020
.013
.512
.299
2.35
0.10
0.33
0.23
12.60
7.40
2.65
0.30
0.51
0.32
13.00
7.60
A1
B
3. "L" is the length of terminal for soldering to a substrate.
4. Terminal numbers are shown for reference only.
5. "C" dimension does not include solder finish thickness.
6. Symbol "N" is the maximum number of terminals.
C
D
E
5
2
2
e
.050 BSC
1.27 BSC
H
h
.394
.010
.016
.419
.029
.050
10.00
0.25
0.40
10.65
0.75
1.27
L
3
6
N
α
20
20
0°
8°
0°
8°
ccc
—
.004
—
0.10
20
11
E
H
1
10
h x 45°
D
C
A1
A
α
SEATING
PLANE
– C –
e
B
L
LEAD COPLANARITY
ccc C
REV. 1.0.0 7/6/00
17
RC5061
PRODUCT SPECIFICATION
Ordering Information
Product Number
Package
RC5061M
20 pin SOIC
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY
PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY
LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER
DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES
OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR
CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the body,
or (b) support or sustain life, or (c) whose failure to perform
when properly used in accordance with instructions for use
provided in the labeling, can be reasonably expected to
result in significant injury to the user.
2. A critical component is any component of a life support
device or system whose failure to perform can be
reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
www.fairchildsemi.com
7/6/00 0.0m 003
Stock#DS30005061
2000 Fairchild Semiconductor Corporation
相关型号:
RC5100AA110KJKNT
RESISTOR, METAL GLAZE/THICK FILM, 0.25 W, 5 %, 100 ppm, 110000 ohm, SURFACE MOUNT, 1005, CHIP, HALOGEN FREE AND ROHS COMPLIANT
VISHAY
RC5100AA110KJKNW
RESISTOR, METAL GLAZE/THICK FILM, 0.25 W, 5 %, 100 ppm, 110000 ohm, SURFACE MOUNT, 1005, CHIP, HALOGEN FREE AND ROHS COMPLIANT
VISHAY
RC5100AA113RFKFT
RESISTOR, METAL GLAZE/THICK FILM, 0.25 W, 1 %, 100 ppm, 113 ohm, SURFACE MOUNT, 1005, CHIP, HALOGEN FREE AND ROHS COMPLIANT
VISHAY
RC5100AA113RFKFW
RESISTOR, METAL GLAZE/THICK FILM, 0.25 W, 1 %, 100 ppm, 113 ohm, SURFACE MOUNT, 1005, CHIP, HALOGEN FREE AND ROHS COMPLIANT
VISHAY
RC5100AA113RFKNB
RESISTOR, METAL GLAZE/THICK FILM, 0.25 W, 1 %, 100 ppm, 113 ohm, SURFACE MOUNT, 1005, CHIP, HALOGEN FREE AND ROHS COMPLIANT
VISHAY
RC5100AA113RFKNT
RESISTOR, METAL GLAZE/THICK FILM, 0.25 W, 1 %, 100 ppm, 113 ohm, SURFACE MOUNT, 1005, CHIP, HALOGEN FREE AND ROHS COMPLIANT
VISHAY
RC5100AA113RFKNW
RESISTOR, METAL GLAZE/THICK FILM, 0.25 W, 1 %, 100 ppm, 113 ohm, SURFACE MOUNT, 1005, CHIP, HALOGEN FREE AND ROHS COMPLIANT
VISHAY
RC5100AA115KFKNB
RESISTOR, METAL GLAZE/THICK FILM, 0.25 W, 1 %, 100 ppm, 115000 ohm, SURFACE MOUNT, 1005, CHIP, HALOGEN FREE AND ROHS COMPLIANT
VISHAY
RC5100AA115KFKNT
RESISTOR, METAL GLAZE/THICK FILM, 0.25 W, 1 %, 100 ppm, 115000 ohm, SURFACE MOUNT, 1005, CHIP, HALOGEN FREE AND ROHS COMPLIANT
VISHAY
RC5100AA115RFKNW
RESISTOR, METAL GLAZE/THICK FILM, 0.25 W, 1 %, 100 ppm, 115 ohm, SURFACE MOUNT, 1005, CHIP, HALOGEN FREE AND ROHS COMPLIANT
VISHAY
RC5100AA118RFKFB
RESISTOR, METAL GLAZE/THICK FILM, 0.25 W, 1 %, 100 ppm, 118 ohm, SURFACE MOUNT, 1005, CHIP, HALOGEN FREE AND ROHS COMPLIANT
VISHAY
©2020 ICPDF网 联系我们和版权申明