SFI2955 [FAIRCHILD]
Advanced Power MOSFET; 先进的功率MOSFET
| 型号： | SFI2955 |
| 厂家： | 
FAIRCHILD SEMICONDUCTOR |
| 描述： | Advanced Power MOSFET |
| 文件： | 总7页 (文件大小：250K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SFW/I2955
Advanced Power MOSFET
FEATURES
BVDSS = -60 V
Avalanche Rugged Technology
Rugged Gate Oxide Technology
Lower Input Capacitance
W
RDS(on) = 0.3
ID = -9.4 A
Improved Gate Charge
Extended Safe Operating Area
175oC Operating Temperature
Lower Leakage Current : 10 mA (Max.) @ VDS = -60V
Low RDS(ON) : 0.22 W (Typ.)
D2-PAK
I2-PAK
2
1
1
2
3
3
1. Gate 2. Drain 3. Source
Absolute Maximum Ratings
Symbol
Characteristic
Drain-to-Source Voltage
Value
-60
Units
VDSS
V
Continuous Drain Current (TC=25oC)
Continuous Drain Current (TC=100oC)
Drain Current-Pulsed
-9.4
-6.6
-38
ID
A
IDM
VGS
EAS
IAR
A
V
1
O
+
_
Gate-to-Source Voltage
20
Single Pulsed Avalanche Energy
Avalanche Current
151
-9.4
4.9
mJ
A
2
O
1
O
EAR
dv/dt
Repetitive Avalanche Energy
mJ
V/ns
W
1
O
Peak Diode Recovery dv/dt
3
-5.5
3.8
O
o
*
Total Power Dissipation (TA=25 C)
Total Power Dissipation (TC=25oC)
Linear Derating Factor
PD
49
W
W/oC
0.33
Operating Junction and
TJ , TSTG
- 55 to +175
300
Storage Temperature Range
oC
Maximum Lead Temp. for Soldering
Purposes, 1/8” from case for 5-seconds
TL
Thermal Resistance
Symbol
RqJC
Characteristic
Typ.
Max.
Units
Junction-to-Case
--
--
--
3.06
40
oC/W
RqJA
*
Junction-to-Ambient
Junction-to-Ambient
RqJA
62.5
*
When mounted on the minimum pad size recommended (PCB Mount).
Rev. B
©1999 Fairchild Semiconductor Corporation
P-CHANNEL
POWER MOSFET
SFW/I2955
Electrical Characteristics (TC=25oC unless otherwise specified)
Symbol
BVDSS
Characteristic
Min. Typ. Max. Units
Test Condition
VGS=0V,ID=-250mA
Drain-Source Breakdown Voltage
Breakdown Voltage Temp. Coeff.
Gate Threshold Voltage
V
V/oC
V
-60
-- -0.04 --
-2.0 -- -4.0
-- -100
--
--
DBV/DTJ
VGS(th)
ID=-250mA
DS=-5V,ID=-250mA
VGS=-20V
GS=20V
VDS=-60V
DS=-48V,TC=150oC
See Fig 7
V
Gate-Source Leakage , Forward
Gate-Source Leakage , Reverse
--
--
--
--
IGSS
nA
V
--
--
100
-10
IDSS
Drain-to-Source Leakage Current
mA
V
-- -100
Static Drain-Source
On-State Resistance
Forward Transconductance
Input Capacitance
RDS(on)
VGS=-10V,ID=-4.7A
VDS=-30V,ID=-4.7A
4
--
--
W
W
0.3
O
gfs
Ciss
Coss
Crss
td(on)
tr
4
--
--
--
--
--
--
--
--
--
--
--
4.0
--
O
465 600
VGS=0V,VDS=-25V,f =1MHz
Output Capacitance
Reverse Transfer Capacitance
Turn-On Delay Time
Rise Time
215
60
30
50
65
50
19
--
140
40
pF
See Fig 5
11
VDD=-30V,ID=-9.4A,
21
RG=18W
ns
td(off)
tf
Turn-Off Delay Time
Fall Time
29
4
See Fig 13
5
OO
20
Qg
Total Gate Charge
Gate-Source Charge
Gate-Drain(“ Miller” ) Charge
15
V
DS=-48V,VGS=-10V,
Qgs
Qgd
nC
2.9
6.0
ID=-9.4A
4
5
--
See Fig 6 & Fig 12 OO
Source-Drain Diode Ratings and Characteristics
Symbol
Characteristic
Continuous Source Current
Pulsed-Source Current
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
Min. Typ. Max. Units
Test Condition
Integral reverse pn-diode
in the MOSFET
TJ=25oC,IS=-9.4A,VGS=0V
TJ=25oC,IF=-9.4A
IS
ISM
VSD
trr
--
--
--
--
--
--
-9.4
-38
-3.8
--
A
1
O
4
O
V
--
ns
mC
80
4
Qrr
-- 0.22 --
diF/dt=100A/ms
O
Notes ;
Repetitive Rating : Pulse Width Limited by Maximum Junction Temperature
1
O
L=2.0mH, IAS=-9.4A, VDD=-25V, RG=27W*, Starting TJ =25oC
2
O
3 ISD -9.4A, di/dt 250A/ms, V
4 Pulse Test : Pulse Width = 250 ms, Duty Cycle 2%
BVDSS , Starting TJ =25oC
_
<
_
<
_
<
DD
O
_
<
O
Essentially Independent of Operating Temperature
5
O
P-CHANNEL
POWER MOSFET
SFW/I2955
Fig 1. Output Characteristics
Fig 2. Transfer Characteristics
VGS
Top :
- 15 V
- 10 V
- 8.0 V
- 7.0 V
- 6.0 V
- 5.5 V
- 5.0 V
1
1
10
10
Bottom : - 4.5 V
175 o
C
0
0
10
10
@ Notes :
1. VGS = 0 V
2. VDS = -30 V
25 o
C
@ Notes :
1. 250 s Pulse Test
m
2. T = 25o
C
- 55 o
C
m
C
3. 250 s Pulse Test
-1
-1
10
10
-1
0
1
10
10
10
2
4
6
8
10
-V , Drain-Source Voltage [V]
-V , Gate-Source Voltage [V]
DS
GS
Fig 3. On-Resistance vs. Drain Current
Fig 4. Source-Drain Diode Forward Voltage
0.4
0.3
0.2
0.1
0.0
1
10
VGS = -10 V
0
10
175 o
C
@ Notes :
1. VGS = 0 V
25 oC
2. 250 s Pulse Test
m
VGS = -20 V
@ Note : T = 25o
C
J
-1
10
0
10
20
30
40
50
60
70
0.5
1.0
1.5
2.0
2.5
3.0
3.5
-I , Drain Current [A]
-VSD , Source-Drain Voltage [V]
D
Fig 5. Capacitance vs. Drain-Source Voltage
Fig 6. Gate Charge vs. Gate-Source Voltage
800
600
400
200
0
C
iss= Cgs+ Cgd ( Cds= shorted )
V
V
V
DS = -12 V
DS = -30 V
DS = -48 V
Coss= Cds+ C
gd
C iss
10
Crss= C
gd
C oss
@ Notes :
1. VGS = 0 V
5
2. f = 1 MHz
C rss
@ Notes : ID =-9.4 A
0
0
1
0
2
4
6
8
10
12
14
16
10
10
Q , Total Gate Charge [nC]
-VDS , Drain-Source Voltage [V]
G
P-CHANNEL
POWER MOSFET
SFW/I2955
Fig 7. Breakdown Voltage vs. Temperature
Fig 8. On-Resistance vs. Temperature
1.2
2.5
2.0
1.5
1.0
0.5
0.0
1.1
1.0
@ Notes :
1. VGS = -10 V
2. I = -4.7 A
D
0.9
@ Notes :
1. VGS = 0 V
2. I = -250
A
m
D
0.8
-75 -50 -25
0
25
50
75
100 125 150 175 200
-75 -50 -25
0
25
50
75
100 125 150 175 200
TJ , Junction Temperature [oC]
TJ , Junction Temperature [oC]
Fig 9. Max. Safe Operating Area
Fig 10. Max. Drain Current vs. Case Temperature
Operation in This Area
is Limited by RDS(on)
2
10
10
0.1 ms
1 ms
8
6
4
2
0
1
10
10 ms
DC
@ Notes :
1. T = 25o
C
C
0
10
2. T = 175o
C
J
3. Single Pulse
-1
10
0
1
2
25
50
75
100
125
150
175
10
10
10
Tc , Case Temperature [oC]
-V , Drain-Source Voltage [V]
DS
Fig 11. Thermal Response
D=0.5
100
@
Notes :
1. Zq JC(t)=3.06 oC/W Max.
0.2
2. Duty Factor, D=t /t2
1
3. TJM-TC=PDM*Zq JC(t)
0.1
P.DM
0.05
t1.
t2.
0.02
10-1
0.01
single pulse
10-5
10-4
10-3
10-2
10-1
100
101
t1 , Square Wave Pulse Duration [sec]
P-CHANNEL
POWER MOSFET
SFW/I2955
Fig 12. Gate Charge Test Circuit & Waveform
“ Current Regulator ”
VGS
Same Type
as DUT
50KW
Qg
12V
200nF
-10V
300nF
VDS
Qgs
Qgd
VGS
DUT
R2
-3mA
R1
Charge
Current Sampling (IG) Current Sampling (ID)
Resistor Resistor
Fig 13. Resistive Switching Test Circuit & Waveforms
RL
t on
t off
Vout
Vin
tf
td(on)
tr
td(off)
VDD
( 0.5 rated VDS
)
Vin
10%
RG
DUT
-10V
90%
Vout
Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms
BVDSS
1
2
2
LL
ID
----
--------------------
EAS
=
LL IAS
BVDSS -- VDD
VDS
t p
Time
Vary tp to obtain
required peak ID
VDD
VDS (t)
RG
VDD
C
ID (t)
DUT
-10V
IAS
BVDSS
t p
P-CHANNEL
POWER MOSFET
SFW/I2955
Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms
+
VDS
DUT
--
I S
L
Driver
VGS
Compliment of DUT
(N-Channel)
RG
VDD
VGS
• dv/dt controlled by “RG”
• IS controlled by Duty Factor “D”
Gate Pulse Width
--------------------------
VGS
D =
Gate Pulse Period
10V
( Driver )
Body Diode Reverse Current
IRM
I S
( DUT )
di/dt
IFM , Body Diode Forward Current
Vf
VDS
( DUT )
Body Diode
VDD
Forward Voltage Drop
Body Diode Recovery dv/dt
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.
ACEx™
CoolFET™
ISOPLANAR™
MICROWIRE™
POP™
PowerTrench™
QS™
UHC™
VCX™
CROSSVOLT™
E2CMOSTM
FACT™
FACT Quiet Series™
Quiet Series™
SuperSOT™-3
SuperSOT™-6
SuperSOT™-8
TinyLogic™
FAST®
FASTr™
GTO™
HiSeC™
DISCLAIMER
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NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or
systems which, (a) are intended for surgical implant into
the body, or (b) support or sustain life, or (c) whose
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
reasonably expected to result in significant injury to the
user.
2. A critical component is any component of a life
support device or system whose failure to perform can
be reasonably expected to cause the failure of the life
support device or system, or to affect its safety or
effectiveness.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative or
In Design
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
Preliminary
First Production
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
No Identification Needed
Obsolete
Full Production
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
Not In Production
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
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