SG6518 [FAIRCHILD]
LCD Power Supply Supervisor; LCD电源监控
| 型号： | SG6518 |
| 厂家： | 
FAIRCHILD SEMICONDUCTOR |
| 描述： | LCD Power Supply Supervisor |
| 文件： | 总11页 (文件大小：590K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
December 2007
SG6518
LCD Power Supply Supervisor
Features
Description
SG6518 provides the over-voltage protection (OVP) for
5V, 12V, and outputs V1 and V2 as well as over-current
protection (OVP) for 5V, 12V, and outputs V1 and V2.
When the voltage of OTP pin decreases to 1.2V, the
over-temperature protection (OTP) function is enabled.
FPO is set to HIGH to turn off the PWM control IC. The
voltage difference across the external current shunt is
used for OCP functions. An external resistor can be
used to adjust protection threshold.
Two Adjustable Voltage Sense Input Pins: VSV1
and VSV2
Over-voltage Protection (OVP) for 5V, 12V, and two
outputs: V1, V2
Over-current Protection (OCP) for 5V, 12V, and two
outputs: V1, V2
Adjustable Voltage Control Sense Input of V1 and
V2 (ADJ-V1, ADJ-V2)
The power supply is turned on after a 13ms delay time
when the PSON signal is set from LOW to HIGH. To
turn off the power supply, PSON signal is set from
HIGH to LOW with the delay time 13ms.
Open-drain Output for FPO Pin
13ms PSON Control Delay
No Lockup During the Fast AC Power-on/off
Wide Supply Voltage Range: 4V to 15V
Programmable Over-temperature Protection (OTP)
Applications
LCD Power Supply
Ordering Information
Part Number
SG6518DZ
Operating Temperature Range
-40°C to +85°C
Package
16-DIP
Packing Method
Rail
SG6518SZ
16-SOP
Reel & Tape
-40°C to +85°C
All packages are lead free per JEDEC: J-STD-020B standard.
© 2007 Fairchild Semiconductor Corporation
SG6518 • Rev. 1.0.0
www.fairchildsemi.com
Application Diagram
Figure 1. Typical Application
Note:
1. R1 = 200Ω and R2 = 200Ω are suggested.
2. C1 and C2 are suggested to be 100nF to 2.2uF.
Internal Block Diagram
Figure 2. Function Block Diagram
Note:
3. The VSV1 pin is the power pin for the two OCP comparators.
© 2007 Fairchild Semiconductor Corporation
www.fairchildsemi.com
SG6518 • Rev. 1.0.0
2
Pin Configuration
Figure 3. Pin Configuration
Pin Definitions
Pin #
Name Description
1
GND
Ground.
Fault protection output. Output signal to control the primary PWM IC through an opto-coupler.
When FPO is LOW, the PWM IC is enabled.
2
3
FPO
Remote on/off logic input from CPU or main-board. The power supply is turned on/off after 13ms
delay.
V1 voltage sense input.(4)
PSON
VSV1
4
5
ADJ-V1 V1 over-voltage control sense input.
Reference setting. One external resistor, Ri, connected between the RI and GND pins
determines a reference current, IREF = 1.5V/Ri, for OCP programming.
6
RI
7
8
ADJ-V2 V2 over-voltage control sense input.
VSV2
V2 voltage sense input.
V2 over-current protection sense input. In typical applications, this pin is connected to the
positive end of a current shunt through one resistor. When the voltage on ISV2 is higher than
that of VSV2 by 6mV, OCP is enabled.
9
ISV2
VSV1 over-current protection sense input. In typical applications, this pin is connected to the
positive end of a current shunt through one resistor. When the voltage on ISV1 is higher than
that of VSV1 by 6mV, OCP is enabled.
10
ISV1
12V over-current protection sense input. In typical applications, this pin is connected to the
positive end of a current shunt through one resistor. When the voltage on IS12 is higher than
that of VS12 by 6mV, OCP is enabled.
11
12
13
IS12
VS12
IS5
12V over-voltage control sense input.
5V over-current protection sense input. In typical applications, this pin is connected to the
positive end of a current shunt through one resistor. When the voltage on IS5 is higher than that
of VS5 by 6mV, OCP is enabled.
14
15
VS5
5V over-voltage control sense input.
Supply voltage, 4V ~ 15V. For general applications, it is connected to 5V-standby for supply
voltage.
VDD
For over-temperature protection. An external NTC thermistor is connected from this pin to
ground. The impedance of the NTC decreases at high temperatures. Once the voltage of the
OTP pin drops below a fixed limit of 1.2V, FPO is open-drain output.
16
OTP
Note:
4. The VSV1 pin is the power pin for the two OCP comparators; it must be higher than VSV2.
© 2007 Fairchild Semiconductor Corporation
www.fairchildsemi.com
SG6518 • Rev. 1.0.0
3
Timing Diagram
Figure 4. PSON On/Off and 5V, 12V, V1, V2, OVP, and OCP Functions
© 2007 Fairchild Semiconductor Corporation
SG6518 • Rev. 1.0.0
www.fairchildsemi.com
4
Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device
reliability. The absolute maximum ratings are stress ratings only. All voltage values, except differential voltages, are
given with respect to GND pin. Stresses beyond those listed under “absolute maximum ratings” may cause
permanent damage to the device.
Symbol
Parameter
Min.
Max.
16
Unit
VDD
DC Supply Voltage
Input Voltage
V
ISV1, ISV2, VSV1, VSV2
PSON, IS12,VS12
-0.3
-0.3
-0.3
-0.3
30.0
15.0
7.0
VI
V
ADJ-V1, ADJ-V2, IS5, VS5, OTP, RI
FPO
VOUT
PD
Output Voltage
15.0
400
V
Power Dissipation
mW
TJ
TSTG
TL
Operating Free Junction Temperature Range
Storage Temperature Range
-40
-55
+125
+150
+260
°C
°C
°C
Lead Temperature (Wave Soldering, 10 Seconds)
Electrostatic Discharge Capability, Human Body Model
Electrostatic Discharge Capability, Machine Model
2.5
kV
V
ESD
200
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not
recommend exceeding them or designing to Absolute Maximum Ratings.
Symbol
VDD
Parameter
Min.
4
Max.
15
Unit
V
DC Supply Voltage
Operating Ambient Temperature Range
TA
-40
+85
°C
© 2007 Fairchild Semiconductor Corporation
SG6518 • Rev. 1.0.0
www.fairchildsemi.com
5
Electrical Characteristics
Unless otherwise noted, operating specifications are VDD = 5V, TA=+25°C
Symbol
Parameter
Conditions
Min.
Typ.
Max.
Units
VDD SECTION
VDD
IDD
tR
DC Supply Voltage
Supply Current
4
1
15
V
mA
ms
V
1.5
Supply Voltage Rising Time
VDD Start Threshold Voltage
VST
4
Over-Voltage and Over-Current Protection (OVP, OCP)
Over-Voltage Protection VS5
VOVP
5.7
6.1
6.5
V
Over-Voltage Protection VS12
13.2
13.8
14.4
Ratio of Current Sense Sink Current to
IREF
Current Sense Setting Pin (RI) Source
Current
7.6
-7
8.0
8.4
RI = 23KΩ ~ 120KΩ
VOFFSET
ILKG-FPO
VOL-FPO
tOVP
OCP Comparator Input Offset Voltage
Leakage Current (FPO)
Low Level Output Voltage (FPO)
OVP Delay Time
7
5
mV
µA
V
FPO = 5V
I
SINK 10mA
0.5
33
12.5
1.455
158
75
110
27.5
1.545
242
µs
ms
V
tOCP
OCP Delay Time
20.0
1.50
200
VRI
RI Pin Voltage
tST-OCP
Start-up OCP Protection Delay Time
FPO = LOW
ms
ADJ Section
VADJNOR Normal Voltage of ADJ-V1 & ADJ-V2
1.455
1.455
1.50
1.80
1.545
1.545
V
V
Over-Voltage Protection of ADJ-V1 &
ADJ-V2
VADJOVP
PSON Control
RPSON
VIH
Input Pull-low Resistor
50
2
100
KΩ
V
High-level Input Voltage
Low-level Input Voltage
VIL
1
V
PSON HIGH to FPO
LOW
6
6
13
13
20
ms
ms
tPSON
Timing PSON to On/Off
PSON LOW to FPO
HIGH
20
Over-Temperature Protection (OTP)
Ratio of OTP Source Current to Current
Sense Setting Pin (RI) Source Current
Threshold Voltage for OTP
IOTP
5.82
6.00
6.18
VOTP-OFF
tOTP
1.164
225
1.200
325
1.236
425
V
µs
Over-Temperature Debounce
© 2007 Fairchild Semiconductor Corporation
SG6518 • Rev. 1.0.0
www.fairchildsemi.com
6
Typical Performance Characteristics
These characteristic graphs are normalized at TA = 25°C.
1.5
1.4
1.3
1.2
1.1
1.0
8.4
8.3
8.2
8.1
8.0
7.9
7.8
7.7
7.6
-40 -25 -10
5
20
35
50
65
80
95
110 125
-40 -25 -10
5
20
35
50
65
80
95 110 125
Temperature℃
Temperature℃
Figure 6. Ratio of Sense Sink Current Sense Setting
Pin (RI) Source Current
Figure 5. Supply Current
5
4
30
25
20
15
10
3
2
1
0
-1
-2
-3
-4
-5
-40 -25 -10
5
20
35
50
65
80
95
110 125
-40 -25 -10
5
20
35
50
65
80
95
110 125
110 125
110 125
Temperature℃
Temperature℃
Figure 7. OCP Comparator Input Offset Voltage
Figure 8. OCP Delay Time
1.60
1.55
1.50
1.45
1.40
100
90
80
70
60
-40 -25 -10
5
20
35
50
65
80
95
110 125
-40 -25 -10
5
20
35
50
65
80
95
Temperature℃
Temperature℃
Figure 9. RI Pin Voltage
Figure 10. OVP Delay Time
0.6
0.5
0.4
0.3
0.2
110
100
90
80
70
60
50
-40 -25 -10
5
20
35
50
65
80
95
110 125
-40 -25 -10
5
20
35
50
65
80
95
Temperature℃
Temperature℃
Figure 11. Low Level Output Voltage
Figure 12. Input Pull-low Resistor
© 2007 Fairchild Semiconductor Corporation
SG6518 • Rev. 1.0.0
www.fairchildsemi.com
7
Applications Information (OCP)
The SG6518 provides over-current protection for the
5V, 12V, and two outputs: V1, V2. When an OCP
condition occurs at any of the voltage rails, FPO opens.
The internal OCP comparators have a very small offset
voltage (±6mV). The sink currents of IS5, IS12, ISV1,
and ISV2 are eight times the current at the RI pin. The
current at the RI pin is VRI/Ri. Here is an example
demonstrating how to set the over-current protection.
If I1 • R1 > (IRI • 8) • R2, OCP is active.
To select R2 Resistor:
If R1 = 5mΩ, Ri = 51k, OCP Protection Level is 5A, then
R2 = (I1 • R1)/(IRI • 8)
= (5A • 5mΩ) / {(1.5V / 51K) • 8}
= 106Ω
Figure 13. Over-Current Protection
© 2007 Fairchild Semiconductor Corporation
SG6518 • Rev. 1.0.0
www.fairchildsemi.com
8
Physical Dimensions
θ
D
9
8
16
B
E1
e
E
1
A2
A
L
e
b1
A1
Figure 14. 16-Pin, Dual Inline Package (DIP)(D)
Dimensions
Millimeter
Symbol
Inch
Min.
Min.
Typ.
Max.
Typ.
Max.
A
5.334
3.429
0.210
0.135
A1
A2
b
0.381
3.175
0.015
0.125
3.302
1.524
0.457
19.177
7.620
6.299
2.540
3.302
9.017
7°
0.130
0.060
0.018
0.755
0.300
0.248
0.100
0.130
0.355
7°
b1
D
18.669
6.121
19.685
6.477
0.735
0.241
0.775
0.255
E
E1
e
L
2.921
8.509
0°
3.810
9.525
15°
0.115
0.335
0°
0.150
0.375
15°
eB
θ°
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify
or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically
the warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/
© 2007 Fairchild Semiconductor Corporation
SG6518 • Rev. 1.0.0
www.fairchildsemi.com
9
Physical Dimensions (Continued)
16
9
E
H
Detail A
F
1
8
c
b
e
θ
D
A2
A
L
y
Detail A
A1
Figure 15. 16-Pin, Small-Outline Package (SOP)(S)
Dimensions
Millimeter
Min.
Inch
Min.
Symbol
Typ.
Max.
Typ.
Max.
A
A1
A2
b
1.346
1.753
0.254
1.499
0.053
0.004
0.049
0.069
0.010
0.059
0.101
1.244
0.406
0.203
0.016
0.008
c
D
E
9.804
3.810
10.008
3.988
0.386
0.150
0.394
0.157
e
1.270
0.050
H
L
5.791
0.406
6.198
1.270
0.228
0.016
0.244
0.050
0.381X45°
0.015X45°
F
y
θ°
0.101
0.004
0°
8°
0°
8°
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify
or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically
the warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/
© 2007 Fairchild Semiconductor Corporation
SG6518 • Rev. 1.0.0
www.fairchildsemi.com
10
© 2007 Fairchild Semiconductor Corporation
SG6518 • Rev. 1.0.0
www.fairchildsemi.com
11
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