SG6901ASZ [FAIRCHILD]
PFC / Flyback PWM Controller; PFC /反激式PWM控制器
| 型号： | SG6901ASZ |
| 厂家： | 
FAIRCHILD SEMICONDUCTOR |
| 描述： | PFC / Flyback PWM Controller |
| 文件： | 总18页 (文件大小：705K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Product Specification
PFC / Flyback PWM Controller
SG6901A
very few external components to achieve versatile
protections. It is available in a 20-pin SOP package.
FEATURES OVERVIEW
Interleaved PFC/PWM switching
Low start-up and operating current
Innovative switching charge multiplier-divider
Multi-vector control for improved PFC output
transient response
The patented interleave-switching feature synchronizes
the PFC and PWM stages and reduces switching noise.
For PFC stage, the proprietary multi-vector control
Average-current-mode control for PFC
Programmable two-level PFC output voltage
PFC over-voltage and under-voltage protections
PFC and PWM feedback open-loop protection
Cycle-by-cycle current limiting for PFC/PWM
Slope compensation for PWM
scheme provides a fast transient response in a
low-bandwidth PFC loop, in which the overshoot and
undershoot of the PFC voltage are clamped. If the
feedback loop is broken, the SG6901A shuts off PFC to
prevent extra-high voltage on output. Programmable
two-level output voltage control reduces the PFC output
voltage at low line input to increase the efficiency of the
power supply.
Constant power limit for PWM
Brownout protection
Over-temperature protection (OTP)
For the flyback PWM, the synchronized slope
compensation ensures the stability of the current loop
under continuous-conduction-mode operation. Built-in
APPLICATIONS
Switching Power Supplies with Active PFC and
Standby Power
line-voltage
compensation
maintains
constant
High-Power Adaptors
output-power limit. Hiccup operation during output
overloading is also guaranteed.
DESCRIPTION
The highly integrated SG6901A is designed for power
supplies with boost PFC and flyback PWM. It requires
In addition, SG6901A provides protection functions, such
as brownout and RI pin open/short protection.
Typical Application
© System General Corp.
Version 1.0.1 (IAO33.0062.B0)
- 1 -
www.sg.com.tw • www.fairchildsemi.com
September 26, 2007
Product Specification
PFC / Flyback PWM Controller
SG6901A
MARKING DIAGRAMS
PIN CONFIGURATION
T: S=SOP
P : Z=Lead Free
SG6901A TP
Null=regular package
XXXXXXXX: Wafer Lot
Y: Year; WW: Week
V: Assembly Location
XXXXXXXXYWWV
ORDERING INFORMATION
Part Number
Pb-Free
Package
SG6901ASZ
20-pin SOP
© System General Corp.
Version 1.0.1 (IAO33.0062.B0)
- 2 -
www.sg.com.tw • www.fairchildsemi.com
September 26, 2007
Product Specification
PFC / Flyback PWM Controller
SG6901A
PIN DESCRIPTIONS
Name
Pin No.
Type
Function
Line voltage detection. The pin is used for PFC multiplier, RANGE control of PFC output
voltage, and brownout protection. For brownout protection, the controller is disabled
after a delay time when the VRMS voltage drops below a threshold.
Line-Voltage
Detection
VRMS
1
Reference setting. One resistor connected between RI and ground determines the
switching frequency. The switching frequency is equal to [1560 / RI] KHz, where RI is
in KΩ. For example, if RI is equal to 24KΩ, the switching frequency is 65KHz.
RI
2
3
Oscillator Setting
This pin supplies an over-temperature protection signal. A constant current is output from
this pin. An external NTC thermistor must be connected from this pin to ground. The
impedance of the NTC thermistor decreases whenever the temperature increases. Once
the voltage of the OTP pin drops below the OTP threshold, the SG6901A is disabled.
Over Temperature
Protection
OTP
Output for PFC
Current Amplifier
Inverting Input for
PFC Current
This is the output of the PFC current amplifier. The signal from this pin is compared with
an internal sawtooth and determines the pulse width for PFC gate drive.
IEA
4
5
The inverting input of the PFC current amplifier. Proper external compensation circuits
result in excellent input power factor via average-current-mode control.
IPFC
Amplifier
Non-inverting Input
for PFC Current
Amplifier
The non-inverting input of the PFC current amplifier and the output of multiplier. Proper
external compensation circuits will result in excellent input power factor via
average-current-mode control.
IMP
6
7
8
ISENS
E
Peak Current Limit
Setting for PFC
The peak-current setting for PFC.
The control input for voltage-loop feedback of PWM stage. It is internally pulled high
through a 6.5kΩ resistance. Usually an external opto-coupler from secondary feedback
circuit is connected to this pin.
FBPW
M
PWM Feedback
Input
The current-sense input for the flyback PWM. Via a current sense resistor, this pin
provides the control input for peak-current-mode control and cycle-by-cycle current
limiting.
PWM Current
Sense
IPWM
AGND
9
10
Ground
Signal ground.
During startup, the SS pin will charge an external capacitor with a 50µA (RI=24KΩ)
constant current source. The voltage on FBPWM will be clamped by SS during startup. In
the event of a protection condition occurring and/or PWM being disabled, the SS pin will
be quickly discharged.
SS
11
PWM Soft-Start
The totem-pole output drive for the Flyback PWM MOSFET. This pin is internally
clamped under 17V to protect the MOSFET.
OPWM
GND
12
13
14
15
PWM Gate Drive
Ground
Power ground.
The totem-pole output drive for the PFC MOSFET. This pin is internally clamped under
17V to protect the MOSFET.
OPFC
VDD
PFC Gate Drive
Supply
The power supply pin.
Two-level output voltage setting for PFC. The PFC output voltage at low line can be
reduced to improve efficiency. The RANGE pin has high impedance whenever the VRMS
voltage is lower than a threshold.
PFC Output
RANGE
16
Voltage Control
The PFC stage over voltage input. The comparator disables the PFC output driver if the
voltage at this input exceeds a threshold. This pin can be connected to FBPFC or it can be
connected to the PFC boost output through a divider network.
PFC Over-Voltage
Input
OVP
17
18
Voltage Feedback
Input for PFC
Error Amplifier
Output for PFC
Voltage Feedback
Loop
The feedback input for PFC voltage loop. The inverting input of PFC error amplifier. This
pin is connected to the PFC output through a divider network.
FBPFC
The error amplifier output for PFC voltage feedback loop. A compensation network
(usually a capacitor) is connected between this pin and ground. A large capacitor value
results in a narrow bandwidth and improves the power factor.
VEA
IAC
19
20
Input AC Current
This input is used to provide current reference for the multiplier.
© System General Corp.
Version 1.0.1 (IAO33.0062.B0)
- 3 -
www.sg.com.tw • www.fairchildsemi.com
September 26, 2007
Product Specification
PFC / Flyback PWM Controller
SG6901A
BLOCK DIAGRAM
© System General Corp.
Version 1.0.1 (IAO33.0062.B0)
- 4 -
www.sg.com.tw • www.fairchildsemi.com
September 26, 2007
Product Specification
PFC / Flyback PWM Controller
SG6901A
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
Value
Unit
VVDD
IAC
DC Supply Voltage*
25
2
V
Input AC Current
mA
VHigh
VLow
PD
OPWM, OPFC, IAC
-0.3 to +25.0
-0.3 to +7.0
1.15
V
Others
V
Power Dissipation at TA < 50°C
Operating Junction Temperature
Storage Temperature Range
Thermal Resistance (Junction-to-Case)
W
TJ
-40 to +125
-55 to +150
23.64
°C
°C
°C/W
TSTG
R
θJC
TL
Lead Temperature (Wave Soldering or Infrared, 10 Seconds)
260
°C
VESD,HBM
VESD,MM
Electrostatic Discharge Capability, Human Body Model
Electrostatic Discharge Capability, Machine model
4.5
KV
V
250
*All voltage values, except differential voltages, are given with respect to GND pin.
*Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device.
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Value
Unit
TA
Operating Ambient Temperature*
-20 to +85
°C
*For proper operation.
ELECTRICAL CHARACTERISTICS
VDD=15V, TA=25°C unless otherwise noted.
VDD Section
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
VDD-OP
IDD-ST
Continuously Operating Voltage
Start-up Current
20
25
V
0V < VDD < VDD-ON
VDD=15V; OPFC, OPWM open;
RI=24KΩ
10
6
µA
IDD-OP
Operating Current
10
mA
VDD-ON
Start Threshold Voltage
Minimum Operating Voltage
VDD OVP Threshold
11
9
12
13
V
VDD-OFF
VDD-OVP
tD-VDDOVP
10
11
V
23.5
8
24.5
25.5
25
V
Debounce Time of VDD OVP
µs
Oscillator Section
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
FOSC
RI
PWM Frequency
RI=24KΩ
62
65
68
KHz
RI Pin Resistance Range
RI Pin Open Protection
15.6
47.0
KΩ
RIOPEN
200
2
KΩ
KΩ
If RI > RIopen , SG6901A Turns Off
RI Pin Short Protection
RISHORT
If RI < RIshort , SG6901A Turns Off
© System General Corp.
Version 1.0.1 (IAO33.0062.B0)
- 5 -
www.sg.com.tw • www.fairchildsemi.com
September 26, 2007
Product Specification
PFC / Flyback PWM Controller
SG6901A
VRMS for UVP and RANGE
Symbol
Parameter
Test Conditions Min.
Typ.
Max.
Unit
RMS AC Voltage Under-Voltage Protection
Threshold (with tUVP delay)
VRMS-UVP-1
0.75
0.8
0.85
V
VRMS-UVP-1
VRMS-UVP-1
+ 0.18V
VRMS-UVP-1
+ 0.2V
tUVP-Min+1
4
VRMS-UVP-2
tD-PWM
Recovery Level on VRMS
V
+ 0.16V
When UVP Occurs, Interval from PFC Off to
PWM Off
tUVP-Min+9
ms
tUVP
Under-Voltage Protection Delay Time*
High VRMS Threshold for RANGE
Comparator
150
195
240
ms
V
VRMS-H
1.90
1.95
2.00
VRMS-L
Low VRMS Threshold for RANGE
Comparator
1.55
140
1.60
170
1.65
V
tRANGE
VOL
Range-Enable Delay Time
Output Low Voltage of RANGE Pin
200
0.5
50
ms
V
Io=1mA
IOH
Output High Leakage Current of RANGE Pin RANGE=5V
nA
* No delay for start-up.
PFC Stage
Voltage Error Amplifier
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
VREF
Av
Reference Voltage
2.95
3.00
60
3.05
V
Open-Loop Gain
dB
KΩ
V
Zo
Output Impedance
110
3.25
OVPPFC
PFC Over-Voltage Protection (OVP Pin)
PFC Feedback Voltage Protection
Hysteresis
3.20
60
3.30
120
△OVPPFC
90
mV
tOVP-PFC
Debounce Time of PFC OVP
Clamp-High Feedback Voltage
Clamp-High Gain
40
70
120
µs
VFBPFC-H
GFBPFC-H
VFBPFC-L
GFBPFC-L
IFBPFC-L
3.10
3.15
0.5
3.20
V
µA/mV
V
Clamp-Low Feedback Voltage
Clamp-Low Gain
2.75
2.85
6.5
2.90
mA/mV
mA
µA
Maximum Source Current
Maximum Sink Current
1.5
70
2.0
IFBPFC-H
110
0.40
70
UVPFBPFC
tUVP-FBPFC
PFC Feedback Under-Voltage Protection
Debounce Time of PFC UVP
0.35
40
0.45
120
V
µs
Current Error Amplifier
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
VOFFSET
AI
Input Offset Voltage ((-) > (+))
Open-Loop Gain
8
mV
dB
MHz
dB
V
60
1.5
70
BW
Unit Gain Bandwidth
CMRR
VOUT-HIGH
VOUT-LOW
IMR1, IMR2
IL
Common Mode Rejection Ratio
Output High Voltage
VCM=0 to +1.5V
3.2
Output Low Voltage
0.2
70
V
Reference Current Source
Maximum Source Current
Maximum Sink Current
RI=24KΩ (IMR=20+IRI•0.8)
50
3
µA
mA
mA
IH
0.25
© System General Corp.
Version 1.0.1 (IAO33.0062.B0)
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www.sg.com.tw • www.fairchildsemi.com
September 26, 2007
Product Specification
PFC / Flyback PWM Controller
SG6901A
Peak Current Limit
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
IP
Constant Current Output
RI=24KΩ
VRMS=1.05V
VRMS=3V
90
100
110
µA
V
Peak Current Limit Threshold Voltage
0.15
0.35
0.20
0.40
0.25
VPK
Cycle-by-Cycle Limit (VSENSE < VPK
)
0.45
200
450
V
tPD-PFC
Propagation Delay
ns
ns
tLEB-PFC
Leading-Edge Blanking Time
270
350
Multiplier
Symbol
Parameter
Test Conditions
Min.
Typ.
Max. Unit
IAC
Input AC Current
Multiplier Linear Range
RI=24KΩ
0
360
µA
µA
IMO–max
Maximum Multiplier Current Output
Multiplier Current Output (Low-line,
High-power)
250
250
VRMS=1.05V; IAC=90µA;
IMO-1
200
280
µA
V
EA=7.5V; RI=24KΩ
VRMS=3V; IAC=264µA;
EA=7.5V; RI=24KΩ
Multiplier Current Output (High-line,
High-power)
IMO–2
VIMP
65
85
µA
V
V
Voltage of IMP Open
3.4
3.9
4.4
PFC Output Driver
Symbol
Parameter
Test Conditions
Min.
Typ.
Max. Unit
VZ
Output Voltage Maximum (Clamp)
Output Voltage Low
VDD=20V
16
18
V
V
VOL-PFC
VDD=15V; IO=100mA
1.5
Interval OPFC Lags Behind OPWM at
Start-up
tPFC
9.0
8
11.5
14.0
120
ms
V
VOH-PFC
tR-PFC
Output Voltage High
VDD=13V; IO=100mA
VDD=15V; CL=5nF;
O/P=2V to 9V
Rising Time
40
70
60
ns
VDD=15V; CL=5nF;
O/P=9V to 2V
tF-PFC
Falling Time
40
93
110
98
ns
%
DCYMAX
Maximum Duty Cycle
PWM Stage
FBPWM
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
Av-PWM
ZFB
FB to Current Comparator Attenuation
Input Impedance
2.5
4
3.1
5
3.5
7
V/V
KΩ
mA
V
IFB
Maximum Source Current
0.8
4.2
45
1.2
4.5
56
1.5
4.8
70
FBOPEN-LOOP
tOPEN-PWM
PWM Open-Loop Protection voltage
PWM Open-Loop Protection Delay Time
Interval of PWM Open-Loop Protection
Reset
ms
450
600
750
tOPEN-PWM-Hiccup
ms
© System General Corp.
Version 1.0.1 (IAO33.0062.B0)
- 7 -
www.sg.com.tw • www.fairchildsemi.com
September 26, 2007
Product Specification
PFC / Flyback PWM Controller
SG6901A
PWM-Current Sense
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
tPD-PWM
VLIMIT-1
VLIMIT-2
tLEB-PWM
Propagation Delay to Output
VDD=15V,OPWM<=9V
RANGE=Open
60
120
0.75
0.70
450
ns
V
Peak Current Limit Threshold Voltage1
Peak Current Limit Threshold Voltage2
Leading-Edge Blanking Time
0.65
0.60
270
0.70
0.65
350
RANGE=Ground
V
ns
△VS=△VSLOPE x (Ton/T)
△VS: Compensation Voltage
Added to Current Sense
△VSLOPE
Slope Compensation
0.45
0.50
0.55
V
PWM Output Driver
Symbol
VZ-PWM
Parameter
Test Conditions
VDD=20V
Min.
Typ.
Max.
18
Unit
V
Output Voltage Maximum (Clamp)
Output Voltage Low
16
VOL-PWM
VOH-PWM
VDD=15V; IO=100mA
VDD=13V; IO=100mA
1.5
V
Output Voltage High
8
V
V
9V
DD=15V; CL=5nF; O/P=2V to
tR-PWM
Rising Time
30
60
120
ns
V
2V
DD=15V; CL=5nF; O/P=9V to
tF-PWM
Falling Time
30
73
50
78
110
83
ns
%
DCYMAXPWM
Maximum Duty Cycle
OTP Section
Symbol
IOTP
Parameter
Test Conditions
Min.
90
Typ.
100
Max.
110
Unit
µA
V
OTP Pin Output Current
Recovery Level on OTP
OTP Threshold Voltage
OTP Debounce Time
RI=24KΩ
VOTP-ON
VOTP-OFF
tOTP
1.35
1.15
8
1.40
1.20
1.45
1.25
25
V
µs
Soft-Start Section
Symbol
ISS
Parameter
Test Conditions
Min.
Typ.
50
Max.
Unit
µA
Constant Current Output for Soft-Start
Discharge RDSON
RT=24KΩ
44
56
RD
470
Ω
© System General Corp.
Version 1.0.1 (IAO33.0062.B0)
- 8 -
www.sg.com.tw • www.fairchildsemi.com
September 26, 2007
Product Specification
PFC / Flyback PWM Controller
SG6901A
TYPICAL CHARACTERISTICS
Start-Up Current (IDD-ST) vs Temperature
Minimum Operating Voltage (VDD-OF F ) vs
Temperature
25
11.0
10.6
10.2
9.8
20
15
10
5
9.4
0
9.0
-40 -25 -10
5
20
35
50
65
80
95
110 125
-40 -25 -10
5
20
35
50
65
80
95 110 125
Temperature (
℃)
Temperature (℃)
PWM Frequency (FOSC ) vs Temperature
Operating Current (IDD-OP) vs Temperature
68
10.0
8.8
7.6
6.4
5.2
4.0
67
66
64
63
62
-40 -25 -10
5
20
35
50
65
80
95 110 125
-40 -25 -10
5
20
35
50
65
80
95
110 125
Temperature (
℃)
Temperature (℃)
VDD Over Voltage Protection (VDD-OVP) vs
Temperature
Start Threshold Voltage (VDD-ON) vs Temperature
13.0
12.6
12.2
11.8
11.4
11.0
25.5
25.1
24.7
24.3
23.9
23.5
-40 -25 -10
5
20
35
50
65
80
95 110 125
-40 -25 -10
5
20
35
50
65
80
95 110 125
Temperature (
℃)
Temperature (℃)
© System General Corp.
Version 1.0.1 (IAO33.0062.B0)
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www.sg.com.tw • www.fairchildsemi.com
September 26, 2007
Product Specification
PFC / Flyback PWM Controller
SG6901A
High VRMS Threshold for RANGE Comparator (VRM S- H) vs
Reference Voltage (VREF ) vs Temperature
Temperature
3.05
3.03
3.01
2.99
2.97
2.95
2.00
1.98
1.96
1.94
1.92
1.90
-40 -25 -10
5
20
35
50
65
80
95 110 125
-40 -25 -10
5
20
35
50
65
80
95
110 125
Temperature (
℃)
Temperature (℃)
Low VRMS Threshold for RANGE Comparator
(VRMS-L) vs Temperature
Rising Time (tR-PF C ) vs Temperature
120
104
88
1.65
1.63
1.61
1.59
1.57
1.55
72
56
40
-40 -25 -10
5
20
35
50
65
80
95
110 125
-40 -25 -10
5
20
35
50
65
80
95 110 125
Temperature (℃)
Temperature (℃)
PFC Over Voltage Protection (OVPPF C ) vs
Temperature
Falling Time (tF -PF C ) vs Temperature
110
96
82
68
54
40
3.30
3.28
3.26
3.24
3.22
3.20
-40 -25 -10
5
20
35
50
65
80
95 110 125
-40 -25 -10
5
20
35
50
65
80
95 110 125
Temperature (℃)
Temperature (℃)
© System General Corp.
Version 1.0.1 (IAO33.0062.B0)
- 10 -
www.sg.com.tw • www.fairchildsemi.com
September 26, 2007
Product Specification
PFC / Flyback PWM Controller
SG6901A
Peak Current Limit Threshold Voltage 1 (VLIMIT-1
vs Temperature
)
Maximum Duty Cycle (DCYMAX) vs Temperature
98
97
96
95
94
93
0.75
0.73
0.71
0.69
0.67
0.65
-40 -25 -10
5
20
35
50
65
80
95 110 125
-40 -25 -10
5
20
35
50
65
80
95
110 125
Temperature (
℃)
Temperature (℃)
Peak C urrent Limit Threshold Voltage 2 (VLIMIT-2) vs
Temperature
PWM Open Loop Protection Voltage (FBOPEN-LOOP
vs Temperature
)
0.70
4.80
4.68
4.56
4.44
4.32
4.20
0.68
0.66
0.64
0.62
0.60
-40 -25 -10
5
20
35
50
65
80
95 110 125
-40 -25 -10
5
20
35
50
65
80
95
110 125
Temperature (℃)
Temperature (℃)
Rising Time (tR-PWM) vs Temperature
PWM Open Loop Protection Delay Time (tOPEN-PWM ) vs
Temperature
120
70
65
60
55
50
45
102
84
66
48
30
-40 -25 -10
5
20
35
50
65
80
95
110 125
-40 -25 -10
5
20
35
50
65
80
95 110 125
Temperature (℃)
Temperature (℃)
© System General Corp.
Version 1.0.1 (IAO33.0062.B0)
- 11 -
www.sg.com.tw • www.fairchildsemi.com
September 26, 2007
Product Specification
PFC / Flyback PWM Controller
SG6901A
Falling Time (tF -PWM) vs Temperature
PWM Maximum Duty Cycle (DCYMAXPWM) vs
Temperature
110
94
78
62
46
30
83
81
79
77
75
73
-40 -25 -10
5
20
35
50
65
80
95 110 125
-40 -25
-10
5
20
35
50
65
80
95
110 125
Temperature (℃)
Temperature (℃)
OTP Threshold Voltage (VOTP-OF F ) vs
Temperature
PWM Maximum Duty Cycle (DCYMAXPWM) vs
Temperature
83
81
79
77
75
73
1.25
1.23
1.21
1.19
1.17
1.15
-40 -25 -10
5
20
35
50
65
80
95 110 125
-40 -25
-10
5
20
35
50
65
80
95
110 125
Temperature (℃)
Temperature (℃)
© System General Corp.
Version 1.0.1 (IAO33.0062.B0)
- 12 -
www.sg.com.tw • www.fairchildsemi.com
September 26, 2007
Product Specification
PFC / Flyback PWM Controller
SG6901A
OPERATION DESCRIPTION
SG6901A is a highly integrated PFC/PWM combination
controller. Many functions and protections are built in to
provide a compact design. The following sections
describe the operation and function.
PFC Output Voltage Control (RANGE)
For an universal input (90 ~ 264VAC) power supply
applying active boost PFC and flyback as a second stage,
the output voltage of PFC is usually designed around
250V at low line and 390V at high line. This can improve
the efficiency at low-line input. The RANGE pin
(open-drain structure) is used for the two-level output
voltage setting.
Switching Frequency and Current
Sources
The switching frequency of SG6901A can be
programmed by the resistor RI connected between RI pin
and GND. The relationship is:
Figure 2 shows the RANGE output that programs the PFC
output voltage. The RANGE output is shorted to ground
when the VRMS voltage exceeds VRMS-H (1.95V) while it is
of high impedance (open) whenever the VRMS voltage
drops below VRMS-L (1.6V). The output voltages can be
designed using equations:
1560
RI (kΩ )
FOSC
=
(kHz)
-----------
(1)
For example, a 24KΩ resistor RI results in a 65KHz
switching frequency. Accordingly, a constant current, IT,
flows through RI:
RA + RB
Range = Open ⇒ VO
=
× 3V
RB
RA
----
(3)
+
(RB //RC
)
× 3V
Range = Ground ⇒ VO
=
(RB //RC
)
1.2V
RI (kΩ )
IT =
(mA)
----------------
(2)
IT is used to generate internal current reference.
Line Voltage Detection (VRMS)
Figure 1 shows a resistive divider with low-pass filtering
for line-voltage detection on the VRMS pin. The VRMS
voltage is used for the PFC multiplier, brownout
protection, and range control.
For brownout protection, the SG6901A is disabled with
195ms delay time if the voltage VRMS drops below 0.8V.
For PFC multiplier and range control, refer to section
below for more details.
FIG.2 Range Control Two-Level Output Voltage
FIG.1 Line Voltage Detection Circuit
© System General Corp.
Version 1.0.1 (IAO33.0062.B0)
- 13 -
www.sg.com.tw • www.fairchildsemi.com
September 26, 2007
Product Specification
PFC / Flyback PWM Controller
SG6901A
Through the differential amplification of the signal across
RS, better noise immunity is achieved. The output of IEA is
compared with an internal sawtooth and the pulse width
for PFC is determined. Through the average current-mode
Interleave Switching
The SG6901A uses interleaved switching to synchronize
the PFC and flyback stages, which reduces switching
noise and spreads the EMI emissions. Figure 3 shows
off-time, TOFF, inserted between the turn-off of the PFC
gate drive and the turn-on of the PWM.
control loop, the input current IS is proportional to IMO
:
IMO ×R2 = IS ×R
S --------------------
(5)
According to Equation 5, the minimum value of R2 and
maximum of RS can be determined since IMO should not
exceed the specified maximum value.
There are different concerns in determining the value of
the sense resistor RS. The value of RS should be small
enough to reduce power consumption, but large enough to
maintain the resolution. A current transformer (CT) may
be used to improve efficiency of high-power converters.
FIG.3 Interleaved Switching Pattern
To achieve good power factor, the voltage for VRMS and
VEA should be kept as constant as possible, according to
Equation 4. Good RC filtering for VRMS and narrow
bandwidth (lower than the line frequency) for voltage
loop are suggested for better input current shaping. The
transconductance error amplifier has output impedance
ZO and a capacitor CEA (1µF ~ 10µF) should be connected
to ground. This establishes a dominant pole f1 for the
voltage loop:
PFC Operation
The purpose of a boost active power factor corrector (PFC)
is to shape the input current of a power supply. The input
current waveform and phase follow that of the input
voltage. Average-current-mode control is utilized for
continuous-current-mode operation for the PFC booster.
With the innovative multi-vector control for voltage loop
and switching charge multiplier-divider for current
reference, excellent input power factor is achieved with
good noise immunity and transient response. Figure 4
shows the total control loop for the average-current-mode
control circuit of SG6901A.
1
f
1 =
----------------------
(6)
2π ×ZO × CEA
The average total input power can be expressed as:
The current source output from the switching charge
multiplier-divider can be expressed as:
Pin = VIN
×IIN
(rms)
(rms)
∝ VRMS ×IMO
IAC × VEA
VRMS
----------------
(7)
IAC × VEA
IMO = K×
(µA)
------------
(4)
∝ VRMS
×
×
2
2
VRMS
Vin
× VEA
RAC
VRMS
∝ VRMS
As shown in Figure 4, the current output from IMP pin,
MP, is the summation of IMO and IMR1. IMR1 and IMR2 are
2
I
VEA
=
2 ×
RAC
identical fixed-current sources used to pull high the
operating point of the IMP and IPFC pins since the
voltage across RS goes negative with respect to ground.
Constant current sources IMR1 and IMR2 are typically 60µA.
From Equation 7, VEA, the output of the voltage error
amplifier, controls the total input power and the power
delivered to the load.
© System General Corp.
Version 1.0.1 (IAO33.0062.B0)
- 14 -
www.sg.com.tw • www.fairchildsemi.com
September 26, 2007
Product Specification
PFC / Flyback PWM Controller
SG6901A
FIG.4 Average-Current-Mode Control Loop
Multi-Vector Error Amplifier
PFC Over-Voltage Protection
Although the PFC stage has a low bandwidth voltage loop
for better input power factor, the innovative multi-vector
error amplifier provides a fast transient response to clamp
the overshoot and undershoot of the PFC output voltage.
Using a voltage divider from the output of PFC to the
OVP pin, the PFC output voltage can be safely protected.
Once the voltage on the OVP pin is over OVPPFC, the
OPFC is disabled. THE OPFC is not enabled again until
Figure 5 shows the block diagram of the multi-vector
error amplifier. When the variation of the feedback
voltage exceeds ±5% of the reference voltage, the
transconductance error amplifier adjusts its output
impedance to increase the loop response.
the OVP voltage falls below OVPPFC.
Cycle-by-Cycle Current Limiting
SG6901A provides cycle-by-cycle current limiting for
both PFC and PWM stages. Figure 6 shows the peak
current limit for the PFC stage. The PFC gate drive is
terminated once the voltage on the ISENSE pin goes
below VPK
.
The voltage of VRMS determines the voltage of VPK. The
relationship between VPK and VRMS is shown in Figure 6.
The amplitude of the constant current, IP, is determined by
the internal current reference according to the equation:
1.2V
IP = 2×
---------------------
(8)
RI
FIG. 5 Multi-Vector Error Amplifier
© System General Corp.
Version 1.0.1 (IAO33.0062.B0)
- 15 -
www.sg.com.tw • www.fairchildsemi.com
September 26, 2007
Product Specification
PFC / Flyback PWM Controller
SG6901A
Limited Power Control
Every time the output of power supply is shorted or
overloaded, the FBPWM voltage increases. If the
FBPWM voltage is higher than a designed threshold,
FBOPEN-LOOP (4.5V) for longer than tOPEN-PWM (56ms), the
OPWM is turned off.
As long as the voltage on the VDD pin is larger than
V
DD-OFF (minimum operating voltage), the OPWM is not
enabled. This protection is reset every tOPEN-PWM-Hiccup
interval. low-frequency hiccup mode protection
FIG. 6 VRMS Controlled Current Limiting
A
prevents the power supply from being overheated under
overloading conditions.
The peak current of the ISENSE is given by (VRMS<1.05V):
(IP ×RP )-0.2V
ISENSE_peak =
------------------
(9)
RS
Over-Temperature Protection
SG6901A provides an OTP pin for over-temperature
protection. A constant current is output from this pin. If RI
is equal to 24KΩ, the magnitude of the constant current is
100µA. An external NTC thermistor must be connected
from this pin to ground, as shown as Figure 8. When the
OTP voltage drops below VOTP-OFF (1.2V), SG6901A is
disabled and does not recover until OTP voltage exceeds
Flyback PWM and Slope Compensation
As shown in Figure 7, peak-current-mode control is
utilized for flyback PWM. The SG6901A inserts a
synchronized 0.5V ramp at the beginning of each
switching cycle. This built-in slope compensation ensures
stable operation for continuous current-mode operation.
VOTP-ON (1.4V).
FIG. 8 OTP Function
FIG. 7 Peak Current Control Loop
Soft-Start
When the IPWM voltage, across the sense resistor,
reaches the threshold voltage (0.9V), the OPWM is turned
During start-up of PWM stage, the SS pin charges an
external capacitor with a constant current source. The
voltage on FBPWM is clamped by the SS voltage during
start-up. In the event of a protected condition and/or
PWM disabled, the SS pin quickly discharges.
off after a small propagation delay tPD-PWM
.
To improve stability or prevent sub-harmonic oscillation,
a synchronized positive-going ramp is inserted at every
switching cycle.
Gate Drivers
SG6901A output stage is a fast totem-pole gate driver.
The output driver is clamped by an internal 18V Zener
diode to protect the external power MOSFET.
© System General Corp.
Version 1.0.1 (IAO33.0062.B0)
- 16 -
www.sg.com.tw • www.fairchildsemi.com
September 26, 2007
Product Specification
PFC / Flyback PWM Controller
SG6901A
PACKAGE INFORMATION
20 PINS – PLASTIC SOP (S)
E
H
Detail A
F
A
c
1
10
b
e
D
θ
L
A2
y
A1
Detail A
Dimensions:
Millimeter
Inch
Min.
Symbol
Min.
Typ.
Max.
Typ.
Max.
0.104
A
A1
A2
b
2.362
0.101
2.260
2.642
0.305
2.337
0.093
0.004
0.089
0.012
0.092
0.406
0.016
c
0.203
0.008
D
E
12.598
7.391
12.903
7.595
0.496
0.291
0.508
0.299
e
1.270
0.050
H
L
10.007
0.406
10.643
1.270
0.394
0.016
0.419
0.050
F
0.508X45°
0.020X45°
y
θ°
0.101
8°
0.004
8°
0°
0°
© System General Corp.
Version 1.0.1 (IAO33.0062.B0)
- 17 -
www.sg.com.tw • www.fairchildsemi.com
September 26, 2007
Product Specification
PFC / Flyback PWM Controller
SG6901A
© System General Corp.
Version 1.0.1 (IAO33.0062.B0)
- 18 -
www.sg.com.tw • www.fairchildsemi.com
September 26, 2007
相关型号：
SG6932SZ
POWER FACTOR CONTROLLER, 68kHz SWITCHING FREQ-MAX, PDSO16, LEAD FREE, PLASTIC, SOP-16
ROCHESTER
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