ft2128P [FANGTEK]
3.4W Class-D Audio Power Amplifier with Dual Modes of Automatic Level Control;
| 型号： | ft2128P |
| 厂家： | 
Fangtek Ltd. |
| 描述： | 3.4W Class-D Audio Power Amplifier with Dual Modes of Automatic Level Control |
| 文件： | 总23页 (文件大小：1063K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
ft2128
3.4W Class-D Audio Power Amplifier
with Dual Modes of Automatic Level Control
GENERAL DESCRIPTION
FEATURES
The ft2128 is a high-efficiency, high-performance,
Class-D audio power amplifier with dual modes of
automatic level control (ALC). It operates from 3V
to 5.5V supply. When powered with 5V supply
voltage, it is capable of delivering a continuous
average output of 3.4W into 3Ω load or 2.8W into
4Ω load with 4% THD+N.
Wide supply voltage range from 3V to 5.5V
Filterless Class-D operation
Automatic level control to eliminate output
clipping
Dual ALC modes of operation
High efficiency up to 90%
Constant output power at 5V supply (ALC-1)
3.2W (3Ω load, 1% THD+N)
2.6W (4Ω load, 1% THD+N)
1.4W (8Ω load, 1% THD+N)
Constant output power at 5V supply (ALC-2)
3.4W (3Ω load, 4% THD+N)
The ft2128 features ALC to constantly monitor
and safeguard the audio output signals against
clipping. Once an over-level condition, caused by
either the over-level input signals or low battery
supply voltage, is detected, the ALC adjusts the
voltage gain of the amplifiers to minimize output
clipping while maintaining a maximally-allowed
dynamic range of the audio output signals. While
minimizing output clipping distortion, the ALC also
helps prevent excessive power dissipation and
protect speakers.
2.8W (4Ω load, 4% THD+N)
1.5W (8Ω load, 4% THD+N)
ALC Range: 12dB
Low quiescent current: 3mA @ VDD=3.6V
Analog or digital scheme to set ALC operating
mode
As a Class-D audio power amplifier, the ft2128
features high efficiency up to 90%, which make
the device ideal for use in battery-powered
portable devices. Also, the ft2128 incorporates
shutdown mode to minimize power consumption
and comprehensive protection features against
various operating faults for a safe and reliable
operation.
Short-circuit & thermal overload protection
Available in SOP-8L & MSOP-8L packages
APPLICATIONS
Portable navigation devices
Multimedia internet devices
Portable or Blue-tooth speakers
APPLICATION CIRCUIT
VDD
CS1
47uF
CS2
1uF
VDD
Rin
Rin
Cin470nF
Cin470nF
VON
VOP
INN
INP
Input
Buffer
Class-D
Modulator
Output
Stage
OCP
OTP
R1
CTRL
VREF
Mode
Control
Cctrl
0.1uF
R2
Oscillator
VREF
Generator
optional
UVLO
Cvref
1uF
AGND/PGND
Figure 1: Typical Application Circuit Diagram
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ft2128
PIN CONFIGURATION AND DESCRIPTION
CTRL
CTRL
VREF
INP
1
2
3
4
8
7
6
5
VOP
GND
VDD
VON
1
2
3
4
8
7
6
5
VOP
GND
VDD
VON
VREF
INP
INN
INN
ft2128M (MSOP-8L)
(TOP VIEW)
ft2128P (SOP-8L)
(TOP VIEW)
PIN NAME
PIN #
TYPE DESCRIPTION
CTRL
1
DI
Shutdown and operating mode control.
Analog reference at VDD/2, the common-mode bias for audio inputs. Place
a bypass capacitor of 1µF to ground for noise injection.
Positive audio input terminal.
VREF
2
AO
INP
3
4
5
6
7
8
AI
AI
INN
Negative audio input terminal.
VON
VDD
GND
VOP
AO
P
Negative BTL audio output terminal.
Power supply.
G
Power ground.
AO
Positive BTL audio output terminal.
ORDERING INFORMATION
PART NUMBER
ft2128P
TEMPERATURE RANGE
PACKAGE
SOP-8L
-40°C to +85°C
-40°C to +85°C
ft2128M
MSOP-8L
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ft2128
ABSOLUTE MAXIMUM RATINGS (Note 1)
PARAMETER
UNIT
Supply Voltage
-0.3V to 6.0V
-0.3V to VDD+0.3V
Internally Limited
150°C
All other Pins
Power Dissipation
Junction Temperature
Solder Information
Vapor Phase (60 sec.)
Infrared (15 sec.)
Storage Temperature
215°C
220°C
−45°C to +150°C
Note 1: Stresses beyond those listed under absolute maximun ratings may cause permanent damage to the device. These are stress
ratings only,and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied.Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
PACKAGE DISSIPATION RATINGS
PACKAGE
SOP-8L
Θ
JA
UNIT
°C/W
°C/W
140
180
MSOP-8L
RECOMMENDED OPERATING CONDITIONS
PARAMETER
CONDITIONS
MIN
3.0
TYP
MAX
5.5
UNIT
V
Supply Voltage，VDD
Operating Free-Air Temperature, TA
Minimum Load Resistance, RLOAD
-40
2.6
85
°C
Ω
IMPORTANT APPLICATION NOTES
1. The ft2128, as a high performance Class-D audio amplifier, requires adequate power supply
decoupling to ensure its optimum operation and performance in output power, efficiency, THD+N, and
EMI emissions. Place decoupling capacitors as close to the VDD pin as possible. For applications
where the load resistance is less than 6Ω, it is strongly recommended to use a 47µF or larger
capacitor for power supply decoupling.
2. It is recommended to employ a ground (GND) plane for ft2128 on the system board.
3. Use a simple ferrite bead filter for further EMI suppression. Choose a ferrite bead with a rated current
no less than 2A or greater for applications with a load resistance less than 6Ω. Also, place the
respective ferrite beard filters as close to the output pins, VOP and VON, as possible.
4. For applications where the power supply is rated more than 4.6V or the load resistance less than 6Ω,
it is strongly recommended to add a simple snubber circuit, as depicted in Figure 41, between the two
output pins, VOP and VON, to prevent the device from accelerated deterioration or abrupt destruction
due to excessive inductive flybacks that are induced on fast output switching or by an over-current or
short-circuit condition.
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ft2128
ELECTRICAL CHARACTERISTICS
VDD=5V, TA=25°C, RIN=10KΩ, CIN=0.47µF, AV=21.6dB, f=1kHz, unless otherwise specified.
SYMBOL PARAMETER
CONDITIONS
MIN
TYP
MAX UNIT
VDD
Supply Voltage
3.0
5.5
V
V
VUVLU
VUVLD
Power-up Threshold Voltage
Power-off Threshold Voltage
VDD from Low to High
VDD from High to Low
VDD=5V, No Load
2.2
2.0
V
3.5
5.0
4.2
mA
mA
µA
W
Power Supply Quiescent Current
Inputs AC-Grounded
IDD
ISD
VDD=3.6V, No Load
CTRL Low
3.0
Shutdown Current
0.1
VIN=0.6VRMS, VDD=5V
VIN=0.4VRMS, VDD=3.6V
VIN=0.6VRMS, VDD=5V
VIN=0.4VRMS, VDD=3.6V
VIN=0.6VRMS, VDD=5V
VIN=0.4VRMS, VDD=3.6V
VIN=0.6VRMS, VDD=5V
VIN=0.4VRMS, VDD=3.6V
VIN=0.6VRMS, VDD=5V
VIN=0.4VRMS, VDD=3.6V
VIN=0.6VRMS, VDD=5V
VIN=0.4VRMS, VDD=3.6V
RIN=0Ω
1.45
0.75
2.6
Constant Output Power (ALC-1)
Load=8Ω
W
W
Constant Output Power (ALC-1)
Load=4Ω
PO, ALC1
1.3
W
3.2
W
Constant Output Power (ALC-1)
Load=3Ω
1.6
W
1.55
0.8
W
Constant Output Power (ALC-2)
Load=8Ω
W
2.8
W
Constant Output Power (ALC-2)
Load=4Ω
PO, ALC2
1.4
W
3.4
W
Constant Output Power (ALC-2)
Load=3Ω
1.7
W
27.6
21.6
10
dB
dB
KΩ
KΩ
V
AV
Overall Voltage Gain
RIN=10KΩ
ZIN
Input Impedance
Output Impedance
VREF Voltage
Z OUT
VREF
CTRL Low
2
VDD=5V
VDD /2
0.3
Po=0.5W，RL=8Ω
Po=1.0W，RL=4Ω
No Load
%
THD+N
Total Harmonic Distortion+Noise
0.2
%
Output Offset Voltage
Output Voltage Noise
±10
mV
VOS
VN
f=20Hz to 20kHz, AV=21.6dB
Inputs AC-Grounded
100
µVRMS
η
Power Efficiency
VDD=5V，Po=1W，RL=8Ω
f=1kHz
90
50
60
85
12
%
PSRR
CMRR
SNR
AMAX
Power Supply Rejection Ratio
Common Mode Rejection Ratio
Signal-to-Noise Ratio
dB
dB
dB
dB
f=1kHz, AV=27.6dB
Maximum ALC Attenuation
ALC Mode Control (Voltage Setting)
VALC2
VALC1
VSD
ALC-2 Mode Threshold
1.6
1.0
V
V
ALC-1 Mode Threshold
1.4
0.4
Shutdown Mode Threshold
Shutdown Mode Settling Time
V
TSD
10
ms
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ft2128
ELECTRICAL CHARACTERISTICS (Cont’d)
VDD=5V, TA=25°C, RIN=10KΩ, CIN=0.47µF, AV=21.6dB, f=1kHz, unless otherwise specified.
SYMBOL PARAMETER
CONDITIONS
MIN
TYP
MAX UNIT
ALC Mode Control (One-Wire Interface)
Digital Logic High
VH
1.6
V
Digital Logic Low
VL
0.4
V
µs
µs
ms
A
TLO
THI
Time of CTRL Low
1
1
10
Time of CTRL High
Time for Shutdown, Active Low
TSHDN
15
VDD=3.6V
VDD=4.2V
VDD=5V
1.8
2.1
2.6
160
25
ILIMIT
Over-Current Limit
A
A
TOTP
THYS
TSTUP
TATT
TREL
fSW
Over-Temperature Threshold
Over-Temperature Hysteresis
Startup Time
C
C
ms
ms
ms
kHz
120
64
Attack Time
Release Time
840
450
PWM Carrier Frequency
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ft2128
TYPICAL PERFORMANCE CHARACTERISTICS
TA=25°C, RIN=10KΩ, CIN=0.47µF, AV=21.6dB, f=1kHz, unless otherwise specified.
List of Performance Characteristics
DESCRIPTION
CONDITIONS
FIGURE #
R
L
=8Ω+33µH, ALC-1 & ALC-2 Mode (Vin=0.5VRMS
=4Ω+33µH, ALC-1 & ALC-2 Mode (Vin=0.5VRMS
)
)
2
Output Power vs. Supply Voltage
RL
3
VDD=5V, R
VDD=5V, R
L
=8Ω+33µH, ALC-1 & ALC-2 Mode
=4Ω+33µH, ALC-1 & ALC-2 Mode
4
L
5
Output Power vs. Input Voltage
Efficiency vs. Output Power
THD+N vs. Output Power
THD+N vs. Input Voltage
THD+N vs. Input Frequency
PSRR vs. Input Frequency
VDD=3.6V, R
VDD=3.6V, R
L
=8Ω+33µH, ALC-1 & ALC-2 Mode
=4Ω+33µH, ALC-1 & ALC-2 Mode
6
L
7
VDD=5V, R
VDD=5V, R
L
=8Ω+33µH, ALC-2 Mode
=4Ω+33µH, ALC-2 Mode
8
L
9
VDD=3.6V, R
L
=8Ω+33µH, ALC-2 Mode
=4Ω+33µH, ALC-2 Mode
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
VDD=3.6V, R
L
VDD=5V, f=1kHz, R
VDD=5V, f=1kHz, R
L
=8Ω+33µH, ALC-2 Mode
=4Ω+33µH, ALC-2 Mode
L
VDD=3.6V, f=1kHz, R
VDD=3.6V, f=1kHz, R
L
=8Ω+33µH, ALC-2 Mode
=4Ω+33µH, ALC-2 Mode
L
VDD=5V, f=1kHz, R
VDD=5V, f=1kHz, R
L
=8Ω+33µH, ALC-1 & ALC-2 Mode
=4Ω+33µH, ALC-1 & ALC-2 Mode
L
VDD=3.6V, f=1kHz, R
VDD=3.6V, f=1kHz, R
L
=8Ω+33µH, ALC-1 & ALC-2 Mode
=4Ω+33µH, ALC-1 & ALC-2 Mode
L
VDD=5V, Po=0.8W, R
L
=8Ω+33µH, ALC-1 Mode
=4Ω+33µH, ALC-1 Mode
VDD=5V, Po=1.6W, R
L
VDD=3.6V, Po=0.4W, R
L
=8Ω+33µH, ALC-1 Mode
=4Ω+33µH, ALC-1 Mode
VDD=3.6V, Po=0.8W, R
L
VDD=5V, R
VDD=5V, R
L
L
=8Ω+33µH, Input AC-Grounded, ALC-2 Mode
=4Ω+33µH, Input AC-Grounded, ALC-2 Mode
VDD=3.6V, R
VDD=3.6V, R
L
=8Ω+33µH, Input AC-Grounded, ALC-2 Mode
=4Ω+33µH, Input AC-Grounded, ALC-2 Mode
L
Quiescent Current vs. Supply Voltage
ALC Attack & Release Time
Input AC-Grounded, No Load, ALC On, ALC-2 Mode
VDD=5V, Vin=0.26VRMS ~ 0.82VRMS, R
ALC-1 Mode
L
=4Ω+33µH,
29
(VOP-VON) Startup Waveforms
(VOP-VON) Shutdown Waveforms
VDD=5V, R
VDD=5V, R
L
=4Ω+33µH, ALC-2 Mode
=4Ω+33µH, ALC-2 Mode
30
31
L
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ft2128
TYPICAL PERFORMANCE CHARACTERISTICS (Cont’d)
Output Power vs. Supply Voltage
Output Power vs. Supply Voltage
2000
1750
1500
1250
1000
750
4000
3500
3000
2500
2000
1500
1000
500
RL=8Ω+33uH, Vin=0.5Vrms, ALC 1 Mode
RL=8Ω+33uH, Vin=0.5Vrms, ALC 2 Mode
RL=4Ω+33uH, Vin=0.5Vrms, ALC 1 Mode
RL=4Ω+33uH, Vin=0.5Vrms, ALC 2 Mode
500
250
0
0
2.5
3
3.5
4
4.5
5
5.5
2.5
3
3.5
4
4.5
5
5.5
Supply Voltage (V)
Supply Voltage (V)
Figure 2: Output Power vs. Supply Voltage
Figure 3: Output Power vs. Supply Voltage
Output Power vs. Input Voltage
Output Power vs. Input Voltage
10000
10000
1000
100
1000
100
10
VDD=5.0V, RL=8Ω+33uH, ALC 1 Mode
VDD=5.0V, RL=4Ω+33uH, ALC 1 Mode
VDD=5.0V, RL=4Ω+33uH, ALC 2 Mode
10
VDD=5.0V, RL=8Ω+33uH, ALC 2 Mode
1
1
10.00
100.00
1000.00
10000.00
10.00
100.00
1000.00
10000.00
Input Voltage (mVrms)
Input Voltage (mVrms)
Figure 4: Output Power vs. Input Voltage
Figure 5: Output Power vs. Input Voltage
Output Power vs. Input Voltage
10000
Output Power vs. Input Voltage
10000
1000
100
1000
100
10
VDD=3.6V, RL=8Ω+33uH, ALC 1 Mode
VDD=3.6V, RL=4Ω+33uH, ALC 1 Mode
VDD=3.6V, RL=4Ω+33uH, ALC 2 Mode
10
VDD=3.6V, RL=8Ω+33uH, ALC 2 Mode
1
1
10.00
100.00
1000.00
10000.00
10.00
100.00
1000.00
10000.00
Input Voltage (mVrms)
Input Voltage (mVrms)
Figure 6: Output Power vs. Input Voltage
Figure 7: Output Power vs. Input Voltage
OCT, 2013
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ft2128
TYPICAL PERFORMANCE CHARACTERISTICS (Cont’d)
Efficiency vs. Output Power
Efficiency vs. Output Power
100
90
80
70
60
50
40
30
20
10
0
100
90
80
70
60
50
40
30
20
10
0
VDD=5.0V,RL=8Ω+33uH, ALC 2 Mode
VDD=5.0V,RL=4Ω+33uH, ALC 2 Mode
0
200
400
600
800 1000 1200 1400 1600 1800 2000
Output Power (mW)
0
400
800
1200
1600
2000
2400 2800
3200
3600
Output Power (mW)
Figure 8: Efficiency vs. Output Power
Figure 9: Efficiency vs. Output Power
Efficiency vs. Output Power
Efficiency vs. Output Power
100
90
80
70
60
50
40
30
20
10
0
100
90
80
70
60
50
40
30
20
10
0
VDD=3.6V,RL=4Ω+33uH, ALC 2 Mode
VDD=3.6V,RL=8Ω+33uH, ALC 2 Mode
0
200
400
600
800
1000
1200
0
200
400
600
800
1000 1200
1400
1600
1800
2000
Output Power (mW)
Output Power (mW)
Figure 10: Efficiency vs. Output Power
Figure 11: Efficiency vs. Output Power
THD+N vs. Output Power
THD+N vs. Output Power
100
100
10
VDD=5.0V，RL=8Ω+33uH，f=1KHz，ALC 2 Mode
VDD=5.0V，RL=4Ω+33uH，f=1KHz，ALC 2 Mode
10
1
1
0.1
0.1
10
100
1000
10000
10
100
1000
10000
Output Power (mW)
Output Power (mW)
Figure 12: THD+N vs. Output Power
Figure 13: THD+N vs. Output Power
OCT, 2013
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ft2128
TYPICAL PERFORMANCE CHARACTERISTICS (Cont’d)
THD+N vs. Output Power
THD+N vs. Output Power
100
10
100
10
VDD=3.6V，RL=4Ω+33uH，f=1KHz，ALC 2 Mode
VDD=3.6V，RL=8Ω+33uH，f=1KHz，ALC 2 Mode
1
1
0.1
0.1
10
100
1000
10000
10
100
1000
10000
Output Power (mW)
Output Power (mW)
Figure 14: THD+N vs. Output Power
Figure 15: THD+N vs. Output Power
THD+N vs. Input Voltage
THD+N vs. Input Voltage
100
100
10
VDD=5.0V，RL=8Ω+33uH，f=1KHz，ALC 1 Mode
VDD=5.0V，RL=8Ω+33uH，f=1KHz，ALC 2 Mode
VDD=5.0V，RL=4Ω+33uH，f=1KHz，ALC 1 Mode
VDD=5.0V，RL=4Ω+33uH，f=1KHz，ALC 2 Mode
10
1
1
0.1
0.1
10.00
100.00
1000.00
Input Voltage (mV)
10000.00
10.00
100.00
1000.00
Input Voltage (mV)
10000.00
Figure 16: THD+N vs. Input Voltage
Figure 17: THD+N vs. Input Voltage
THD+N vs. Input Voltage
THD+N vs. Input Voltage
100
10
100
VDD=3.6V，RL=8Ω+33uH，f=1KHz，ALC 1 Mode
VDD=3.6V，RL=8Ω+33uH，f=1KHz，ALC 2 Mode
VDD=3.6V，RL=4Ω+33uH，f=1KHz，ALC 1 Mode
VDD=3.6V，RL=4Ω+33uH，f=1KHz，ALC 2 Mode
10
1
1
0.1
0.1
10.00
100.00
1000.00
Input Voltage (mV)
10000.00
10.00
100.00
1000.00
Input Voltage (mV)
10000.00
Figure 18: THD+N vs. Input Voltage
Figure 19: THD+N vs. Input Voltage
OCT, 2013
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ft2128
TYPICAL PERFORMANCE CHARACTERISTICS (Cont’d)
THD+N vs. Frequency
THD+N vs. Frequency
100
10
100
10
VDD=5.0V, RL=8Ω+33uH, Po=0.8W
VDD=5.0V, RL=4Ω+33uH, Po=1.6W
1
1
0.1
0.01
0.1
0.01
10
100
1000
10000
100000
10
100
1000
10000
100000
Frequency (Hz)
Frequency (Hz)
Figure 20: THD+N vs. Frequency
Figure 21: THD+N vs. Frequency
THD+N vs. Frequency
THD+N vs. Frequency
100
10
100
10
VDD=3.6V, RL=8Ω+33uH, Po=0.4W
VDD=3.6V, RL=4Ω+33uH, Po=0.8W
1
1
0.1
0.01
0.1
0.01
10
100
1000
10000
100000
10
100
1000
10000
100000
Frequency (Hz)
Frequency (Hz)
Figure 22: THD+N vs. Frequency
Figure 23: THD+N vs. Frequency
PSRR vs. Frequency
PSRR vs. Frequency
0
0
-10
-10
-20
-30
-40
-50
-60
-70
VDD=5V, RL=8Ω+33uH
VDD=5V, RL=4Ω+33uH
-20
-30
-40
-50
-60
-70
10
100
1000
10000
100000
10
100
1000
10000
100000
Frequency (Hz)
Frequency (Hz)
Figure 24: PSRR vs. Frequency
Figure 25: PSRR vs. Frequency
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ft2128
TYPICAL PERFORMANCE CHARACTERISTICS (Cont’d)
PSRR vs. Frequency
PSRR vs. Frequency
0
-10
-20
-30
-40
-50
-60
-70
0
-10
-20
-30
-40
-50
-60
-70
VDD=3.6V, RL=8Ω+33uH
VDD=3.6V, RL=4Ω+33uH
10
100
1000
10000
100000
10
100
1000
10000
100000
Frequency (Hz)
Frequency (Hz)
Figure 26: PSRR vs. Frequency
Figure 27: PSRR vs. Frequency
Quiescent Current vs. Supply Voltage
VDD=5V, RL=4Ω+33µH
X: 500ms/div
5
4.5
4
3.5
3
Vin = 0.26VRMS ~ 0.82VRMS, 1kHz
Attack Time (64ms)
VOP-VON (33kHz Lowpass Filer)
2.5
2
1.5
1
No Load, Input AC-ground, ALC 2 Mode
X: 500ms/div
Y: 2V/div
0.5
0
2.5
3
3.5
4
4.5
5
5.5
Release Time (840ms)
Supply Voltage (V)
Figure 28: Quiescent Current vs. Supply Voltage
Figure 29: ALC Attack Time & Release Time
VDD=5V, RL=4Ω+33µH
VDD=5V, RL=4Ω+33µH
CTRL, 2V/div
CTRL, 2V/div
Vin = 0.1VRMS, 1kHz
Vin = 0.1VRMS, 1kHz
VOP-VON, 1V/div
(33kHz Lowpass Filer)
VOP-VON, 1V/div
(33kHz Lowpass Filer)
X: 50ms/div
X: 2ms/div
Figure 30: Startup Waveforms
Figure 31: Shutdown Waveforms
OCT, 2013
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ft2128
APPLICATIONS INFORMATION
The ft2128 is a high-efficiency, high-performance, filterless Class-D audio power amplifier with dual
modes of automatic level control (ALC). It operates from 3V to 5.5V supply. When powered with 5V
supply voltage, the ft2128 is capable of delivering a continuous average output of 3.2W into 3Ω load or
2.6W into 4Ω load with 1% THD+N, in ALC-1 mode; and 3.4W into 3Ω load or 2.8W into 4Ω load with 4%
THD+N, in ALC-2 mode.
The ft2128 features ALC to constantly monitor and safeguard the audio output signals against clipping.
Once an over-level condition, caused by either the over-level input signals or low battery supply voltage,
is detected, the ALC adjusts the voltage gain of the amplifiers to minimize output clipping while
maintaining a maximally-allowed dynamic range of the audio output signals. While minimizing output
clipping distortion, the ALC also helps prevent excessive power dissipation and protect speakers. To
meet various application requirements, two ALC modes, i.e., ALC-1 and ALC-2, are available in ft2128 for
two distinctive audio experiences. In ALC-1 mode, the output clipping is substantially eliminated for
ultimate audio quality at the expense of slightly lower output power. In ALC-2 mode, modest output
clipping within commonly acceptable audio quality is allowed for higher output power.
In addition, the ft2128 features a filterless PWM modulator that eliminates the need for an external LC
filter, therefore reducing the number of external components, the PCB board space, and the system cost.
In this manner, the power efficiency is also improved.
As specifically designed for portable applications, the ft2128 incorporates a shutdown mode to minimize
power consumption by holding the CTRL pin to ground. It also includes comprehensive protection
features against various operating faults such as short-circuit, over-temperature, or under-voltage for a
safe and reliable operation.
AUTOMATIC LEVEL CONTROL (ALC)
The automatic level control is to maintain the audio output signals for a maximum voltage swing without
distortion when an excessive input that may cause output clipping is applied. With the ALC function, the
ft2128 lowers the voltage gain of the amplifier to an appropriate value such that the clipping at the outputs
is eliminated. It also eliminates the clipping of the output signal due to the reduction of the power-supply
voltage.
Output Signal when Supply Voltage is Sufficiently Large
Output Signal in ALC Off Mode
Output Signal in ALC On Mode
Attack Time
Release Time
Figure 32: Automatic Level Control Diagram
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ft2128
Table 1 shows the attack time and release time of the ALC mode. The attack time is defined as the time
interval required for the gain to fall to its steady-state gain less 3dB approximately, assumed that a
sufficiently large input signal is applied. The release time is the time interval required for the amplifier to
exit out of the ALC mode of operation.
MODE
ATTACK TIME (ms)
RELEASE TIME (ms)
ALC
64
840
Table 1: ALC Attack Time & Release Time
VOLTAGE GAIN SETTING
The overall voltage gain of the audio amplifier can be externally adjusted by inserting additional input
resistors, RIN, in series with the input capacitors. The value of RIN for a given voltage gain can be
calculated by Equation 1.
AV = 240 / (RIN + 10)
(1)
In Equation 1, AV is the desired voltage gain of the amplifier and RIN is the internal resistance and
expressed in KΩ.
The choice of the overall voltage gain will strongly influence the trade-off between the loudness and the
audio quality. The higher the voltage gain is, the louder the listener will experience. However an
excessive voltage gain may cause the audio output clipped prematurely for a given range of the input
signals. Thus it is crucial to choose an input resistor value resulting in a proper overall voltage gain. The
input resistor is chosen based upon various considerations including the supply voltage and the range of
input signal levels. Table 2 shows typical resistor values of RIN and the corresponding voltage gains that
can be used for various supply voltages and the dynamic range of the input signal levels.
RIN (KΩ)
AV (dB)
0
2
5
10
21.6
1.0
14
20
20
18
27.6
0.50
0.60
26
24
VDD=4.2V
VDD=5V
Max. Input Level (VRMS)
with ALC in operation
0.63
0.75
0.80
0.94
1.2
1.5
1.5
1.8
1.2
Table 2: External Input Resistors Required for Various Voltage Gains
MODE CONTROL
Shutdown and Startup
When the CTRL pin is pulled to ground, the ft2128 is forced into the shutdown mode. In the shutdown
mode, all the circuitry is disabled and the supply current is eliminated except leakage current, and the
differential outputs are shorted to ground through an internal resistor (2KΩ) individually. Once in the
shutdown mode, the CTRL pin must remains low for at least 15ms (TSD), the shutdown settling time,
before it can be brought high again. When the CTRL pin is asserted high, the device exits out of the
shutdown mode and enters into the ALC mode after a startup time (TSTUP) of 64ms.
ALC Mode Control
Two ALC operating modes, ALC-1 and ALC-2, are available in ft2128. The ALC-1 mode is intended for
the applications where best audio quality is an ultimate design parameter and the output clipping must be
substantially eliminated. On the other hand, the ALC-2 mode is for the applications where maximum audio
loudness is much desired at the expense of modest output-clipping with THD+N at 4%.
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ft2128
The ALC operation of ft2128 can be configured by either analog (CTRL voltage setting) or digital (a string
of digital pulses) scheme. Both schemes are required to interface with a GPIO port from the host via the
CTRL pin. The analog scheme configures the ALC operation based upon the voltage at CTRL pin while
the digital scheme is based upon the number of low-to-high transitions of digital pulses applied to the
CTRL pin.
ALC Mode Control with CTRL Voltage Setting (Analog Scheme)
An example of setting the ALC-1 mode by a host processor or microcontroller is shown in Figure 33. As
depicted in the figure, two external resistors (R1, R2 with 1% accuracy) connected to the CTRL pin and
GPIO port from the host are used to set the voltage at CTRL pin. It is recommended to add a ceramic
capacitor (>0.1µF) to the CTRL pin to smooth out the mode transition as well as to minimize noise
interference.
In Figure 33, “H” indicates a high-level output voltage (VIO) at the host’s I/O ports. “L” indicates a low-level
output voltage (GND) at the ports. To generate a proper voltage at the CTRL pin for a specific mode of
operation, the GPIO port is required to have sufficient pull-down capabilities. Also, the ground (GND) of
the host must be at the same potential as that of ft2128. Furthermore, the voltage at CTRL pin is a
function of the supply voltage (VIO) applied onto the host. Table 3 defines proper resistor values that can
be used for various supply voltages at VIO.
IO
V
CTRL
MODE
ALC-1
R1
CTRL
CTRL
H
L
Cctrl
0.1uF
R2
MCU
ft2128
Shutdown
Figure 33: CTRL Voltage Setting for ALC-1 Operation
VIO
1.8V
10K
22K
2.8V
12K
10K
3.0V
20K
15K
3.3V
24K
15K
4.2V
22K
10K
5.0V
30K
10K
R1
R2
Table 3: Typical Resistors for CTRL Voltage Setting
For applications where ALC-2 operation is desired, the CTRL circuit diagram can be simplified as shown
in Figure 34. In this case, one external resistor (Rctrl) and one GPIO port are used to set the voltage at
CTRL pin. The value of the resistor is chosen such that the resulting RC time constant (>1ms) will provide
sufficient noise rejection at the CTRL pin.
IO
V
CTRL
MODE
ALC-2
Rctrl
CTRL
CTRL
H
L
MCU
Cctrl
0.1uF
ft2128
Shutdown
Figure 34: CTRL Voltage Setting for ALC-2 Operation
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ft2128
ALC Mode Control with Digital Pulses (Digital Scheme)
To support for a wide range of applications, the ft2128 incorporates digital pulse control to select the ALC
operating mode. By applying a string of digital pulses to the CTRL pin, one can select one of the two ALC
modes. The detailed timing diagram of the digital pulse control to set the operating mode is shown in
Figure 35.
TLO
SHDN
>T
SHDN
>1us
H
T
THI
1us
<
<
TLO 10us
CTRL
L
ALC 2
ALC 1
ALC 2
ALC 1
ALC 2
SHUTDOWN
SHUTDOWN
Figure 35: ALC Mode Control with Digital Pulses
Two ALC operating modes, ALC-2 and ALC-1, are configured by the application of a string of pulses onto
the CTRL pin. On the first low-to-high transition of the pulses, the device is configured in ALC-2 mode, the
default mode. The ALC operating mode can then be toggled in a cyclic manner on each following
low-to-high transition of the pulses. Note that each individual high-level or low-level pulse must be longer
than a minimum of 1µs to be recognized. Any pulses, high-level or low-level, shorter than 1µs may be
ignored. Also, if the CTRL pin is held low for more than 15ms, the device enters into shutdown mode,
where all the internal circuitry is de-biased. Once the device is forced into shutdown mode, one or multiple
pulses are required for the device to return to its desired mode of operation. For proper operation, do not
hold the CTRL pin low for duration between 10µs and 15ms.
CLICK & POP NOISE REDUCTION
The ft2128 incorporates a “click & pop” reduction circuitry to minimize clicks and pops incurred during
power-up and power-off, as well as when the device enters into or exists from the shutdown mode. It is
however recommended that the CTRL pin be held low during power-up until the supply voltage is
stabilized. Similarly, it shall be brought low prior to power-off. In this manner, the click and pop noise can
be significantly suppressed.
PROTECTION FEATURES
The ft2128 incorporates various protection functions against possible operating faults for a safe operation.
The protection features including Under-Voltage Lockout (UVLO), Short-Circuit Protection (SCP), and
Over-Temperature Shutdown (OTSD) are described as follows:
Under Voltage Lockout (UVLO)
The ft2128 incorporates a circuitry to detect a low supply voltage for a safe and reliable operation.
When the supply voltage is first applied, the ft2128 will remain inactive until the supply voltage
exceeds 2.2V (VUVLU). When the supply voltage is removed and drops below 2.0V (VUVLD), the
ft2128 enters into the shutdown mode immediately.
Short-Circuit Protection (SCP)
During operation, the output current flowing through the output stage of the Class-D amplifier is
constantly monitored for any over-current and/or short-circuit conditions. Whenever an over-current
or short-circuit condition is detected at the differential outputs, either to VDD or VSS or to each other,
the amplifier output stage is immediately disabled and the differential outputs are forced into
OCT, 2013
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ft2128
high-impedance. If this over-current condition persists over a prescribed period, the ft2128 then
enters into the shutdown mode and remains in this mode for about 180ms.
Once the shutdown mode times out, the ft2128 will automatically initiate a startup sequence and then
check if the short-circuit condition has been removed. If the fault condition is still present, the ft2128
will repeat itself for the process of shutdown followed by a startup sequence, detection, and
qualification. It is so-called the hiccup mode of operation. Whenever the fault condition is removed,
the ft2128 will automatically restore itself to its normal mode of operation
Over-Temperature Shutdown (OTSD)
When the die temperature exceeds the preset threshold (160C) for an extended period of 8µs, the
device enters into the over-temperature shutdown mode, where two differential outputs are pulled to
ground through an internal resistor (2KΩ) individually. The device will resume normal operation once
the die temperature returns to a temperature, which is at least 25C lower than the threshold.
CLASS-D AUDIO AMPLIFIER
As a Class-D audio amplifier, the ft2128 offers much higher efficiency than Class-AB amplifiers. The high
efficiency of a Class-D amplifier is due to the switching operation of the output stage. Any power loss
associated with the Class-D output stage is mostly due to the I2R loss of the MOSFET on-resistance and
quiescent current overhead.
Fully Differential Amplifier
The ft2128 is a fully differential amplifier with differential inputs and outputs. The fully differential amplifier
consists of a differential amplifier and a common-mode amplifier. The differential amplifier ensures that
the amplifier outputs a differential voltage on the output that is equal to the differential input times the
voltage gain. The common-mode feedback ensures that the common-mode voltage at the output is
biased around VDD/2 regardless of the common-mode voltage at the input. The fully differential ft2128
can still be used with a single-ended input; however, the ft2128 should be used with differential inputs in a
noisy environment, like a wireless handset, to ensure maximum noise rejection.
Low-EMI Filterless Output Stage
Traditional Class-D amplifiers require the use of external LC filters, or shielding, to meet EN55022B
electromagnetic-interference (EMI) regulation standards. The ft2128 uses a proprietary edge-rate
-controlled (ERC) circuitry to reduce EMI emissions, while maintaining up to 90% efficiency. Above
10MHz, the wideband spectrum looks like noise for EMI purposes.
Filterless Design
Traditional Class-D amplifiers require an output filter to recover the audio signal from the amplifier’s
output. The filter adds cost, increases the solution size of the amplifier, and can decrease efficiency and
THD+N performance. The traditional PWM scheme uses large differential output swings (with its
peak-to-peak equal to two times of the supply voltage) and causes large ripple currents. Any parasitic
resistance in the filter components results in a loss of power and lowers the efficiency.
The ft2128 does not require an output filter. The device relies on the inherent inductance of the speaker
coil and the natural filtering of both the speaker and the human ear to recover the audio component of the
square-wave output. Eliminate the output filter results in a smaller, less costly, and more efficient solution.
Because the frequency of its outputs is well beyond the bandwidth of most speakers, voice coil movement
due to the square-wave frequency is very small. Although this movement is small, a speaker not designed
to handle the additional power can be damaged. For optimum results, use a speaker with a series
inductance>10µH. An 8Ω speaker typically exhibits a series inductance in the range from 20µH to 100µH.
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ft2128
How to Reduce EMI
The ft2128 does not require an LC output filter for short connections from the amplifier to the speaker.
However, additional EMI suppressions can be made by use of a ferrite bead in conjunction with a
capacitor, as shown in Figure 36. Choose a ferrite bead with low DC resistance (DCR) and high
impedance (100Ω~330Ω) at high frequencies (>100MHz). The current flowing through the ferrite bead
must be also taken into consideration. The effectiveness of ferrites can be greatly aggravated at much
lower than the rated current values. Choose a ferrite bead with a rated current value no less than 2A. The
capacitor value varies based on the ferrite bead chosen and the actual speaker lead length. Choose a
capacitor less than 1nF based on EMI performance.
Ferrite
Chip Bead
VOP
FB1 220Ω/2A
C1
1nF
Ferrite
Chip Bead
VON
FB2 220Ω/2A
C2
1nF
Figure 36: Ferrite Bead Filter to Reduce EMI
RC SNUBBER CIRCUIT
For applications where the power supply is rated more than 4.6V or the load resistance less than 6Ω, it
may become necessary to add an RC snubber circuit between the two output pins, VOP and VON, for
robustness and reliability. Figure 37 shows a simple RC snubber circuit, which can be used to prevent the
device from accelerated deterioration or abrupt destruction due to excessive inductive flybacks that are
induced on fast output switching or by an over-current or short-circuit condition.
VOP
R1
1Ω~1.5Ω
SPEAKER
C1
680pF~1nF
VON
Figure 37: RC Snubber Circuit
Power Supply Decoupling Capacitor (C
S)
The ft2128 is a high-performance Class-D audio amplifier that requires adequate power supply
decoupling. Adequate power supply decoupling ensures high efficiency and low THD+N.
Place a low equivalent-series-resistance (ESR) ceramic capacitor (X7R or X5R), typically 1µF, within
2mm of the VDD pin. This choice of capacitor and placement helps degenerate high frequency transients,
spikes, or digital hash on the line. Also, placing the decoupling capacitor close to ft2128 is important, as
any parasitic resistance or inductance between the ft2128 and the bypass capacitor causes loss of
efficiency and degradation of audio quality. In addition to the 1µF ceramic capacitor, place a 47µF or
larger capacitor on the VDD supply trace. This large capacitor will act as a charge reservoir, providing
energy faster than the board supply, thus helping prevent any droop in the supply voltage.
Input Resistors (RIN)
To minimize the number of external components required for the application of ft2128, a set of 10KΩ input
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ft2128
resistors are integrated internally at INP and INN pins respectively. The internal input resistors also bring
other benefits such as higher PSRR and lower turn-on pop noise since on-chip resistors can match well.
Thus, for typical portable device applications, there is no need for additional input resistors connected to
INP or INN pin. However, for applications where additional gain adjustment becomes necessary, a set of
external input resistors can be added onto INP and INN pins respectively. The value of the external input
resistors must be included for the calculation of the overall voltage gain (as described by Equation 1) as
well as the selection of proper input capacitors (as described by Equation 3). As shown in Equation 2, the
external input resistors will attenuate the original overall voltage gain by the ratio of RINTERNAL / (RIN +
RINTERNAL).
AV = AV0 x [RINTERNAL / (RIN + RINTERNAL)]
(2)
where
AV0 = 24 (27.6dB)
RINTERNAL = 10KΩ
Input Capacitors (CIN)
The input DC decoupling capacitors are recommended to bias the audio inputs to an optimum DC level.
The input capacitor (CIN), in conjunction with the amplifier input resistance (including both internal 10KΩ
and external resistance RIN, if any) forms a highpass filter that removes the DC bias from the audio inputs.
The corner frequency, fC, of the highpass filter is given by Equation 3
fC = 1 / [2 x π x (RIN + RINTERNAL) x CIN]
RINTERNAL = 10KΩ
(3)
where
Note that any mismatch in capacitance and resistance between the two differential inputs will cause a
mismatch in the corner frequencies. Severe mismatch may also cause degradation of turn-on pop noise,
PSRR, and CMRR performance. Choose the resistors and capacitors with a tolerance of ±5% or better.
Choose CIN such that fC is well below the lowest frequency of interest. Setting it too high affects the
amplifiers’ low-frequency response. Consider an example where the specification calls for AV=21.6dB and
a flat frequency response down to 20Hz. In this example, RIN=10KΩ and CIN is calculated to be about
0.40µF, thus 0.47µF, as a common choice of capacitance, can be chosen for CIN.
The type of the input capacitor CIN is also important. For best audio quality, use capacitors whose
dielectrics have low-voltage coefficients, such as tantalum or aluminum electrolytic. Capacitors with
high-voltage coefficients, such as ceramics, may result in increased distortion at low frequencies. Other
factors for consideration when designing the input filter include the constraints of the overall system.
Although high-fidelity audio requires a flat response between 20Hz and 20kHz, portable devices may
concern primarily about the frequency range of the human voice, which ranges typically from 300Hz to
4kHz. Additionally, the physical size of the speakers used in most portable devices limits the low
frequency response. In this case, the frequency components below 150Hz may be filtered out.
VREF Bypass Capacitor (CVREF)
A voltage at VDD/2 is internally generated and provided to the VREF pin. A low-ESR ceramic capacitor of
1µF is strongly recommended at the VREF pin to ground. The bypass capacitor (CVREF) significantly
improves PSRR and THD+N performance by suppressing power supply and other noise sources at the
common-mode bias node.
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ft2128
TYPICAL APPLICATION CIRCUITS
VDD
CTRL
C5
Cs
+
47UF
1uF
C4
1
2
3
4
8
7
6
5
CTRL
VREF
INP
VOP
GND
VDD
VON
1uF
LS1
Single-Ended Input
C1 470nF
C2 470nF
R4 10K
R5 10K
ft2128
SPEAKER
INPUT
INN
Figure 38: Single-Ended Audio Input (with Digital Pulse Control)
VDD
CTRL
Rctrl 10K
C5
Cs
+
Cctrl
47UF
1uF
0.1uF
C4
1uF
L+R Inputs
1
2
3
4
8
7
6
5
CTRL
VREF
INP
VOP
GND
VDD
VON
R1 22K
R2 22K
R3 10K
C1
220nF
220nF
470nF
LS1
L-IN
ft2128
C2
C3
R-IN
SPEAKER
INN
R3=R1*R2/(R1+R2)
C3=C1+C2
Figure 39: Dual Channel Audio Inputs (for ALC-2 Operation)
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ft2128
TYPICAL APPLICATION CIRCUITS (Cont’d)
VDD
CTRL1
C5
Cs
+
R1
Cctrl
47UF
1uF
0.1uF
R2
C4
1
2
3
4
8
7
6
5
CTRL
VREF
INP
VOP
GND
VDD
VON
1uF
LS1
Differential Inputs
C1 470nF
C2 470nF
R4 10K
R5 10K
ft2128
INP
SPEAKER
INN
INN
Figure 40: Differential Audio Inputs (for ALC-1 Operation)
VDD
CTRL
C5
Cs
+
R1
Cctrl
47UF
1uF
0.1uF
R2
C4
1
2
3
4
8
7
6
5
CTRL
VREF
INP
VOP
GND
VDD
VON
1uF
Rs
1.5Ω
LS
Single-Ended Input
C1 470nF
C2 470nF
Ri
Ri
ft2128
SPEAKER
Cs
680pF~1nF
INN
INN
Figure 41: Single-Ended Audio Input (for ALC-1 Operation with a snubber circuit)
Note: It is strongly recommended to add a simple snubber circuit (RC in series) between the two outputs,
VOP and VON, for robust reliability in the applications where the power supply is rated more than 4.6V or the
load resistance less than 6Ω.
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ft2128
PHYSICAL DIMENSIONS
SOP-8 PACKAGE OUTLINE DIMENSIONS
θ1
θ3
h
θ
L
θ2
L1
θ4
D
INDEX
e
b
SYMBOL
MIN
1.35
0.10
1.25
0.50
0.38
0.17
4.80
5.80
3.80
NOM
1.55
0.15
1.40
0.60
-
MAX
UNIT
mm
mm
mm
mm
mm
mm
mm
mm
mm
mm
mm
mm
mm
mm
A
A1
A2
A3
b
c
D
E
E1
e
1.75
0.25
1.65
0.70
0.51
0.25
5.00
6.20
4.00
-
4.90
6.00
3.90
1.27 (BSC)
0.60
1.04REF
0.25BSC
0.40
-
L
0.45
0.80
L1
L2
h
0.30
0
0.50
8°
θ
θ1
θ2
θ3
θ4
15°
11°
15°
11°
17°
13°
17°
13°
19°
15°
19°
15°
SOP-8 PACKAGE OUTLINE DIMEMSIONS
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ft2128
PHYSICAL DIMENSIONS (Cont’d)
MSOP-8 PACKAGE OUTLINE DIMENSIONS
D:3.00± 0.10
E1:3.00± 0.10
E:4.90± 0.20
B
B
e:0.65± 0.10
A3:0.35± 0.10
A2:0.85± 0.10
All dimensions are in millimeters
Dimensions in Millimeters
Symbol
A:0.00-1.10
Min.
—
Max.
1.10
0.15
0.95
0.39
0.37
0.33
0.20
0.16
3.10
5.10
3.10
0.75
0.80
A
A1
A2
A3
b
0
A1:0.00-0.15
0.75
0.25
0.28
0.27
0.15
0.14
2.90
4.70
2.90
0.55
0.40
WITH PLATING
BASE METAL
b1
c
c1
D
E
E1
e
c1：0.15± 0.01
c:0.175± 0.025
θ1:12° ± 3°
b1：0.30± 0.03
b:0.325± 0.045
L
R1
0.95REF.
0.25BSC.
L1
L2
R
R1
θ
θ1
R
0.07
0.07
0°
—
—
8°
15°
L2：0.25
L：0.60± 0.20
L1：0.95
θ：0° -8°
9°
θ1:12° ± 3°
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ft2128
IMPORTANT NOTICE
1. Disclaimer: The information in document is intended to help you evaluate this product. Fangtek,
LTD. makes no warranty, either expressed or implied, as to the product information herein listed, and
reserves the right to change or discontinue work on this product without notice.
2. Life support policy: Fangtek’s products are not authorized for use as critical components in life support
devices or systems without the express written approval of the president and general counsel of Fangtek
Inc. As used herein
Life support devices or systems are devices or systems which, (a) are intended for surgical implant into
the body, or (b) support or sustain life, and whose failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be reasonably expected to result in a significant
injury to the user.
A critical component is any component of a life support device or system whose failure to perform can be
reasonably expected to cause the failure of the life support device or system, or to affect its safety or
effectiveness.
3. Fangtek assumes no liability for incidental, consequential or special damages or injury that may result
from misapplications or improper use or operation of its products
4. Fangtek makes no warranty or representation that its products are subject to intellectual property
license from Fangtek or any third party, and Fangtek makes no warranty or representation of
non-infringement with respect to its products. Fangtek specifically excludes any liability to the customer or
any third party arising from or related to the products’ infringement of any third party’s intellectual property
rights, including patents, copyright, trademark or trade secret rights of any third party.
5. The information in this document is merely to indicate the characteristics and performance of Fangtek
products. Fangtek assumes no responsibility for any intellectual property claims or other problems that
may result from applications based on the document presented herein. Fangtek makes no warranty with
respect to its products, express or implied, including, but not limited to the warranties of merchantability,
fitness for a particular use and title.
6. Trademarks: The company and product names in this document may be the trademarks or registered
trademarks of their respective manufacturers. Fangtek is trademark of Fangtek, LTD.
CONTACT INFORMATION
Fangtek Electronics (Shanghai) Co., Ltd
Room 501A, No.10, Lane 198, Zhangheng Road
Zhangjiang Hi-tech Park, Pudong District
Shanghai, China, 201204
Tel: +86-21-61631978
Fax: +86-21-61631981
Website:
www.fangtek.com.cn
OCT, 2013
www.fangtek.com.cn
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