FP1500QFN-1 [FILTRONIC]
Transistor,;
| 型号： | FP1500QFN-1 |
| 厂家： | 
FILTRONIC COMPOUND SEMICONDUCTORS |
| 描述： | Transistor, |
| 文件： | 总4页 (文件大小：237K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
FP1500QFN
PACKAGED LOW NOISE, HIGH LINEARITY PHEMT
• FEATURES
♦ 28 dBm Output Power at 1-dB Compression
♦ 18 dB Power Gain at 2 GHz
♦ 0.8 dB Noise Figure at 2 GHz
♦ 41 dBm Output IP3
♦ 50% Power-Added Efficiency
• DESCRIPTION AND APPLICATIONS
The FP1500QFN is a high performance, leadless, encapsulated packaged Aluminum Gallium
Arsenide / Indium Gallium Arsenide (AlGaAs/InGaAs) pseudomorphic High Electron Mobility
Transistor (pHEMT). It utilizes a 0.25 µm x 1500 µm Schottky barrier gate, defined by electron-
beam photolithography. The recessed “mushroom” gate structure minimizes parasitic gate-source
and gate resistance. The epitaxial structure and processing have been optimized for reliable high-
power applications. The FP1500’s active areas are passivated with Si3N4, and the QFN package is
ideal for low-cost, high-performance applications that require a surface-mount package. Typical
applications include drivers or output stages in PCS/Cellular amplifiers, WLL and WLAN systems,
and other types of wireless infrastructure systems up to 15 GHz.
• ELECTRICAL SPECIFICATIONS @ TAmbient = 25°C
Parameter
Symbol
Test Conditions
Min Typ Max Units
Saturated Drain-Source Current
FP1500QFN-1
IDSS
VDS = 2 V; VGS = 0 V
375
451
527
27
420
490
560
28
18
50
0.8
41
925
400
10
450
526
600
mA
mA
mA
dBm
dB
FP1500QFN-2
FP1500QFN-3
Power at 1-dB Compression
Power Gain at 1-dB Compression
Power-Added Efficiency
Noise Figure
Output Third-Order Intercept Point
Maximum Drain-Source Current
Transconductance
P-1dB
G-1dB
PAE
NF
IP3
IMAX
GM
IGSO
VP
VBDGS
VDS = 5 V; IDS = 50% IDSS
VDS = 5 V; IDS = 50% IDSS
VDS = 5 V; IDS = 50% IDSS
VDS = 5 V; IDS = 50% IDSS
VDS = 5V; IDS = 50% IDSS
VDS = 2 V; VGS = 1 V
VDS = 2 V; VGS = 0 V
VGS = -5 V
17
%
dB
dBm
mA
mS
µA
V
563
385
Gate-Source Leakage Current
Pinch-Off Voltage
100
-0.25
VDS = 2 V; IDS = 8 mA
IGS = 8 mA
-2.0
-10
-1.2
-12
Gate-Source Breakdown
Voltage Magnitude
V
Gate-Drain Breakdown
Voltage Magnitude
VBDGD
IGD = 8 mA
-10
-13
V
All RF data tested at 2.0 GHz
Phone: (408) 988-1845
Fax: (408) 970-9950
http:// www.filss.com
Revised: 10/17/02
Email: sales@filss.com
FP1500QFN
PACKAGED LOW NOISE, HIGH LINEARITY PHEMT
• ABSOLUTE MAXIMUM RATINGS
Parameter
Symbol
Test Conditions
Min
Max Units
Drain-Source Voltage
Gate-Source Voltage
Drain-Source Current
Gate Current
VDS
VGS
IDS
IG
PIN
TCH
TSTG
PTOT
6
-3
V
V
mA
mA
mW
ºC
TAmbient = 22 ± 3 °C
TAmbient = 22 ± 3 °C
TAmbient = 22 ± 3 °C
TAmbient = 22 ± 3 °C
TAmbient = 22 ± 3 °C
TAmbient = 22 ± 3 °C
—
IDSS
15
350
175
175
2.7
RF Input Power
Channel Operating Temperature
Storage Temperature
Total Power Dissipation
-65
ºC
W
TAmbient = 22 ± 3 °C
Notes:
•
Operating conditions that exceed the Absolute Maximum Ratings could result in permanent damage to the device.
•
Power Dissipation defined as: PTOT ≡ (PDC + PIN) – POUT, where
P
DC: DC Bias Power
PIN: RF Input Power
OUT: RF Output Power
P
•
•
Absolute Maximum Power Dissipation to be de-rated as follows above 25°C:
PTOT= 2.7W – (0.018W/°C) x TPACK
where TPACK = source tab lead temperature. (Bottom of the Package)
This PHEMT is susceptible to damage from Electrostatic Discharge. Proper precautions should be used when handling these
devices.
• PCB PAD LAYOUT
Phone: (408) 988-1845
Fax: (408) 970-9950
http:// www.filss.com
Revised: 10/17/02
Email: sales@filss.com
FP1500QFN
PACKAGED LOW NOISE, HIGH LINEARITY PHEMT
• PACKAGE OUTLINE
GBC
• ENGINEERING APPLICATION CIRCUITS
Power Amplifier Design
P1dB Gain Optimized Gammas
ΓS (Mag.<Ang.) ΓL Mag.<Ang.)
Freq.
(GHz)
0.9
Bias
VDS , IDS
5V, 249mA
5V, 249mA
5V, 249mA
5V, 249mA
(dBm)
27
(dB)
24
0.68<75.7°
0.74<116°
0.75<138°
0.66<179°
0.66<175.3°
0.56<-178.4°
0.58<176°
1.8
28
19
2.4
27
17
5.6
27
11.5
0.52<-162.5°
Phone: (408) 988-1845
Fax: (408) 970-9950
http:// www.filss.com
Revised: 10/17/02
Email: sales@filss.com
FP1500QFN
PACKAGED LOW NOISE, HIGH LINEARITY PHEMT
Low Noise Design
VDS=5V, IDS=125mA
Freq. N. F. (min) Optimized Input Gamma
GHz
0.9
dB
0.67
0.76
0.75
0.80
0.91
1.11
1.09
1.15
(Γs) Mag.<Ang.
0.17<45°
1.8
0.33<81°
2.2
0.31<97.4°
2.4
0.32<107.9°
0.34<142.8°
0.46<163°
3.2
4.5
5.0
0.49<169.4°
0.50<-177.5°
6.0
• HANDLING PRECAUTIONS
To avoid damage to the devices care should be exercised during handling. Proper Electrostatic
Discharge (ESD) precautions should be observed at all stages of storage, handling, assembly, and
testing. These devices should be treated as Class 1A (0-500 V). Further information on ESD control
measures can be found in MIL-STD-1686 and MIL-HDBK-263.
• APPLICATIONS NOTES & DESIGN DATA
Applications Notes are available from your local Filtronic Sales Representative or directly from the
factory. Complete design data, including S-parameters, noise data, and large-signal models are
available on the Filtronic web site.
All information and specifications are subject to change without notice.
Phone: (408) 988-1845
Fax: (408) 970-9950
http:// www.filss.com
Revised: 10/17/02
Email: sales@filss.com
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