FP9928AWQCTR_技术文档

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FP9928A

Integrated Multi-Channel

DC-DC Converters for Panels

Description

Features

The FP9928A offers a compact power supply solution

to provide all voltages required by EPD panel. The

FP9928A includes 2 high performance PFM DC-DC

converters, one is for positive voltage and the other is

for negative voltage used by EPD drivers, a VCOM

buffer (unity-gain OPA), a positive charge pump and

a negative charge pump to provide adjustable

regulated output voltages.

 High Efficiency

 Low Power Consumption

 2.7V to 5.5V Input Supply Voltage

 I²C Serial Interface

 Over-Temperature Protection

DC-DC Converters

 Fast Transient Response to Pulsed Load

 Built-In 20V, 800mA, 1Ω MOSFET

 Built-In Soft-Start

The converters provide the regulated positive and

negative supply voltage for the panel source driver

ICs.

 Over-Current Protection

LDO Regulator

 Built-In ±15V LDO with ±0.15V accuracy for

Source Driver Supply

The positive charge pump controller provides

regulated EPD gate-on voltage.

charge pump controller provides regulated EPD

gate-off voltage.

The negative

Adjustable VCOM Driver for Accurate

Panel-Backplane Biasing

 -0.6V to -5V

 8-bit Control

Accurate back-plane biasing is provided by a linear

amplifier and can be adjusted either by an external

resistor or the I²C interface. The VCOM driver can

source or sink current depending on panel condition.

For automatic VCOM adjustment in production line,

VCOM can be set from -0.6V to -5V with 8 bit control

through the serial interface.

Regulated Charge Pumps

 Charge Pump for VGH Regulation

 Charge Pump for VGL Regulation

 TQFN-24 (4mm×4mm) Package

 RoHS Compliant

Thermistor Monitoring

 -10°C to +85°C Temperature Range

 ±1°C Accuracy from 0°C to 50°C

The FP9928A provides precise temperature

measurement function to monitor the panel

temperature during operation.

The FP9928A

automatically updates the temperature every 60s.

Applications

 Electro-Phoretic Display (EPD) Panel

 E-Book

 P-DVD

 CAR TV

Pin Assignments

WQ Package (TQFN-24)(4mm×4mm)

Ordering Information

23

24

22

21

20

19

FP9928A□□□

1

2

3

4

5

6

FBGH

18

17

16

15

14

13

DRVN

TR: Tape/Reel

Blank: Tube

VPOS_IN

VPOS

FBGL

VNEG_IN

25

VSS

VNEG

EN

TP

C: Green

OPOUT

VSSOP

TS

Package Type

7

8

9

10

11

12

WQ: TQFN-24 (4mm×4mm)

Note: Connect pin25 to VSS

Figure 1. Pin Assignment of FP9928A

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FP9928A

Typical Application Circuit

1Ω

4.7μF

EN

VIN

1μF

ENOP

VSS

10μH

VIN

LXN

10μH

VIN

VNEG_IN

LXP

1μF

VNEG_IN

VPOS_IN

4.7μF

BAV99

VGH

VPOS_IN

1μF

4.7μF

0.1μF

VREF

DRVN

FBGL

0.1μF

0.22μF

47K

DRVP

FBGH

787K

750K

1uF

FP9928A

VGL

VS

47K

0.22μF

4.7μF

VNEG

VPOS

4.7μF

VSSP2

10K NTC

43K

VSSP1

TS

VNEG

180K

30K

VSSOP

DAC

MUX

OPIN

10Ω

VCOM_PANEL

OPOUT

1nF

4.7μF

Figure 2. Typical Application Circuit of FP9928A

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FP9928A

Functional Pin Description

Pin Name

FBGH

VPOS_IN

VPOS

EN

Pin No.

Pin Function

1

Voltage Feedback to Determine Positive Charge Pump Output Voltage. FBGH is regulated to 1.25V.

Input pin for LDO (VPOS).

2

3

Positive Source Driver Power.

4

Enable Pin of Whole CHIP

TP

5

Test pin for testing, please do not connect to any signal.

Thermistor input pin. Connect a 10K NTC thermistor and a 43K linearization resistor between this pin and

system GND.

TS

6

VREF

SDA

7

Internal Reference Bypass Terminal.

8

Serial interface (I²C) data input/output.

SCL

9

Serial interface (I²C) clock input.

VIN

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

Power Supply Input. The supply voltage powers all the control circuits.

Enable Pin of Unity-Gain Operational Amplifier, active when EN is high.

Unity-Gain Operational Amplifier Input Pin.

ENOP

OPIN

VSSOP

OPOUT

VNEG

VNEG_IN

FBGL

DRVN

VS

Positive Supply of Unity-Gain Operational Amplifier.

Unity-Gain Operational Amplifier Output Pin.

Negative Source Driver Power, also ground of op-amp.

Input pin for LDO (VNEG).

Voltage Feedback to Determine Negative Charge Pump Output Voltage. FBGL is regulated to 0V.

Switching Pin. Driver for the negative charge pump.

Regulated voltage for internal circuit.

LXN

Switching Pin. Drain of the internal power NMOS for the inverting regulator.

Power Ground. VSSP2 is the source of positive or Inverting boost converter power NMOS.

Power Ground. VSSP1 is the source of positive or Inverting boost converter power NMOS.

Switching Pin. Drain of the internal power NMOS for the positive regulator.

Switching Pin. Driver for the positive charge pump.

VSSP2

VSSP1

LXP

DRVP

VSS

Chip Digital Ground Pin must be connected to System GND.

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FP9928A

Block Diagram

VS

VREF

BG

DRVN

FBGL

VGL

Charge Pump

Bias

LXN

VNEG

DC-DC

VNEG_IN

Converter

VSSP2

Soft-

Start

VIN

UVLO

VNEG

VNEG LDO

VPOS LDO

EN

VPOS

On/Off Sequence

Control

ENOP

VPOS_IN

LXP

VPOS

DC-DC

Converter

VSSP1

VCOM

Buffer

TEMP

Sensor

DRVP

FBGH

VGH

Charge Pump

TS

OPIN

OPOUT

VSSOP

VSS

Figure 3. Block Diagram of FP9928A

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FP9928A

Absolute Maximum Ratings

● LXP, LXN, DRVP, DRVN, VPOS_IN, VPOS, VS ----------------------------------------------------------- -0.3V to +22V

● VIN, EN, ENOP, FBGH, FBGL,VREF ------------------------------------------------------------------------ -0.3V to +6V

● VNEG_IN, VNEG, OPIN, OPOUT --------------------------------------------------------------------------- -24V to +0.3V

● VSS,VSSP1, VSSP2, VSSOP --------------------------------------------------------------------------------- -0.3V to +0.3V

● Power Dissipation @T_A=25°C, (P_D)

2.0W

TQFN-24 (4mm×4mm) -----------------------------------------------------------------------------

● Package Thermal Resistance, (θ_JA)

TQFN-24 (4mm×4mm) -----------------------------------------------------------------------------

50°C/W

● Lead Temperature (Soldering, 10sec.) ----------------------------------------------------------------------- +260°C

● Maximum Junction Temperature (T_J) ------------------------------------------------------------------------- +150°C

● Storage Temperature (T_STG) ------------------------------------------------------------------------------------ -65°C to +150°C

Note：Stresses beyond those listed under “Absolute Maximum Ratings" may cause permanent damage to the device.

Recommended Operating Conditions

● Supply Voltage (VIN) --------------------------------------------------------------------------------------------- +2.7V to +5.5V

● Operating Junction Temperature Range --------------------------------------------------------------------- -40°C to +85°C

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FP9928A

Electrical Characteristics

(V_IN=3.7V, T_A=0 to 85°C, typical values are at T_A=25°C, unless otherwise specified)

Parameter

System Supply

Symbol

Conditions

Min

Typ

Max

Unit

Input Voltage Range

V_IN

2.7

3.7

2.5

0.2

1.5

0.1

1.25

140

20

5.5

V

V_INRising

Hysteresis

-

V_INUVLO Threshold

V_UVLO

-

V_INSupply Current

V_INShutdown Current

REF Output Voltage

I_IN

I_SD

-

mA

µA

V

-

1

V_REF

1.225

1.275

-

°C

Thermal Shutdown Threshold

T_SD

Hysteresis

Boost Regulator

NMOS Switch ON-Resistance

NMOS Switch Current Limit

NMOS Switch Leakage Current

VPOS LDO

R_ONNMOS

I_LIMNMOS

I_LXNMOS

-

1

-

Ω

800

0.1

mA

µA

V_LXP=18V

Input Voltage Range

Output Voltage Range

Inverting Regulator

NMOS Switch ON-Resistance

NMOS Switch Current Limit

Switch Leakage Current

VNEG LDO

V_{POS_IN}

V_POS

15.3

-

17

V

I_LOAD=20mA

14.85

15

15.15

R_ONNMOS

I_LIMNMOS

I_LXNMOS

-

1

-

Ω

800

0.1

mA

µA

V_LXN=18V

Input Voltage Range

Output Voltage Range

VCOM Buffer

V_{NEG_IN}

V_NEG

-17

-

-15.3

V

I_LOAD=-20mA

-15.15

-15

-14.85

VCOM_SET[7:0]=0x74h(-1.25V)

VIN=3.4V to 4.2V, No load

-0.8

-1.5

-5

-

0.8

1.5

-0.6

34

%

Accuracy

V_COMACC

VCOM_SET[7:0]=0x74h(-1.25V)

VIN=2.7V to 5.5V, No load

Output voltage range

Resolution

V_COM

V_RES

V_G

V

VCOM_ADJ=1, 1 LSB

VCOM_ADJ=0

-

22

1

mV

V/V

VCOM Gain (OPOUT/OPIN)

-

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FP9928A

Electrical Characteristics

(V_IN=3.7V, T_A=0 to 85°C, typical values are at T_A=25°C, unless otherwise specified)

Parameter Symbol Conditions

Min

Typ

Max

Unit

LOGIC LEVELS AND TIMING CHARACTERISTIC (SCL, SDA)

Input Low Threshold Level

Input High Threshold Level

Output Low Threshold Level

SCL Clock Frequency

Thermal Sensor (Note 1)

Offset

V_IL

V_IH

-

1.2

-

0.4

-

V

V_OL

f_SCL

I_O=3mA, Sink Current.

0.4

400

V

-

kHz

OffsetTMS Temperature = 25°C

VTMS_MAX

-

1.18

2.25

7.307

43

-

V

Maximum Input Level

Internal Pull Up Resistor

External Linearization Resistor

RNTC_UP

KΩ

RLINEAR

Note 1: 10KΩ Murata NCP18XH103F03RB thermistor (1%) in parallel with a linearization resistor (43kΩ, 1%) are used at

TS pin for panel temperature measurement.

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FP9928A

Power On Sequence

VIN

EN

22ms

0.5ms

VREF

5ms

VGL

2ms

3ms

13ms

VNEG

VCOM

0.5ms

16ms

0.2ms

16.5ms

VGH

3ms

19ms

VPOS

Note : VIN UVLO  EN  VREF  VGL  VNEG  VCOM  VGH  VPOS

Figure 4. Power-on Sequence

Power Level

VGH

Power on

VPOS

VIN

VREF

VSS

VCOM

VNEG

VGL

Note : VGL < VNEG < VCOM < VSS < VREF < VIN < POS < VGH

Figure 5. Power Level

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FP9928A

Power Off Sequence

VIN

EN

>30ms

VREF

>2s

VGL

>10ms

VNEG

>1.5s

VCOM

VGH

>2s

>10ms

VPOS

Figure 6. Power Off Sequence

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FP9928A

VCOM Adjustment

Through the I²C interface, the user can select between two methods of VCOM voltage adjustment:

(1) Use the internal 8-bit DAC and register control

(2) Use an external voltage source (resistor divider) connected to the OPIN pin.

The VCOM adjustment method is selected by the VCOM_ADJ bit of the FUNC_ADJUST register (0x01h), and

both methods have the same adjustment voltage range. The block diagram for VCOM is shown in Figure 7.

VCOM Adjustment through Register Control

By default the FP9928A is setup for internal VCOM control through the I²C interface. The default setting for

the 8-bit DAC is 0x74h which results in 1.25V +/- 0.8% for VCOM. VCOM can be adjusted up or down in

steps of 22mV (typ.) by writing to the VCOM_SETTING register (0x02h). The output range for VCOM is

limited to -0.6 to -5V.

VREF

VCOM_ADJ

MUX

VCOM_SET[7:0]

VNEG

-0.6 ~ -5V

VSSOP

DAC

-15V

OPIN

1nF

-0.6 ~ -5V

VCOM_PANEL

OPOUT

10Ω

4.7μF

-15V

Figure 7. Block Diagram of VCOM Circuit

VCOM Adjustment through External Potentiometer

VCOM can be adjusted by an external potentiometer by setting the VCOM_ADJ bit of the FUNC_ADJUST

register to 0 and connecting a potentiometer to the OPIN pin. The potentiometer must be connected between

ground and a negative supply as shown in Figure 7. The gain from OPIN to OPOUT is 1, and therefore the

voltage applied to OPIN pin should range from -0.6 to -5V.

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FP9928A

Temperature Sensor

The FP9928A is specifically designed to operate in multi-host systems where one of I²C host, e.g. the display

controller, has limited I²C capability. Standard I²C protocol requires the following steps to read data from a

register:

1. Send device and register address, R/nW bit set low (write command).

2. Send device address, R/nW set high (read command).

3. The slave will respond with data from the specified register address.

Some display controllers support I²C read commands only and need to access the temperature data form the

FP9928A TMST_VALUE register. To support these systems, the FP9928A automatically triggers temperature

acquisition every 60s and stores the result in TMST_VALUE register. With the FIX_RD_PTR bit in the

FUNC_ADJUST register set to 1 the device will respond to any I²C read command with data from the

TMST_VALUE register. No write command with the register address is required and address auto increment

feature is disabled in this mode. Therefore reading the temperature data is reduced to two steps:

1. Send device address, R/nW set high (read command).

2. Read the data from the Slave. The slave will respond with data from TMST_VALUE register address.

The FIX_RD_PTR Bit

The FP9928A supports a special I²C mode making it compatible with the EPSON Broadsheet S1D13521

timing controller. Standard I²C protocol requires the following steps to read data from a register:

1. Send device slave address, R/nW bit set low (write command)

2. Send register address

3. Send device slave address, R/n/W set high (read command)

4. The slave will respond with data from the specified register address.

The EPSON Broadsheet S1D13521 controller does not support I²C writes nor I²C reads from addressed

register (step 1. and step 2. above) but needs to access the temperature data from the FP9928A’s

TMST_VALUE register. To support Broadsheet based systems, the FP9928A automatically triggers

temperature acquisition every 60s and stores the result in TMST_VALUE register. With the FIX_RD_PTR bit

in the FUNC_ADJUST register set to 1 the device will respond to any I²C read command with data from the

TMST_VALUE register. No write command with the register address is required and address auto increment

feature in the mode. Therefore reading the temperature data is reduced to two steps:

1. Send device address, R/nW set high (read command).

2. Read the data from the Slave. The slave will respond with data from TMST_VALUE register address.

At system power-up the main processor sets up the PMIC by accessing the I²C registers and setting the

control parameters as needed. When the system is setup correctly, the main controller sets the FIX_RD_PTR

bit and the display controller can start accessing the temperature information. During normal operation, the

main controller can write to the PMIC at any time but before it can read access registers the FIX_RD_PTR bit

must be written 0.

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FP9928A

NTC BIAS Circuit

Figure 8 shows the block diagram of the NTC bias and measurement circuit. The NTC is biased from an

internally generated 2.25V reference voltage through an integrated 7.307ΩK bias resistor. A 43ΩK resistor is

connected parallel to the NTC to linearize the temperature response curse. The circuit is designed to work

with a nominal 10ΩK NTC and achieves accuracy of ±1°C from 0°C to 50°C. The voltage drop across the

NTC is digitized by a 10-bit SAR ADC and translated into an 8-bit two’s complement by digital per Table 1.

Table 1. ADC Output Value vs Temperature

TEMPERATURE

TMST_VALUE [7:0]

1111 0110

1111 0111

---

< -10°C

-10°C

-9°C

---

-2°C

-1°C

0°C

1111 1110

1111 1111

0000 0000

0000 0001

0000 0010

---

1°C

2°C

---

25°C

---

0001 1001

---

85°C

> 85°C

0101 0101

2.25V

7.307kΩ

10

TS

10 bit ADC

Digital

10kΩ

NTC

43kΩ

Figure 8. NTC Bias and Measurement Circuit

FP9928A Temperature Acquisition

The FP9928A triggers temperature acquisition every 60s. The FP9928A can be accessed at any time, and

reading the Temperature Register will yield result from the last temperature conversion. When the FP9928A

is accessed, the conversion that is in process will be interrupted and it will be restarted after the end of the

communication. Accessing the FP9928A continuously without waiting at least one conversion time between

communications will prevent the device from updating the Temperature Register with a new temperature

conversion result.

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FP9928A

I²C Interafce Specification

Serial Interface

The serial interface is compatible with the standard and fast mode I²C specifications, allowing transfers at up to

400 kHz. The interface adds flexibility to the power supply solution, enabling most functions to be

programmed to new values depending on the instantaneous application requirements and the PMIC status to

be monitored. The E Ink® PMIC has a 7bit address: ‘1001000’, other addresses are available upon contact

with the factory. Attempting to read data from register addresses not listed in this section will result in 00h

being read out. For normal data transfer, SDA is allowed to change only when SCL is low. Changes when

SCL is high are reserved for indicating the start and stop conditions. During data transfer, the data line must

remain stable whenever the clock line is high. There is one clock pulse per bit of data. Each data transfer is

initiated with a start condition and terminated with a stop condition. When addressed, the –PMIC generates

an acknowledge bit after the reception of each byte. The master device (microprocessor) must generate an

extra clock pulse that is associated with the acknowledge bit. The –PMIC will pull down the SDA line during

the acknowledge clock pulse so that the SDA line is a stable low during the high period of the acknowledge

clock pulse. The SDA line is a stable low during the high period of the acknowledge–related clock pulse.

Setup and hold times must be taken into account. During read operations, a master must signal the end of

data to the slave by not generating an acknowledge bit on the last byte that was clocked out of the slave. In this

case, the slave –PMIC device must leave the data line high to enable the master to generate the stop

condition.

DATA

CLK

Data line Change

stable;

of data

data valid allowed

Figure 9. bit transfer on the serial interface

DATA

CLK

S

P

START condition

STOP condition

Figure 10. START and STOP conditions

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FP9928A

I²C Timing Diagrams

1

9

1

9

1

9

SCL

SDA

A6

A5

A4

A3

A2

A1

A0 R/W ACK

A7

A6

A5

A4

A3

A2

A1

A0 ACK

0

D7

D6

D5

D4

D3

D2

D1

D0 ACK

0

Stop by

Master

Start

Slave Address

Register Address

Data

Figure 11. Serial interface WRITE to the device.

1

9

1

9

1

9

1

9

SCL

SDA

A6

A0 R/W ACK

A7

A0 ACK

A6

A0 R/W ACK D7

D6

D5

D4

D3

D2

D1

D0 nACK

No ACK

and stop

by Master

0

1

0

1

Slave Drives the Data

Start

Slave Address

Register Address

Slave Address

Repeat

Start

Figure 12. Serial interface READ from the device.

1

9

1

9

SCL

SDA

nACK

A6

A5

A4

A3

A2

A1

A0 R/W ACK

D7

D6

D5

D4

D3

D2

D1

D0

No ACK

and stop

by Master

1

0

1

Start

Slave Address

Data

Figure 13. Serial interface READ from the device for EPSON Broadsheet support.

Figure 13. I²C READ data transmission with FIX_RD_PTR bit set for EPSON Broadsheet support. Only

address 0x00h can be read. FIX_RD_PTR bit has no impact on WRITE transaction.

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FP9928A

I²C Data Transmission Timing

t_(BUF)

SDA

SCL

t_su(STA)

t_h(STA)

t_f

t_WL

t_WHt_h(SDA)

t_su(SDA)

t_r

t_su(STO)

Repeat

START

t_h(STA)

START

STOP

START

t_r

t_f

Figure 14. Serial I/F Timing Diagram

Data Transmission Timing

VBAT=3.7V±5%, TA=25°C, CL=100pF, SCL=400KHz (unless otherwise noted)

Parameter

Symbol

f_SCL

Conditions

Min

-

Typ

Max

Unit

kHz

nS

Serial clock frequency

HIGH period of the SCL clock

LOW period of the SCL clock

SDA and SCL rise time

SDA and SCL fall time

Data input setup time

-

400

t_WH

600

1300

-

t_WL

nS

t_r

300

-

nS

t_f

-

nS

tsu(SDA)

th(SDA)

tsu(STA)

100

0

nS

Data input hold time

900

-

nS

Setup time for a repeated

START condition.

600

nS

Hold time (repeated) START

condition. After this period, the

first clock pulse is generated.

th(STA)

600

-

nS

Setup time for STOP condition

tsu(STO)

t(BUF)

600

-

nS

Bus free time between stop

and start condition

1300

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FP9928A

Register Address Map

Register

Address (Hex)

Name

Default Value

Description

0

0x00

TMST_VALUE

N/A

Thermistor value read by ADC

Vcom output adjustment method

and I²C read pointer control

1

2

0x01

0x02

FUNC_ADJUST

VCOM_SETTING

0000 0001

0111 0100

Voltage setting for Vcom

THERMISTOR READOUT (TMST_VALUE)

Address – 0x00h

Data Bit

D7

D6

D5

D4

D3

D2

D1

D0

Field Name

Read/Write

Reset Value

TMST_VALUE [7:0]

R

NA

Field Name

Bit Definition

Temperature read-out

1111 0110 – < -10°C

1111 0110 – -10°C

1111 0111 – -9°C

---

1111 1110 – -2°C

1111 1111 – -1°C

0000 0000 – 0°C

0000 0001 – 1°C

0000 0010 – 2°C

---

TMST_VALUE [7:0]

0001 1001 – 25°C

---

0101 0101 – 85°C

0101 0101 – > 85°C

VCOM ADJUSTMENT METHOD and I²C read pointer control (FUNC_ADJUST)

Address – 0x01h

Data Bit

D7

D6

D5

D4

D3

D2

D1

D0

Field Name

Read/Write

Reset Value

Not Used

FIX_RD_PTR VCOM_ADJ

R

R./W

0

R./W

1

NA

Field Name

Bit Definition

I²C read pointer control

0 – Read pointer is controlled through I²C (Default)

1 – Read pointer is fixed to 0x00h

VCOM output adjustment method

0 – OPIN pin

FIX_RD_PTR

VCOM_ADJ

1 – I²C interface (Default)

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FP9928A

VCOM ADJUSTMENT (VCOM_SETTING)

Address – 0x02h

Data Bit

D7

D6

D5

D4

D3

D2

D1

D0

Field Name

Read/Write

Reset Value

VCOM_SET[7:0]

R./W

0

R./W

1

R./W

1

R./W

1

R./W

0

R./W

1

R./W

0

R./W

0

Field Name

Bit Definition

VCOM voltage adjustment

0000 0000 – Reserved

---

0001 1011 – Reserved

0001 1100 – 604mV

0001 1101 – 626mV

---

0111 0011 – 2480mV

0111 0100 – 2500mV (Default)

0111 0101 – 2522mV

---

VCOM_SET[7:0]

1110 1000 – 5002mV

1110 1001 – Reserved

---

1111 1111 – Reserved

Note: Step size is rounded to 11mV. Theoretical step size is 5500mV / 255 = 21.57mV.

FP9928A-0.1-OCT-2013

17

fitipower integrated technology lnc.

FP9928A

Outline Information

TQFN-24 4mm×4mm (pitch: 0.5mm) Package (Unit: mm)

DIMENSION IN MILLIMETER

SYMBOLS

UNIT

MIN

0.70

0.00

0.18

3.90

0.30

0.18

0.45

2.20

MAX

0.80

0.05

0.25

4.10

0.45

0.30

0.55

2.80

A

A1

C

E

D

L

b

e

E1

D1

Carrier Dimensions

Life Support Policy

Fitipower’s products are not authorized for use as critical components in life support devices or other medical systems.

FP9928A-0.1-OCT-2013

18


型号：	FP9928AWQCTR
厂家：	Fitipower
描述：	Integrated Multi-Channel DC-DC Converters for Panels
文件：	总18页 (文件大小：656K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

FP9928AWQCTR [FITIPOWER]

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FPA-10-L/Q

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FPA-10-R

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FPA-11-K

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