092-2.000-AE0 [FOX]
HCMOS/TTL Output Clock Oscillator, 2MHz Nom, LEAD FREE, SMD, 4 PIN;型号: | 092-2.000-AE0 |
厂家: | FOX ELECTRONICS |
描述: | HCMOS/TTL Output Clock Oscillator, 2MHz Nom, LEAD FREE, SMD, 4 PIN |
文件: | 总1页 (文件大小:103K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
5.0V HCMOS SMD OSCILLATOR
MODEL: F3345 SERIES
FEATURES
• 5.0V Operation
OPTIONS
• 1.05mm Height Max
• HCMOS/TTL Output
• Tri-State Enable/Disable
• Tape and Reel (2,000 pcs. STD)
• Standby Function (F4101)
Learn more about:
Part Marking Identification
Tape and Reel Specification
Mechanical Specification
Internet required
• PART NUMBER SELECTIONLearn More - Internet Required
Frequency
Operating
Model
Number
F3345
Frequency
Part Number
Stability1 Temperature (ºC)
Range (MHz)
1.000 ~ 80.000
1.000 ~ 80.000
1.000 ~ 80.000
1.000 ~ 80.000
1.000 ~ 80.000
1.000 ~ 80.000
1.000 ~ 80.000
±100PPM
-10 ~ +70
-40 ~ +85
-10 ~ +70
-40 ~ +85
-10 ~ +70
-40 ~ +85
-10 ~ +70
092-Frequency-xxxxx
093-Frequency-xxxxx
090-Frequency-xxxxx
091-Frequency-xxxxx
094-Frequency-xxxxx
095-Frequency-xxxxx
096-Frequency-xxxxx
F3345R ±100PPM
F3340 ±50PPM
F3340R ±50PPM
F3346 ±25PPM
F3346R ±25PPM*
F3348 ±20PPM*
• ELECTRICAL CHARACTERISTICS
MAX (unless otherwise noted)
1.000 ~ 80.000 MHz
-55ºC ~ +125ºC
PARAMETERS
Frequency Range (FO)
Storage Temperature Range (TSTG)
Supply Voltage
Input Current
(VDD)
(IDD)
5.0V ± 10%
1.000 ~ 25.000 MHz
25.000+ ~ 50.000 MHz
25mA
40mA
50.000+ ~ 67.000 MHz
60mA
67.000+ ~ 80.000 MHz
73mA
Output Symmetry (50% VDD)
Rise Time (10% ~ 90% VDD) (TR)
Fall Time (90% ~ 10% VDD) (TF)
45% ~ 55%
7nS
7nS
Output Voltage
(VOL)
(VOH)
(IOL)
10% VDD
90% VDD Min
16mA Min
-16mA Min
Output Current
(IOH)
Output Load
TTL
10TTL
HCMOS
50pF
Start-up Time
(TS)
10mS
100nS
Enable/Disable Time 2
Maximum Soldering Temp / Time
Moisture Sensitivity Level (MSL)
Termination Finish
260ºC / 10 Seconds
1
Au
1 Inclusive of 25ºC tolerance, operating temperature range, input voltage change, load change, aging,
shock, and vibration. *Excludes Shock/Vibration
2 An internal pullup resistor from pin 1 to pin 4 allows active output if pin 1 is left open.
Note: A 0.01µF bypass capacitor should be placed between VDD (Pin 4) and GND (Pin 2) to
minimize power supply line noise.
All dimensions are in millimeters.
All specifications subject to change without notice. Rev. 8/2/05
• ENABLE / DISABLE FUNCTION
INH (Pin 1)
OPEN 2
OUTPUT (Pin 3)
ACTIVE
'1' Level VIH ≥ 2.2 V
'0' Level VIL ≤ 0.8 V
ACTIVE
High Z
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