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MCF51EM256CLK [FREESCALE]

ColdFire Microcontroller; 的ColdFire微控制器
MCF51EM256CLK
型号： MCF51EM256CLK
厂家： Freescale    Freescale
描述：

ColdFire Microcontroller
的ColdFire微控制器

微控制器
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中文：  中文翻译
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Freescale Semiconductor  
Data Sheet: Advance Information  
Document Number: MCF51EM256  
Rev.2, 4/2010  
MCF51EM256  
80 LQFP  
14 mm × 14 mm  
917A-03  
100 LQFP  
14 mm × 14 mm  
983-02  
MCF51EM256 Series  
ColdFire Microcontroller  
Covers: MCF51EM256  
MCF51EM128  
The MCF51EM256/128 series microcontrollers are  
a member of the ColdFire family of reduced  
•
Three serial communications interface  
modules (SCI)  
®
instruction set computing (RISC) microprocessors.  
•
•
•
Three serial peripheral interfaces  
Inter-integrated circuit (IIC)  
Two 8-bit and one 16-bit modulo timers  
(MTIM)  
This document provides an overview of these  
32-bit microcontrollers, focusing on their highly  
integrated and diverse feature set.  
•
Two-channel timer/PWM module (TPM)  
These microcontrollers are systems-on-chips  
(SoCs) that are based on the V1 ColdFire core and  
the following features:  
•
Operating at processor core speeds up to  
50.33 MHz (peripherals operate at half of  
this speed) at 3.6 V to 2.5 V and 20 MHz at  
2.5 V to 1.8 V  
•
•
•
Up to 256 KB of flash memory  
Up to 16 KB of RAM  
Less than 1.3 μA of typical power  
consumption in battery mode, with MCU  
supply off  
•
Ultra-low power independent RTC with  
calendar features, separate time base, power  
domain, and 32 bytes of RAM  
•
•
A collection of communications  
peripherals, including UART, IIC and SPI  
Integrated 16-bit SAR analog-to-digital  
converter  
•
•
Programmable delay block (PDB)  
Two analog comparators with selectable  
interrupt (PRACMP)  
•
LCD driver  
This document contains information on a product under development. Freescale reserves the  
right to change or discontinue this product without notice.  
© Freescale Semiconductor, Inc., 2008-2010. All rights reserved.  
Preliminary—Subject to Change Without Notice  
Table of Contents  
1
MCF51EM256 Series Configurations . . . . . . . . . . . . . . . . . . . .3  
2.9 External Oscillator (XOSC) Characteristics. . . . . . . . . 34  
2.10 Internal Clock Source (ICS) Characteristics . . . . . . . . 35  
2.11 LCD Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . 37  
2.12 AC Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . 37  
2.12.1 Control Timing . . . . . . . . . . . . . . . . . . . . . . . . . 38  
2.12.2 Timer (TPM/FTM) Module Timing . . . . . . . . . . 39  
2.13 VREF Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . 40  
2.14 SPI Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . 40  
2.15 Flash Specifications. . . . . . . . . . . . . . . . . . . . . . . . . . . 43  
2.16 EMC Performance . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44  
2.16.1 Radiated Emissions . . . . . . . . . . . . . . . . . . . . . 44  
Mechanical Outline Drawings . . . . . . . . . . . . . . . . . . . . . . . . 45  
3.1 80-pin LQFP Package . . . . . . . . . . . . . . . . . . . . . . . . . 45  
3.2 100-pin LQFP Package . . . . . . . . . . . . . . . . . . . . . . . . 49  
Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53  
1.1 Device Comparison. . . . . . . . . . . . . . . . . . . . . . . . . . . . .3  
1.2 Block Diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4  
1.3 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6  
1.3.1 Feature List . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7  
1.4 Part Numbers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9  
1.5 Pinouts and Packaging . . . . . . . . . . . . . . . . . . . . . . . . .11  
1.5.1 Pinout: 80-Pin LQFP . . . . . . . . . . . . . . . . . . . . .11  
1.5.2 Pinout: 100-Pin LQFP . . . . . . . . . . . . . . . . . . . .12  
Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . .16  
2.1 Parameter Classification . . . . . . . . . . . . . . . . . . . . . . . .16  
2.2 Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . .17  
2.3 Thermal Characteristics . . . . . . . . . . . . . . . . . . . . . . . .18  
2.4 Electrostatic Discharge (ESD) Protection Characteristics  
19  
2
3
4
2.5 DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . .20  
2.6 Supply Current Characteristics . . . . . . . . . . . . . . . . . . .24  
2.7 Analog Comparator (PRACMP) Electricals. . . . . . . . . .27  
2.8 ADC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . .27  
MCF51EM256 Series ColdFire Microcontroller Data Sheet, Rev.2  
Preliminary—Subject to Change Without Notice  
2
Freescale Semiconductor  
MCF51EM256 Series Configurations  
1
MCF51EM256 Series Configurations  
1.1  
Device Comparison  
The MCF51EM256 series is summarized in Table 1.  
Table 1. MCF51EM256 Series Features by MCU and Package  
Feature  
MCF51EM256  
MCF51EM128  
Flash size (bytes)  
RAM size (bytes)  
262144  
16384  
131072  
8192  
Robust flash update  
supported  
Yes  
5
Pin quantity  
PRACMP1 inputs  
PRACMP2 inputs  
ADC modules  
100  
5
80  
3
100  
80  
3
5
4
4
ADC differential  
channels1  
4
2
4
2
ADC single-ended  
channels  
16  
12  
16  
12  
DBG  
ICS  
Yes  
Yes  
Yes  
Yes  
Yes  
Yes  
IIC  
IRQ  
IRTC  
VREF  
LCD drivers  
Rapid GPIO2  
Port I/O3  
44  
16  
47  
37  
16  
40  
44  
16  
47  
37  
16  
40  
Keyboard interface 1  
Keyboard interface 2  
SCI1  
8
8
Yes  
Yes  
Yes  
Yes  
Yes  
SCI2  
SCI3  
SPI1 (FIFO)  
SPI2 (standard)  
SPI3 (standard)  
Yes  
No  
Yes  
No  
MCF51EM256 Series ColdFire Microcontroller Data Sheet, Rev.2  
Preliminary—Subject to Change Without Notice  
Freescale Semiconductor  
3
MCF51EM256 Series Configurations  
Table 1. MCF51EM256 Series Features by MCU and Package (continued)  
Feature MCF51EM256 MCF51EM128  
MTIM1 (8-bit)  
MTIM2 (8-bit)  
MTIM3 (16-it)  
TPM channels  
PDB  
Yes  
Yes  
Yes  
2
Yes  
Yes  
Yes  
XOSC14  
XOSC25  
1
2
3
4
5
Each differential channel is comprised of 2 pin inputs  
RGPIO is muxed with standard Port I/O  
Port I/O count does not include the ouput only PTC2/BKGD/MS.  
IRTC crystal input and possible crystal input to the ICS module  
Main external crystal input for the ICS module  
1.2  
Block Diagram  
Figure 1 shows the connections between the MCF51EM256 series pins and modules.  
MCF51EM256 Series ColdFire Microcontroller Data Sheet, Rev.2  
4
Preliminary—Subject to Change Without Notice  
Freescale Semiconductor  
MCF51EM256 Series Configurations  
V
V
DDA/VSSA  
trig[D]  
sel[D][1:0]  
PDB  
sel[D:A][1:0]  
REFH/VREFL  
trig[D:A]  
Port F:  
AD[7], AD[19:17]  
AD[20]  
Port F:  
EXTRIG  
PTA7/RGPIO7/TPMCLK/PRACMP1P2/AD13  
PTA6/RGPIO6/TPMCH1/AD12  
DADP/M[3]  
ADC 4  
PTA5/RGPIO5/TPMCH0/AD11  
PTA4/RGPIO4/SS1  
PTA3/RGPIO3/SCLK1  
PTA2/RGPIO2/MISO1/AD10  
trig[C]  
sel[C][1:0]  
COUT1  
PRACMP1*  
VDDA/VSSA  
V
REFH/VREFL  
Port E, A:  
AD[4], AD[13,9:8]  
DADP/M[0]  
PTA1/RGPIO1/MOSI1  
AD[20]  
PTA0/RGPIO0/IRQ/CLKOUT  
PRACMP2  
PTB7/RGPIO15/KBI1P5/TMRCLK2/AD15  
PTB6/RGPIO14/KBI1P4/TMRCLK1/AD14  
PTB5/RGPIO13/SDA/PRACMP2P3  
PTB4/RGPIO12/SCL/PRACMP2P2  
PTB3/RGPIO11/KBI1P3/PRACMP2P1/TX1  
PTB2/RGPIO10/KBI1P2/PRACMP1P0/RX1  
PTB1/RGPIO9/KBI1P1/SS3/TX2  
PTB0/RGPIO8/KBI1P0/PRACMP2P0/RX2  
ADC 3  
COUT1  
trig[B]  
sel[B][1:0]  
V
DDA/VSSA  
Port B:  
RX1  
TX1  
V
DDA/VSSA  
V
REFH/VREFL  
SCI1  
VREFH/VREFL  
Port F, B:  
AD[6], AD[19:14]  
DADP/M[2]  
AD[20]  
Port B, E:  
ADC 2  
PTC7/LCD4  
PTC6/LCD3/PRACMP2P4  
PTC5/LCD2/PRACMP1P4  
RX2  
TX2  
SCI2  
trig[A]  
sel[A][1:0]  
PTC4/LCD1/PRACMP2O  
PTC3/LCD0/PRACMP1O  
BKGD/MS/PTC2  
PTC1/KBI1P7/XTAL2/TX3  
PTC0/KBI1P6/EXTAL2/RX3  
PTD7/LCD34/KBI2P7  
PTD6/LCD33/KBI2P6  
PTD5/LCD32/KBI2P5/TMRCLK2  
PTD4/LCD31/KBI2P4/TMRCLK1  
PTD3/LCD30/KBI2P3  
PTD2/LCD29/KBI2P2  
PTD1/LCD28/KBI2P1  
V
V
DDA/VSSA  
Port C,F:  
RX3  
REFH/VREFL  
Port A:  
AD[5], AD[13:10]  
SCI3  
IIC  
TX3  
AD[20]  
DADP/M[1]  
ADC 1  
Port B:  
SDA  
SCL  
VREFO  
VREF  
Port B/C & D:  
KBI 1 & 2 KBI1P[7:0]  
KBI2P[7:0]  
PTD0/LCD27/KBI2P0  
Port A:  
TPMCH[1:0]  
TPMCLK  
Hardware CRC  
2 Channel TPM  
16-Bit MTIM3  
RGPIO  
PTE7/LCD5  
PTE6/SS3/TX2  
PTE5/SCLK3  
PTE4/MISO3/MOSI3  
PTE3/MOSI3/MISO3  
PTE2/PRACMP1P1  
PTE1/PRACMP1P3/AD9  
PTE0/PRACMP1O/AD8  
Port B, D:  
TMRCLK[n]  
8-Bit MTIM1  
8-Bit MTIM2  
Port B, D:  
TMRCLK[n]  
DBG  
Port B, D:  
TMRCLK[n]  
BDM  
Port C:  
BKGD/MS/PTC2  
INTC  
Port B:  
RGPIO[15:8]  
BKGD/MS  
PTF7/LCD43/AD19  
PTF6/LCD42/AD18  
PTF5/LCD41/AD17  
PTF4/LCD40/AD16  
PTF3/LCD39/TX3  
PTF2/LCD38/RX3  
PTF1/LCD37/EXTRIG  
PTF0/LCD36  
Port A:  
RGPIO[7:0]  
Internal Clock Source  
REF CLK IRCLK  
V1 ColdFire Core  
with MAC  
Port A:  
MOSI1 SS1  
MISO1 SPSCK1  
SPI1  
Clock Check  
& Select  
LCD[9:6]:  
MOSI2 SS2  
MISO2 SPSCK2  
Port C:  
EXTAL2  
XTAL2  
DADP/M[3,0]  
AD[7,4]  
XOSC2  
SPI2  
SPI3  
RESET  
SIM  
PTA0/RPGPIO0/  
IRQ/CLKOUT  
Port A0 or LCD25  
CLKO  
DADP/M[2:1]  
AD[6:5]  
Port E, B:  
MOSI3 SS3  
MISO3 SPSCK3  
COP  
LVD  
IRQ  
XOSC1  
EXTAL1  
XTAL1  
FLASH1  
128/64 KB  
LCD  
Robust  
Port A0 or LCD25  
Port C,E:  
LCD[5:0]  
Port D:  
LCD[34:27]  
CLKO  
Update  
FLASH2  
128/64 KB  
Manager  
Port F:  
Independent  
RTC  
The IRTC is in a separate  
power domain, as is the  
LCD controller.  
LCD[43:36]  
RAM  
16/8 KB  
SPI2:  
LCD[9:6]  
VREG  
VBAT  
XTAL1  
EXTAL1  
TAMPER  
VDD VSS1 VSS2  
1
Pins with • are not present on 80-pin devices.  
PRACMP1 has two less available inputs on the 80-pin devices.  
2
Figure 1. MCF51EM256 Series Block Diagram  
MCF51EM256 Series ColdFire Microcontroller Data Sheet, Rev.2  
Preliminary—Subject to Change Without Notice  
Freescale Semiconductor  
5
MCF51EM256 Series Configurations  
1.3  
Features  
Table 2 describes the functional units of the MCF51EM256 series.  
Table 2. MCF51EM256 Series Functional Units  
Unit  
Function  
ADC (analog-to-digital converter)  
Measures analog voltages at up to 16 bits of resolution. Each ADC has  
up to four differential and 24 single-ended inputs.  
BDM (background debug module)  
Provides single pin debugging interface (part of the V1 ColdFire core)  
CF1 CORE (V1 ColdFire core) with MAC Executes programs, handles interrupts and containes  
unit  
multiply-accumulate hardware (MAC).  
PRACMP1, PRACMP2 (comparators)  
Analog comparators for comparing external analog signals against  
each other, or a variety of reference levels.  
COP (computer operating poperly)  
IRQ (interrupt request)  
Software watchdog  
Single pin high priority interrupt (part of the V1 ColdFire core)  
High-speed CRC calculation  
CRC (cyclic Redundancy Check)  
DBG (debug)  
Provides debugging and emulation capabilities (part of the V1 ColdFire  
core)  
FLASH (flash memory)  
IIC (inter-integrated circuits)  
INTC (interrupt controller)  
KBI1 & KBI2  
Provides storage for program code, constants and variables  
Supports standard IIC communications protocol and SMBus  
Controls and prioritizes all device interrupts  
Keyboard Interfaces 1 and 2  
LCD  
Liquid crystal display driver  
LVD (low voltage detect)  
Provides an interrupt to the CF1CORE in the event that the supply  
voltage drops below a critical value. The LVD can also be programmed  
to reset the device upon a low voltage event  
ICS (internal clock source)  
Provides clocking options for the device, including a three  
frequency-locked loops (FLLs) for multiplying slower reference clock  
sources  
IRTC (independent real-time clock)  
The independent real time clock provides an independent time-base  
with optional interrupt, battery backup and tamper protection  
VREF (voltage reference)  
The voltage reference output is available for both on and off-chip use  
MTIM1, MTIM2 (modulo timers)  
8-bit modulo timers with configurable clock inputs and interrupt  
generation on overflow  
MTIM3 (modulo timer)  
16-bit modulo timer with configurable clock inputs and interrupt  
generation on overflow  
PDB (programmable delay block)  
RAM (random-access memory)  
This timer is optimized for scheduling ADC conversions  
Provides stack and variable storage  
RGPIO (rapid general-purpose  
input/output)  
Allows for I/O port access at CPU clock speeds and is used to  
implement GPIO functionality for PTA and PTB.  
MCF51EM256 Series ColdFire Microcontroller Data Sheet, Rev.2  
Preliminary—Subject to Change Without Notice  
6
Freescale Semiconductor  
MCF51EM256 Series Configurations  
Table 2. MCF51EM256 Series Functional Units (continued)  
Unit Function  
SCI1, SCI2, SCI3(serial communications Serial communications UARTs capable of supporting RS-232 and LIN  
interfaces)  
protocols  
SIM (system integration unit)  
SPI1 (FIFO), SPI2, SPI3 (serial peripheral SPI1 has full-complementary drive outputs. SPI2 may be configured  
interfaces)  
with full-complementary drive output via LCD control registers. SPI3  
has open drain outputs on SCLK and (MISO or MOSI). These coupled  
with off-chip pull-up resistors, allow interface to an external 5 V SPI.  
TPM (Timer/PWM Module)  
VREG (voltage regulator)  
Timer/PWM module can be used for a variety of generic timer  
operations as well as pulse-width modulation  
Controls power management across the device  
XOSC1 and XOSC2 (crystal oscillators) These devices incorporate redundant crystal oscillators in separate  
power domains.One is intended primarily for use by the IRTC, and the  
other by the CPU and other peripherals.  
1.3.1  
Feature List  
•
•
•
32-bit ColdFire V1 central processor unit (CPU)  
— Up to 50.33 MHz ColdFire CPU from 3.6 V to 2.5 V and 20 MHz CPU at 2.5 V to 1.8 V across  
temperature range of –40 °C to 85 °C  
— ColdFire instruction set revision C (ISA_C) plus MAC  
— 32-bit multiply and accumulate (MAC) optimized for 16×16±32 operations; supports signed or  
unsigned integer or signed fractional inputs  
On-chip memory  
— MCF51EM256/128 series support two independent flash arrays; read/program/erase over full  
operating voltage and temperature; allows interrupt processing while programming for robust  
program updates  
— Random-access memory (RAM)  
— Security circuitry to prevent unathorized access to RAM and Flash contents  
Power-saving modes  
— Two ultra-low power stop modes  
— New low-power run and low-power wait modes  
— Reduced power wait mode  
— Peripheral clock enable register can disable clocks to unused modules, thereby reducing  
currents  
— Ultra-low power independent real time clock with calendar features (IRTC); runs in all MCU  
modes; external clock source with trim capabilities; independent voltage source runs IRTC  
when MCU is powered-down; tamper detection and indicator; battery monitor output to ADC;  
unaffected by MCU resets  
— Ultra-low power external oscillator that can be used in stop modes to provide accurate clock  
source to IRTC, ICS and LCD  
MCF51EM256 Series ColdFire Microcontroller Data Sheet, Rev.2  
Freescale Semiconductor  
Preliminary—Subject to Change Without Notice  
7
MCF51EM256 Series Configurations  
— 6 μs typical wakeup time from stop3 mode  
•
Clock source options  
— Two independent oscillators (XOSC1 and XOSC2) — loop-control Pierce oscillator;  
32.768 kHz crystal or ceramic resonator. XOSC1 nominally supports the independent real time  
clock, and can be powered by a separate battery backup. XOSC2 is the primary external clock  
source for the ICS  
— Internal clock source (ICS) — internal clock source module containing a  
frequency-locked-loop (FLL) controlled by internal or external reference (XOSC1 or XOSC2);  
precision trimming of internal reference allowing 0.2% resolution and typical 0.5% to –1%  
deviation over temperature and voltage; supporting CPU frequencies from 4 kHz to 50 MHz  
•
System protection  
— Watchdog computer operating properly (COP) reset with option to run from dedicated 1 kHz  
internal clock source or bus clock  
— Low voltage detection with reset or interrupt; selectable trip points; seperate low voltage  
warning with optional interrupt; selectable trip points  
— Illegal opcode and illegal address detection with reset  
— Flash block protection for each array to prevent accidental write/erasure  
— Hardware CRC module to support fast cyclic redundancy checks  
Development support  
— Integrated ColdFire DEBUG_Rev_B+ interface with single wire BDM connection supports  
same electrical interface used by the S08 family debug modules  
— Real-time debug support with six hardware breakpoints (4 PC, 1 address and 1 data)  
— On-chip trace buffer provides programmable start/stop recording conditions  
Peripherals  
•
•
— ADC16 — 4 analog-to-digital converters; the 100 pin version of the device has 1 dedicated  
differential channel and 1 dedicated single-ended channel per ADC, along with 3 muxed  
single-ended channels per ADC. The ADCs have 16-bit resolution, range compare function,  
1.7 mV/°C temperature sensor, internal bandgap reference channel, operate in stop3 and are  
fully functional from 3.6 V to 1.8 V  
— PDB — Programmable delay block with 16-bit counter and modulus and 3-bit prescaler; 8  
trigger outputs for ADC16 modules (2 per ADC); provides periodic coordination of ADC  
sampling sequence with programmable sequence completion interrupt  
— IRTC — Ultra-low power independent real time clock with calendar features (IRTC); runs in  
all MCU modes; external clock source with trim capabilities (XOSC1); independent voltage  
source runs IRTC when MCU is powered-down; tamper detection and indicator; battery  
monitor output to ADC; unaffected by MCU resets  
— PRACMPx — Two analog comparators with selectable interrupt on rising, falling, or either  
edge of comparator output; compare option to programmable internal reference voltage;  
operation in stop3  
— LCD — up to 288 segments (8 × 36); 160 segments (4 × 40); internal charge pump and option  
to provide internal reference voltage that can be trimmed for contrast control; flexible  
MCF51EM256 Series ColdFire Microcontroller Data Sheet, Rev.2  
8
Preliminary—Subject to Change Without Notice  
Freescale Semiconductor  
MCF51EM256 Series Configurations  
front-plane/backplane pin assignments; operation in all low power modes with blink  
functionality  
— SCIx — Three serial communications interface modules with optional 13-bit break; option to  
connect Rx input to PRACMP output on SCI1 and SCI2; high current drive on Tx on SCI1 and  
SCI2; wakeup from stop3 on Rx edge. SCI1 and SCI2 Tx pins can be modulated with timer  
outputs for use with IR interfaces  
— SPIx— Two serial peripheral interfaces (SPI2, SPI3) with full-duplex or single-wire  
bidirectional; double-buffered transmit and receive; master or slave mode; MSB-first or  
LSB-first shifting  
— SPI16— Serial peripheral interface (SPI1) with 32-bit FIFO buffer; 16-bit or 8-bit data  
transfers; full-duplex or single-wire bidirectional; double-buffered transmit and receive; master  
or slave mode; MSB-first or LSB-first shifting  
— IIC — Up to 100 kbps with maximum bus loading; multi-master operation; programmable  
slave address; interrupt driven byte-by-byte data transfer; supports broadcast mode and 10 bit  
addressing  
— MTIMx — Two 8-bit and one 16-bit modulo timers with 4-bit prescaler; overflow interrupt;  
external clock input/pulse accumulator  
— TPM — 2-channel Timer/PWM module; selectable input capture, output compare, or buffered  
edge- or center-aligned PWM on each channel; external clock input/pulse accumulator; can be  
used modulate SCI1 and SCI2 TX pins  
•
•
Input/output  
— up to 16 rapid GPIO and 48 standard GPIOs, including 1 output-only pin and 3 open-drain pins.  
— up to 16 keyboard interrupts with selectable polarity  
— Hysteresis and configurable pullup device on all input pins; configurable slew rate and drive  
strength on all output pins  
Package options  
— 100-pin LQFP, 80-pin LQFP  
1.4  
Part Numbers  
MCF  
EM 256 XX  
C
51  
Status  
Package designator  
Temperature range  
(C= –40°C to 85°C )  
(MCF = Fully Qualified ColdFire)  
(PCF = Product Engineering)  
Core  
Family  
Memory size designator  
MCF51EM256 Series ColdFire Microcontroller Data Sheet, Rev.2  
Preliminary—Subject to Change Without Notice  
Freescale Semiconductor  
9
MCF51EM256 Series Configurations  
Freescale Part Number  
Table 3. Orderable Part Number Summary  
Flash / SRAM (KB)  
Package  
Temperature  
MCF51EM256CLL  
MCF51EM256CLK  
MCF51EM128CLL  
MCF51EM128CLK  
256/16  
256/16  
128/16  
128/16  
100-Pin LQFP  
80-Pin LQFP  
100-Pin LQFP  
80-Pin LQFP  
–40°C to 85°C  
–40°C to 85°C  
–40°C to 85°C  
–40°C to 85°C  
MCF51EM256 Series ColdFire Microcontroller Data Sheet, Rev.2  
Preliminary—Subject to Change Without Notice  
10  
Freescale Semiconductor  
MCF51EM256 Series Configurations  
1.5  
Pinouts and Packaging  
Pinout: 80-Pin LQFP  
1.5.1  
Pins not available on the 80-pin LQFP are automatically disabled for reduced current consumption. No  
user interaction is needed. Software access to the functions on these pins will be ignored  
Figure 2 shows the pinout of the 80-pin LQFP.  
PTD0/LCD27/KBI2P0  
PTD1/LCD28/KBI2P1  
PTD2/LCD29/KBI2P2  
PTD3/LCD30/KBI2P3  
PTD4/LCD31/KBI2P4/TMRCLK1  
PTD5/LCD32/KBI2P5/TMRCLK2  
PTD6/LCD33/KBI2P6  
PTD7/LCD34/KBI2P7  
LCD35/CLKOUT  
1
2
60  
59  
58  
57  
56  
55  
54  
53  
52  
51  
50  
49  
48  
47  
46  
45  
44  
43  
42  
41  
PTE7/LCD5  
PTC7/LCD4  
3
4
PTC6/LCD3/PRACMP2P5  
PTC5/LCD2/PRACMP1P4  
PTC4/LCD1/PRACMP2O  
5
6
PTC3/LCD0/PRACMP1O  
7
8
BKGD/MS/PTC2  
PTC1/KBI1P7/XTAL2/TX3  
PTC0/KBI1P6/EXTAL2/RX3  
RESET  
PTB7/RGPIO15/KBI1P5/TMRCLK2/AD15  
PTB6/RGPIO14/KBI1P4/TMRCLK1/AD14  
PTB5/RGPIO13/SDA/PRACMP2P3  
PTB4/RGPIO12/SCL/PRACMP2P2  
PTB3/RGPIO11/KBI1P3/PRACMP2P1/TX1  
PTB2/RGPIO10/KBI1P2/PRACMP1P0/RX1  
9
PTF0/LCD36  
PTF1/LCD37/EXTRIG  
PTF2/LCD38/RX3  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
80 LQFP  
PTF3/LCD39/TX3  
PTF4/LCD40/AD16  
PTF5/LCD41/AD17  
PTF6/LCD42/AD18  
PTF7/LCD43/AD19  
V
V
SS  
V
DDA  
DD  
V
PTB1/RGPIO9/KBI1P1/SS3/TX2  
PTB0/RGPIO8/KBI1P0/PRACMP2P0/RX2  
REFH  
DADP1  
Figure 2. 80-Pin LQFP Pinout  
MCF51EM256 Series ColdFire Microcontroller Data Sheet, Rev.2  
Preliminary—Subject to Change Without Notice  
Freescale Semiconductor  
11  
MCF51EM256 Series Configurations  
1.5.2  
Pinout: 100-Pin LQFP  
Figure 3 shows the pinout configuration for the 100-pin LQFP. Pins which are blacked out do not have an  
equivalent pin on the 80-pin LQFP package.  
LCD25  
LCD26  
PTE7/LCD5  
1
75  
74  
73  
72  
71  
70  
69  
68  
67  
66  
65  
64  
63  
62  
61  
60  
59  
58  
57  
56  
55  
54  
53  
52  
51  
PTC7/LCD4  
2
3
PTD0/LCD27/KBI2P0  
PTD1/LCD28/KBI2P1  
PTD2/LCD29/KBI2P2  
PTD3/LCD30/KBI2P3  
PTD4/LCD31/KBI2P4/TMRCLK1  
PTD5/LCD32/KBI2P5/TMRCLK2  
PTD6/LCD33/KBI2P6  
PTD7/LCD34/KBI2P7  
LCD35/CLKOUT  
PTC6/LCD3/PRACMP2P4  
PTC5/LCD2/PRACMP1P4  
PTC4/LCD1/PRACMP2O  
PTC3/LCD0/PRACMP1O  
BKGD/MS/PTC2  
4
5
6
7
8
PTC1/KBI1P7/XTAL2/TX3  
PTC0/KBI1P6/EXTAL2/RX3  
9
RESET  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
25  
PTB7/RGPIO15/KBI1P5/TMRCLK2/AD15  
PTB6/RGPIO14/KBI1P4/TMRCLK1/AD14  
PTE6/SS3/TX2  
PTF0/LCD36  
PTF1/LCD37/EXTRIG  
PTF2/LCD38/RX3  
100 LQFP  
PTE5/SCLK3  
PTF3/LCD39/TX3  
PTE4/MISO3/MOSI3  
PTF4/LCD40/AD16  
PTF5/LCD41/AD17  
PTF6/LCD42/AD18  
PTF7/LCD43/AD19  
PTE3/MOSI3/MISO3  
PTB5/RGPIO13/SDA/PRACMP2P3  
PTB4/RGPIO12/SCL/PRACMP2P2  
PTB3/RGPIO11/KBI1P3/PRACMP2P1/TX  
PTB2/RGPIO10/KBI1P2/PRACMP1P0/RX  
V
DDA  
V
REFH  
V
V
SS  
DADP0  
DADM0  
AD4  
DD  
PTB1/RGPIO9/KBI1P1/SS3/TX2  
PTB0/RGPIO8/KBI1P0/PRACMP2P0RX2  
PTE2/PRACMP1P1  
DADP1  
Figure 3. 100-Pin LQFP Pinout  
Table 4 shows the package pin assignments.  
MCF51EM256 Series ColdFire Microcontroller Data Sheet, Rev.2  
Preliminary—Subject to Change Without Notice  
12  
Freescale Semiconductor  
MCF51EM256 Series Configurations  
Table 4. MCF51EM256 Series Package Pin Assignments  
100  
LQFP  
80  
LQFP  
Default Function  
ALT1  
ALT2  
ALT3  
Comment  
1
—
—
1
LCD25  
LCD26  
PTD0  
PTD1  
PTD2  
PTD3  
PTD4  
PTD5  
PTD6  
PTD7  
LCD35  
PTF0  
2
3
LCD27  
LCD28  
LCD29  
LCD30  
LCD31  
LCD32  
LCD33  
LCD34  
CLKOUT  
LCD36  
LCD37  
LCD38  
LCD39  
LCD40  
LCD41  
LCD42  
LCD43  
KBI2P0  
KBI2P1  
KBI2P2  
KBI2P3  
KBI2P4  
KBI2P5  
KBI2P6  
KBI2P7  
4
2
5
3
6
4
7
5
TMRCLK1  
TMRCLK2  
8
6
9
7
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
25  
26  
27  
28  
29  
30  
31  
32  
8
9
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
—
—
—
20  
21  
22  
23  
24  
25  
—
—
PTF1  
EXTRIG  
RX3  
PTF2  
PTF3  
TX3  
PTF4  
AD16  
AD17  
AD18  
AD19  
PTF5  
PTF6  
PTF7  
VDDA  
VREFH  
DADP0  
DADM0  
AD4  
DADP1  
DADM1  
AD5  
DADP2  
DADM2  
AD6  
DADP3  
DADM3  
MCF51EM256 Series ColdFire Microcontroller Data Sheet, Rev.2  
Preliminary—Subject to Change Without Notice  
Freescale Semiconductor  
13  
MCF51EM256 Series Configurations  
Table 4. MCF51EM256 Series Package Pin Assignments (continued)  
100  
LQFP  
80  
LQFP  
Default Function  
ALT1  
ALT2  
ALT3  
Comment  
33  
34  
35  
36  
37  
38  
39  
40  
41  
42  
43  
44  
45  
46  
47  
48  
49  
50  
51  
—
26  
27  
28  
29  
30  
31  
32  
33  
—
—
34  
35  
36  
37  
38  
39  
40  
—
AD7  
VREFO  
VREFL  
VSSA  
EXTAL1  
XTAL1  
VBAT  
TAMPER  
PTA0/RGPIO0  
PTE0  
IRQ  
CLKOUT  
PRACMP1O  
PRACMP1P3  
AD8  
AD9  
PTE1  
PTA1/RGPIO1  
PTA2/RGPIO2  
PTA3/RGPIO3  
PTA4/RGPIO4  
PTA5/RGPIO5  
PTA6/RGPIO6  
PTA7/RGPIO7  
PTE2  
MOSI1  
MISO1  
AD10  
SCLK1  
SS1  
RGPIO_ENB is used to select  
between standard GPIO and  
RGPIO  
TPMCH0  
TPMCH1  
TPMCLK  
AD11  
AD12  
AD13  
PRACMP1P2  
PRACMP1P1  
RGPIO_ENB is used to select  
between standard GPIO and  
RGPIO  
52  
53  
41  
42  
PTB0/RGPIO8  
PTB1/RGPIO9  
KBI1P0  
KBI1P1  
PRACMP2P0  
SS3  
RX2  
TX2  
2X Drive Output  
RGPIO_ENB is used to select  
between standard GPIO and  
RGPIO  
54  
55  
43  
44  
VDD  
VSS  
RGPIO_ENB is used to select  
between standard GPIO and  
RGPIO  
56  
57  
45  
46  
PTB2/RGPIO10  
PTB3/RGPIO11  
KBI1P2  
KBI1P3  
PRACMP1P0  
PRACMP2P1  
RX1  
TX1  
2X drive output RGPIO_ENB is  
used to select between standard  
GPIO and RGPIO  
MCF51EM256 Series ColdFire Microcontroller Data Sheet, Rev.2  
Preliminary—Subject to Change Without Notice  
14  
Freescale Semiconductor  
MCF51EM256 Series Configurations  
Table 4. MCF51EM256 Series Package Pin Assignments (continued)  
100  
LQFP  
80  
LQFP  
Default Function  
ALT1  
ALT2  
ALT3  
Comment  
58  
59  
47  
48  
PTB4/RGPIO12  
PTB5/RGPIO13  
SCL  
SDA  
PRACMP2P2  
PRACMP2P3  
RGPIO_ENB is used to select  
between standard GPIO and  
RGPIO  
60  
61  
62  
63  
64  
—
—
—
—
49  
PTE3  
PTE4  
MOSI3  
MISO3  
SCLK3  
SS3  
MISO3  
MOSI3  
Open Drain  
Open Drain  
Open Drain  
PTE5  
PTE6  
TX2  
PTB6/RGPIO14  
KBI1P4  
TMRCLK1  
AD14  
AD15  
RGPIO_ENB is used to select  
between standard GPIO and  
RGPIO  
65  
50  
PTB7/RGPIO15  
KBI1P5  
TMRCLK2  
This pin is an open drain device  
and has an internal pullup. There is  
66  
51  
RESET  
no clamp diode to VDD  
.
67  
68  
52  
53  
PTC0  
PTC1  
KBI1P6  
KBI1P7  
EXTAL2  
XTAL2  
RX3  
TX3  
This pin has an internal pullup.  
PTC2 can only be programmed as  
an output.  
69  
54  
BKGD/MS  
PTC2  
701  
711  
721  
731  
741  
751  
761  
771  
781  
791  
80  
551  
561  
571  
581  
591  
601  
611  
621  
631  
641  
65  
PTC3  
PTC4  
PTC5  
PTC6  
PTC7  
PTE7  
LCD0  
LCD1  
LCD2  
LCD3  
LCD4  
LCD5  
MOSI2  
MISO2  
SCLK2  
SS2  
PRACMP1O  
PRACMP2O  
PRACMP1P4  
PRACMP2P4  
LCD6  
LCD7  
LCD8  
LCD9  
LCD10  
LCD11  
LCD12  
LCD13  
LCD14  
LCD15  
LCD16  
81  
66  
82  
67  
83  
68  
84  
69  
85  
70  
86  
—
MCF51EM256 Series ColdFire Microcontroller Data Sheet, Rev.2  
Preliminary—Subject to Change Without Notice  
Freescale Semiconductor  
15  
Electrical Characteristics  
Table 4. MCF51EM256 Series Package Pin Assignments (continued)  
100  
LQFP  
80  
LQFP  
Default Function  
ALT1  
ALT2  
ALT3  
Comment  
87  
88  
89  
90  
91  
92  
93  
94  
95  
96  
97  
98  
99  
100  
—
—
—
—
71  
72  
73  
74  
75  
76  
77  
78  
79  
80  
LCD17  
LCD18  
LCD19  
LCD20  
LCD21  
LCD22  
LCD23  
LCD24  
VSS  
VLL3  
VLL2  
VLL1  
VCAP2  
VCAP1  
1
These pins that are shared with the LCD are open-drain by default if not used as LCD pins. To configure this pins as full  
complementary drive outputs, you must have the LCD modules bits configured as follow: FCDEN =1, VSUPPLY = 11 and RVEN  
= 0. The Input levels and internal pullup resistors are referenced to VLL3. Referer to the LCD chapter for further information.  
2
Electrical Characteristics  
This section contains electrical specification tables and reference timing diagrams for the  
MCF51EM256/128 series microcontrollers, including detailed information on power considerations,  
DC/AC electrical characteristics, and AC timing specifications.  
The electrical specifications are preliminary and are from previous designs or design simulations. These  
specifications may not be fully tested or guaranteed at this early stage of the product life cycle. These  
specifications will, however, be met for production silicon. Finalized specifications will be published after  
complete characterization and device qualifications have been completed.  
NOTE  
The parameters specified in this data sheet supersede any values found in  
the module specifications.  
2.1  
Parameter Classification  
The electrical parameters shown in this supplement are guaranteed by various methods. To give the  
customer a better understanding the following classification is used and the parameters are tagged  
accordingly in the tables where appropriate:  
MCF51EM256 Series ColdFire Microcontroller Data Sheet, Rev.2  
16  
Preliminary—Subject to Change Without Notice  
Freescale Semiconductor  
Electrical Characteristics  
Table 5. Parameter Classifications  
Those parameters are guaranteed during production testing on each individual device.  
P
C
Those parameters are achieved by the design characterization by measuring a statistically relevant  
sample size across process variations.  
Those parameters are achieved by design characterization on a small sample size from typical devices  
under typical conditions unless otherwise noted. All values shown in the typical column are within this  
category.  
T
Those parameters are derived mainly from simulations.  
D
NOTE  
The classification is shown in the column labeled “C” in the parameter  
tables where appropriate.  
2.2  
Absolute Maximum Ratings  
Absolute maximum ratings are stress ratings only, and functional operation at the maxima is not  
guaranteed. Stress beyond the limits specified in Table 6 may affect device reliability or cause permanent  
damage to the device. For functional operating conditions, refer to the remaining tables in this section.  
This device contains circuitry protecting against damage due to high static voltage or electrical fields;  
however, it is advised that normal precautions be taken to avoid application of any voltages higher than  
maximum-rated voltages to this high-impedance circuit. Reliability of operation is enhanced if unused  
inputs are tied to an appropriate logic voltage level (for instance, either V or V ).  
SS  
DD  
Table 6. Absolute Maximum Ratings  
Rating Symbol  
Value  
Unit  
Supply voltage  
Input voltage  
V
–0.3 to 4.0  
V
V
DD  
V
–0.3 to VDD + 0.3  
In  
Instantaneous maximum current  
Single pin limit (applies to all port pins except PTB1  
and PTB3)1, 2, 3  
ID  
±25  
mA  
Instantaneous maximum current  
ID  
±50  
mA  
Single pin limit (applies to PTB1 and PTB3)4, 5, 6  
Maximum current into V  
Storage temperature  
IDD  
120  
mA  
DD  
T
–55 to 150  
°C  
stg  
1
Input must be current limited to the value specified. To determine the value of the required  
current-limiting resistor, calculate resistance values for positive (VDD) and negative (VSS) clamp  
voltages, then use the larger of the two resistance values.  
2
All functional non-supply pins are internally clamped to VSS and VDD  
.
MCF51EM256 Series ColdFire Microcontroller Data Sheet, Rev.2  
Preliminary—Subject to Change Without Notice  
Freescale Semiconductor  
17  
Electrical Characteristics  
3
Power supply must maintain regulation within operating VDD range during instantaneous and  
operating maximum current conditions. If positive injection current (VIn > VDD) is greater than  
IDD, the injection current may flow out of VDD and could result in external power supply going  
out of regulation. Ensure external VDD load will shunt current greater than maximum injection  
current. This will be the greatest risk when the MCU is not consuming power. Examples are: if  
no system clock is present, or if the clock rate is very low which would reduce overall power  
consumption.  
4
Input must be current limited to the value specified. To determine the value of the required  
current-limiting resistor, calculate resistance values for positive (VDD) and negative (VSS) clamp  
voltages, then use the larger of the two resistance values.  
5
6
All functional non-supply pins are internally clamped to VSS and VDD  
.
Power supply must maintain regulation within operating VDD range during instantaneous and  
operating maximum current conditions. If positive injection current (VIn > VDD) is greater than  
I
DD, the injection current may flow out of VDD and could result in external power supply going  
out of regulation. Ensure external VDD load will shunt current greater than maximum injection  
current. This will be the greatest risk when the MCU is not consuming power. Examples are: if  
no system clock is present, or if the clock rate is very low which would reduce overall power  
consumption.  
2.3  
Thermal Characteristics  
This section provides information about operating temperature range, power dissipation, and package  
thermal resistance. Power dissipation on I/O pins is usually small compared to the power dissipation in  
on-chip logic and it is user-determined rather than being controlled by the MCU design. In order to take  
P
into account in power calculations, determine the difference between actual pin voltage and V or  
I/O  
SS  
V
and multiply by the pin current for each I/O pin. Except in cases of unusually high pin current (heavy  
DD  
loads), the difference between pin voltage and V or V will be very small.  
SS  
DD  
Table 7. Thermal Characteristics  
Rating  
Symbol  
Value  
Unit  
Operating temperature range (packaged)  
Maximum junction temperature  
Thermal resistance 1,2,3,4  
TA  
–40 to 85  
95  
°C  
°C  
TJM  
100-pin LQFP  
80-pin LQFP  
1s  
2s2p  
54  
42  
θJA  
°C/W  
1s  
2s2p  
55  
42  
1
Junction temperature is a function of die size, on-chip power dissipation, package thermal  
resistance, mounting site (board) temperature, ambient temperature, air flow, power dissipation  
of other components on the board, and board thermal resistance.  
2
3
4
Junction to Ambient Natural Convection  
1s — Single layer board, one signal layer  
2s2p — Four layers board, two signal and two power layers  
The average chip-junction temperature (T ) in °C can be obtained from:  
J
MCF51EM256 Series ColdFire Microcontroller Data Sheet, Rev.2  
18  
Preliminary—Subject to Change Without Notice  
Freescale Semiconductor  
Electrical Characteristics  
T = T + (P × θ )  
JA  
Eqn. 1  
J
A
D
where:  
T = Ambient temperature, °C  
A
θ
= Package thermal resistance, junction-to-ambient, °C/W  
JA  
P = P + P  
D
int  
I/O  
P
P
= I × V , Watts — chip internal power  
DD DD  
= Power dissipation on input and output pins — user determined  
int  
I/O  
For most applications, P << P and can be neglected. An approximate relationship between P and T  
I/O  
int  
D
J
(if P is neglected) is:  
I/O  
P = K ÷ (T + 273°C)  
Eqn. 2  
D
J
Solving Equation 1 and Equation 2 for K gives:  
2
K = P × (T + 273°C) + θ × (P )  
Eqn. 3  
D
A
JA  
D
where K is a constant pertaining to the particular part. K can be determined from Equation 3 by measuring  
P (at equilibrium) for a known T . Using this value of K, the values of P and T can be obtained by  
D
A
D
J
solving Equation 1 and Equation 2 iteratively for any value of T .  
A
2.4  
Electrostatic Discharge (ESD) Protection Characteristics  
Although damage from static discharge is much less common on these devices than on early CMOS  
circuits, normal handling precautions should be used to avoid exposure to static discharge. Qualification  
tests are performed to ensure that these devices can withstand exposure to reasonable levels of static  
without suffering any permanent damage.  
All ESD testing is in conformity with CDF-AEC-Q00 Stress Test Qualification for Automotive Grade  
Integrated Circuits. (http://www.aecouncil.com/) This device was qualified to AEC-Q100 Rev E.  
A device is considered to have failed if, after exposure to ESD pulses, the device no longer meets the  
device specification requirements. Complete dc parametric and functional testing is performed per the  
applicable device specification at room temperature followed by hot temperature, unless specified  
otherwise in the device specification.  
Table 8. ESD and Latch-up Test Conditions  
Model  
Description  
Symbol  
Value  
Unit  
Human Body  
Series Resistance  
R1  
C
1500  
100  
3
Ω
Storage Capacitance  
pF  
Number of Pulse per pin  
Series Resistance  
—
R1  
C
Machine  
Latch-up  
0
Ω
Storage Capacitance  
200  
3
pF  
Number of Pulse per pin  
Minimum input voltage limit  
Maximum input voltage limit  
—
–2.5  
7.5  
V
V
MCF51EM256 Series ColdFire Microcontroller Data Sheet, Rev.2  
Preliminary—Subject to Change Without Notice  
Freescale Semiconductor  
19  
Electrical Characteristics  
Num  
Table 9. ESD and Latch-Up Protection Characteristics  
Rating  
Symbol  
Min  
Max  
Unit  
1
2
3
4
Human Body Model (HBM)  
Machine Model (MM)  
VHBM  
VMM  
VCDM  
ILAT  
2000  
200  
500  
100  
—
—
—
—
V
V
Charge Device Model (CDM)  
V
Latch-up Current at TA = 85 °C  
mA  
2.5  
DC Characteristics  
This section includes information about power supply requirements, I/O pin characteristics, and power  
supply current in various operating modes.  
Table 10. DC Characteristics  
Num  
C
Parameter  
Symbol  
Min  
Typical1  
Max  
Unit  
Digital supply — 50 MHz operation  
Digital supply2 — 20 MHz maximum  
operation  
VDD  
2.5  
—
3.6  
Operating  
voltage  
1
P
V
VDD  
1.8  
—
2.5  
2
3
4
P Analog supply  
D Battery supply  
P Bandgap voltage reference3  
VDDA  
VBAT  
VBG  
1.8  
2.2  
—
3
3.6  
3.3  
V
V
V
1.15  
1.17  
1.18  
PTA[7:0], PTB[7:0], PTC[2:0], PTE[6:0],  
C
P
C
low-drive strength.  
VDD ≥ 1.8 V, ILoad = –0.6 mA  
PTA[7:0], PTB[7:0], PTC[2:0], PTE[6:0],  
high-drive strength.  
VDD ≥ 2.7 V, ILoad = –10 mA  
Output high  
voltage  
5
VOH  
VDD – 0.5  
—
—
V
PTA[7:0], PTB[7:0], PTC[2:0], PTE[6:0],  
high-drive strength.  
VDD ≥ 1.8 V, ILoad = –3 mA  
PTC[7:3], PTD[7:0], PTE7, PTF[7:0],  
LCD35/CLKOUT, MOSI2, MISO2,  
SCK2, SS2, low drive strength.  
VDD ≥ 1.8 V, ILoad = –0.5 mA  
C
P
PTC[7:3], PTD[7:0], PTE7, PTF[7:0],  
LCD35/CLKOUT, MOSI2, MISO2,  
SCK2, SS2, high-drive strength.  
VDD ≥ 2.7 V, ILoad = –3 mA  
Output high  
voltage  
6
7
VOH  
VDD – 0.5  
—
—
—
V
PTC[7:3], PTD[7:0], PTE7, PTF[7:0],  
LCD35/CLKOUT, MOSI2, MISO2,  
SCK2, SS2, high-drive strength.  
VDD ≥ 1.8 V, ILoad = –1 mA  
C
D
Output high  
current  
Max total IOH for all ports  
IOHT  
—
100  
mA  
MCF51EM256 Series ColdFire Microcontroller Data Sheet, Rev.2  
Preliminary—Subject to Change Without Notice  
20  
Freescale Semiconductor  
Electrical Characteristics  
Table 10. DC Characteristics (continued)  
Num  
C
Parameter  
Symbol  
Min  
Typical1  
Max  
Unit  
PTA[7:0], PTB[7:0], PTC[2:0], PTE[6:0],  
low-drive strength.  
C
VDD ≥ 1.8 V, ILoad = 2 mA  
PTA[7:0], PTB[7:0], PTC[2:0], PTE[6:0],  
high-drive strength.  
VDD ≥ 2.7 V, ILoad = 10 mA  
Output low  
voltage  
8
P
C
VOL  
—
—
0.50  
V
PTA[7:0], PTB[7:0], PTC[2:0], PTE[6:0],  
high-drive strength.  
VDD ≥ 1.8 V, ILoad = 3 mA  
PTC[7:3], PTD[7:0], PTE7, PTF[7:0],  
LCD35/CLKOUT, MOSI2, MISO2,  
SCK2, SS2, low drive strength.  
VDD ≥ 1.8 V, ILoad = 0.5 mA  
C
P
PTC[7:3], PTD[7:0], PTE7, PTF[7:0],  
LCD35/CLKOUT, MOSI2, MISO2,  
SCK2, SS2, high-drive strength.  
VDD ≥ 2.7 V, ILoad = 3 mA  
Output low  
voltage  
9
VOL  
—
—
0.50  
V
PTC[7:3], PTD[7:0], PTE7, PTF[7:0],  
LCD35/CLKOUT, MOSI2, MISO2,  
SCK2, SS2, high-drive strength.  
VDD ≥ 1.8 V, ILoad = 1 mA  
C
D
Output low  
current  
10  
11  
Max total IOL for all ports  
IOLT  
—
—
—
100  
—
mA  
V
All digital inputs except tamper_in,  
VDD > 2.7 V  
0.70 × VDD  
Input high  
voltage  
P
P
All digital inputs except tamper_in,  
2.7 V > VDD ≥ 1.8 V  
VIH  
0.85 × VDD  
—
—
—
—
—
Tamper_in  
1.5  
—
All digital inputs except tamper_in,  
VDD > 2.7 V  
0.35 × VDD  
Input low  
voltage  
12  
all digital inputs except tamper_in,  
2.7 V > VDD ≥ 1.8 V  
VIL  
V
—
—
0.3 × VDD  
Tamper_in  
—
0.06 × VDD  
—
—
—
0.5  
—
13 C Input hysteresis; all digital inputs  
14 P Input leakage current; input only pins4  
15 P High Impedance (off-state) leakage current4  
16 P Internal pullup resistors5  
17 P Internal pulldown resistors6  
18 C Input capacitance; all non-supply pins  
19 P POR rearm voltage  
Vhys  
|IIn|  
mV  
μA  
μA  
kΩ  
kΩ  
pF  
V
0.1  
0.1  
—
1
|IOZ  
|
—
1
RPU  
RPD  
CIn  
17.5  
17.5  
—
52.5  
52.5  
8
—
—
VPOR  
tPOR  
0.9  
1.4  
—
2.0  
—
20 D POR rearm time  
10  
μs  
Low-voltage High range — VDD falling  
21 P detection  
2.300  
2.355  
2.410  
VLVDH  
V
High range — VDD rising  
threshold  
2.370  
2.425  
2.480  
MCF51EM256 Series ColdFire Microcontroller Data Sheet, Rev.2  
Preliminary—Subject to Change Without Notice  
Freescale Semiconductor  
21  
Electrical Characteristics  
Table 10. DC Characteristics (continued)  
Num  
C
Parameter  
Symbol  
Min  
Typical1  
Max  
Unit  
Low-voltage Low range — VDD falling  
1.800  
1.845  
1.890  
V
22  
C detection  
threshold  
VLVDL  
Low range — VDD rising  
1.870  
2.590  
2.580  
1.915  
2.655  
2.645  
1.960  
2.720  
2.710  
V
Low-voltage  
P warning  
threshold  
V
DD falling, LVWV = 1  
DD rising, LVWV = 1  
23  
VLVWH  
V
V
V
DD falling, LVWV = 0  
DD rising, LVWV = 0  
2.300  
2.360  
—
2.355  
2.425  
0.6  
2.410  
2.490  
1.0  
Low-voltage  
warning  
24  
25  
C
VLVWL  
VRAM  
V
V
D RAM retention voltage  
V
DC injection current7 8 9 10 (single pin limit),  
VIN > VDD, VIN < VSS  
mA  
–0.2  
–5  
—
—
0.2  
5
26  
D
IIC  
DC injection current (Total MCU limit, includes sum of all  
stressed pins), VIN > VDD, VIN < VSS  
mA  
1
2
3
4
5
6
7
Typical values are based on characterization data at 25 °C unless otherwise stated.  
Switch to lower frequency when the low-voltage interrupt asserts (VLVDH).  
Factory trimmed at VDD = 3.0 V, Temp = 25°C  
Measured with VIn = VDD or VSS  
Measured with VIn = VSS  
Measured with VIn = VDD  
.
.
.
Power supply must maintain regulation within operating VDD range during instantaneous and operating maximum current  
conditions. If positive injection current (VIn > VDD) is greater than IDD, the injection current may flow out of VDD and could result  
in external power supply going out of regulation. Ensure external VDD load will shunt current greater than maximum injection  
current. This will be the greatest risk when the MCU is not consuming power. Examples are: if no system clock is present, or  
if clock rate is very low (which would reduce overall power consumption).  
8
9
All functional non-supply pins are internally clamped to VSS and VDD  
.
Input must be current limited to the value specified. To determine the value of the required current-limiting resistor, calculate  
resistance values for positive and negative clamp voltages, then use the larger of the two values.  
10 The RESET pin does not have a clamp diode to VDD. Do not drive this pin above VDD  
.
PullUp Resistor  
PullDown Resistor  
41.5  
41  
45  
44  
43  
42  
41  
40  
39  
38  
85C  
25C  
-40C  
85C  
25C  
-40C  
40.5  
40  
39.5  
39  
38.5  
38  
37.5  
37  
1.9  
2.2  
2.5  
2.8  
DD(V)  
3.1  
3.4  
1.9  
2.2  
2.5  
2.8  
VDD(V)  
3.1  
3.4  
V
Figure 4. Pullup and Pulldown Typical Resistor Values  
MCF51EM256 Series ColdFire Microcontroller Data Sheet, Rev.2  
Preliminary—Subject to Change Without Notice  
22  
Freescale Semiconductor  
Electrical Characteristics  
Typical VOL vs VDD (IOL = 2mA)  
VOL vs IOL (Low Drive)  
1.60  
1.40  
1.20  
1.00  
0.80  
0.60  
0.40  
0.20  
0.00  
0.39  
0.34  
0.29  
0.24  
0.19  
0.14  
85C  
25C  
-40C  
85C  
25C  
-40C  
0
1
3
5
7
9
11  
13  
15  
17  
19  
1.8  
2
2.2  
2.4  
2.6  
2.8  
3
3.2  
3.4  
3.6  
IOL(mA)  
VDD(V)  
Figure 5. Typical Low-Side Driver (Sink) Characteristics — Low Drive (PTxDSn = 0)  
Typical VOL vs VDD  
VOL vs IOL (High Drive)  
0.8  
0.7  
1.00  
85oC  
25oC  
0.90  
0.80  
0.70  
0.60  
0.50  
0.40  
0.30  
0.20  
0.10  
0.00  
0.6  
-40oC  
85C  
0.5  
25C  
-40C  
0.4  
IOL = 10mA  
0.3  
0.2  
0.1  
0.0  
I
OL = 6mA  
IOL = 3mA  
3.4 3.6  
0
1
3
5
7
9
11  
13  
15  
17  
19  
1.8  
2
2.2  
2.4  
2.6  
2.8  
3
3.2  
IOL(mA)  
VDD(V)  
Figure 6. Typical Low-Side Driver (Sink) Characteristics — High Drive (PTxDSn = 1)  
Typical VDD - VOH vs VDD (IOH = -2mA)  
VOH vs IOH (Low Drive)  
0.84  
1.80  
1.60  
1.40  
1.20  
1.00  
0.80  
0.60  
0.40  
0.20  
0.00  
85C  
25C  
-40C  
0.74  
0.64  
85C  
25C  
0.54  
0.44  
0.34  
0.24  
0.14  
-40C  
1.8  
2
2.2  
2.4  
2.6  
2.8  
3
3.2  
3.4  
3.6  
0
-2  
-4  
-6  
-8  
-10  
IOH(mA)  
-12  
-14  
-16  
-18  
-20  
VDD(V)  
Figure 7. Typical High-Side (Source) Characteristics — Low Drive (PTxDSn = 0)  
MCF51EM256 Series ColdFire Microcontroller Data Sheet, Rev.2  
Freescale Semiconductor  
Preliminary—Subject to Change Without Notice  
23  
Electrical Characteristics  
Typical VDD - VOH vs VDD  
VOH vs IOH (High Drive)  
1.0  
0.9  
0.8  
0.7  
0.6  
0.5  
0.4  
0.3  
0.2  
0.1  
0.0  
1.40  
1.20  
1.00  
0.80  
0.60  
0.40  
0.20  
0.00  
85oC  
25oC  
-40oC  
Hot  
Room  
Cold  
IOH = -10mA  
IOH = -6mA  
IOH = -3mA  
0
-2  
-4  
-6  
-8  
-10  
IOH(mA)  
-12  
-14  
-16  
-18  
-20  
1.8  
2
2.2  
2.4  
2.6  
2.8  
3
3.2  
3.4  
3.6  
VDD(V)  
Figure 8. Typical High-Side (Source) Characteristics — High Drive (PTxDSn = 1)  
2.6  
Supply Current Characteristics  
90  
80  
FEI Off - Hot  
FEI Off - Cold  
FEI On - Room  
FEI Off - Room  
FEI On - Hot  
FEI On - Cold  
70  
60  
50  
40  
30  
FEI On  
FEI Off  
1.8  
2.1  
2.4  
2.7  
3.0  
3.3  
3.6  
VDD (V)  
Figure 9. Typical Run I for FBE and FEI, I vs. V  
DD  
DD  
DD  
(All Modules Enabled)  
MCF51EM256 Series ColdFire Microcontroller Data Sheet, Rev.2  
Preliminary—Subject to Change Without Notice  
24  
Freescale Semiconductor  
Electrical Characteristics  
Table 11. Supply Current Characteristics  
Temp  
(°C)  
Num  
C
Parameter  
Symbol  
VDD (V)  
Typical1  
Max2  
Unit  
P
T
T
T
C
T
T
T
T
25.165 MHz  
20 MHz  
66.2  
55.3  
23.9  
4.56  
55.1  
46.6  
19.9  
3.92  
239  
82  
—
—
—
56  
—
—
—
—
Run supply current  
FEI mode, all  
modules on  
–40 to  
85°C  
1
RIDD  
3
mA  
8 MHz  
1 MHz  
25.165 MHz  
20 MHz  
Run supply current  
FEI mode, all  
modules off  
–40 to  
85°C  
2
RIDD  
3
mA  
8 MHz  
1 MHz  
16 kHz FBILP  
Run supply current  
LPS=0, all modules  
off  
–40 to  
85°C  
3
4
RIDD  
3
3
μA  
μA  
16 kHz  
FBELP  
T
249  
—
Run supply current  
LPS = 1, all  
modules off,  
16 kHz  
FBELP  
–40 to  
85°C  
T
RIDD  
50  
—
running from flash  
C
T
T
T
25.165 MHz  
20 MHz  
8 MHz  
1
51.1  
42.6  
18.8  
3.69  
69  
—
—
—
Wait mode supply  
current  
FEI mode, all  
modules off  
–40 to  
85°C  
5
6
WIDD  
3
3
mA  
Wait mode supply current  
LPRS = 1, all mods off  
–40 to  
85°C  
T
WIDD  
S2IDD  
1
—
μA  
μA  
P
C
P
C
3
2
3
2
27  
16  
42  
27  
–40 to  
85°C  
7
8
Stop2 mode supply current  
Stop3 mode supply current  
0.576  
–40 to  
85°C  
S3IDD  
1.05  
μA  
μA  
LVD adder to stop3, stop2 (LVDE =  
LVDSE = 1)  
–40 to  
85°C  
9
T
S3IDDLVD  
3
120  
90  
—
Low power  
mode  
Voltage reference  
adder to stop3  
–40 to  
85°C  
10  
T
S3IDDLVD  
3
—
μA  
Tight  
regulation  
mode  
270  
PRG disabled  
PRG enabled  
13  
29  
PRACMP adder to  
stop3  
–40 to  
85°C  
11  
T
S3IDDLVD  
3
—
—
μA  
–40 to  
85°C  
12  
13  
14  
T
C
P
LCD adder to stop3, stop2  
S3IDDLVD  
S3IDDOSC  
IDD-BAT  
3
3
TBD  
5
μA  
μA  
μA  
Adder to stop3 for oscillator enabled3  
(ERCLKEN =1 and EREFSTEN = 1)  
–40 to  
85°C  
–40 to  
85°C  
IRTC supply current4,5,6  
1.5  
5
MCF51EM256 Series ColdFire Microcontroller Data Sheet, Rev.2  
Preliminary—Subject to Change Without Notice  
Freescale Semiconductor  
25  
Electrical Characteristics  
1
Typicals are measured at 25 °C.  
Values given here are preliminary estimates prior to completing characterization.  
2
3
Values given under the following conditions: low range operation (RANGE = 0), low power mode (HGO = 0).  
4
This is the current consumed when the IRTC is being powered by the VBAT  
.
5
The IRTC power source depends on the MCU configuration and VDD voltage level. Refer to reference manual for further  
information.  
6
The IRTC current consumption includes the IRTC XOSC1.  
MCF51EM256 Series ColdFire Microcontroller Data Sheet, Rev.2  
26  
Preliminary—Subject to Change Without Notice  
Freescale Semiconductor  
Electrical Characteristics  
2.7  
Analog Comparator (PRACMP) Electricals  
Table 12. PRACMP Electrical Specifications  
N
C
Characteristic  
Supply voltage  
Symbol  
Min  
Typical  
Max  
Unit  
1
2
3
—
C
VPWR  
1.8  
—
—
—
—
3.6  
60  
40  
V
Supply current (active) (PRG enabled)  
Supply current (active) (PRG disabled)  
IDDACT1  
IDDACT2  
μA  
μA  
C
—
Supply current (ACMP and PRG all  
disabled)  
4
D
IDDDIS  
—
—
2
nA  
5
6
—
T
Analog input voltage  
VAIN  
VAIO  
VSS – 0.3  
—
5
VDD  
40  
V
mV  
mV  
nA  
μs  
V
Analog input offset voltage  
—
3.0  
—
7
T
Analog comparator hysteresis  
Analog input leakage current  
VH  
—
20.0  
1
8
D
T
IALKG  
tAINIT  
—
9
Analog comparator initialization delay  
Programmable reference generator input1  
Programmable reference generator input2  
—
—
1.0  
—
10  
11  
—
T
VIn1(VDD  
)
—
VDD  
—
V
In2(VDD25  
)
1.8  
2.75  
V
Programmable reference generator setup  
delay  
12  
13  
14  
D
D
P
tPRGST  
—
1
0
—
0.25  
Vin  
μs  
LSB  
V
Programmable reference generator step  
size  
Vstep  
–0.25  
VIn/32  
Programmable reference generator voltage  
range  
Vprgout  
—
2.8  
ADC Characteristics  
These specs all assume seperate V  
supply for ADC and isolated pad segment for ADC supplies and  
DDAD  
differential inputs. Spec’s should be de-rated for V  
= V condition.  
REFH  
bg  
Table 13. 16-bit ADC Operating Conditions  
Charact  
eristic  
Num  
Conditions  
Symb  
Min  
Typ1  
Max  
Unit  
Comment  
1
2
Absolute  
Delta to VDD (VDD–VDDA  
VDDA  
1.8  
—
0
3.6  
V
Supply  
voltage  
2
)
ΔVDDA  
–100  
100  
mV  
Ground  
voltage  
2
3
4
Delta to VSS (VSS–VSSA  
)
ΔVSSA  
–100  
1.15  
0
100  
mV  
V
Ref  
Voltage  
High  
VREFH  
VDDA  
VDDA  
MCF51EM256 Series ColdFire Microcontroller Data Sheet, Rev.2  
Preliminary—Subject to Change Without Notice  
Freescale Semiconductor  
27  
Electrical Characteristics  
Table 13. 16-bit ADC Operating Conditions  
Charact  
Num  
Conditions  
Symb  
Min  
Typ1  
Max  
Unit  
Comment  
eristic  
Ref  
5
6
7
Voltage  
Low  
VREFL  
VADIN  
CADIN  
VSSA  
VREFL  
—
VSSA  
VSSA  
V
V
Input  
Voltage  
—
VREFH  
Input  
Capacit  
ance  
16-bit modes  
8/10/12-bit modes  
8
4
10  
5
pF  
Input  
Resista  
nce  
8
9
RADIN  
—
2
5
kΩ  
16 bit modes  
fADCK > 8MHz  
4MHz < fADCK < 8MHz  
fADCK < 4MHz  
—
—
—
—
—
—
0.5  
1
2
13/12 bit modes  
fADCK > 8MHz  
—
—
—
—
—
—
1
2
5
10  
Analog  
Source  
Resista  
nce  
External to MCU  
4MHz < fADCK < 8MHz  
fADCK < 4MHz  
RAS  
kΩ  
Assumes  
ADLSMP=0  
11/10 bit modes  
fADCK > 8MHz  
—
—
—
—
—
—
2
5
10  
11  
12  
4MHz < fADCK < 8MHz  
fADCK < 4MHz  
9/8 bit modes  
f
ADCK > 8MHz  
—
—
—
—
5
10  
fADCK < 8MHz  
13  
14  
15  
ADLPC = 0, ADHSC = 1  
1.0  
1.0  
1.0  
—
—
—
8
5
ADC  
Convers  
ion  
Clock  
Freq.  
ADLPC = 0, ADHSC = 0  
ADLPC = 1, ADHSC = 0  
fADCK  
MHz  
2.5  
1
2
Typical values assume VDDA = 3.0 V, Temp = 25 °C, fADCK = 1.0 MHz unless otherwise stated. Typical values are for reference  
only and are not tested in production.  
DC potential difference.  
MCF51EM256 Series ColdFire Microcontroller Data Sheet, Rev.2  
28  
Preliminary—Subject to Change Without Notice  
Freescale Semiconductor  
Electrical Characteristics  
SIMPLIFIED  
INPUT PIN EQUIVALENT  
CIRCUIT  
ZADIN  
SIMPLIFIED  
CHANNEL SELECT  
CIRCUIT  
Pad  
ZAS  
leakage  
due to  
input  
ADC SAR  
ENGINE  
RAS  
RADIN  
protection  
+
VADIN  
–
CAS  
VAS  
+
–
RADIN  
RADIN  
RADIN  
INPUT PIN  
INPUT PIN  
INPUT PIN  
For Differential Mode, this figure  
applies to both inputs  
CADIN  
Figure 10. ADC Input Impedance Equivalency Diagram  
Table 14. 16-bit ADC Characteristics full operating range(V  
= V  
> 1.8, V  
= V  
, F  
< 8MHz)  
REFH  
Min  
DDAD  
REFL  
SSAD ADCK  
Characteristic  
Conditions1  
C
Symb  
Typ2  
Max  
Unit  
Comment  
Supply Current ADLPC = 1, ADHSC = 0  
ADLPC = 0, ADHSC = 0  
—
—
—
—
—
—
—
215  
470  
610  
0.01  
2.4  
—
—
—
—
—
—
—
ADLSMP = 0  
ADCO = 1  
T
IDDA  
μA  
μA  
ADLPC=0, ADHSC=1  
Supply Current Stop, Reset, Module Off  
C
IDDA  
ADC  
Asynchronous  
Clock Source  
ADLPC = 1, ADHSC = 0  
ADLPC = 0, ADHSC = 0  
ADLPC = 0, ADHSC = 1  
5.2  
P
fADACK  
MHz  
tADACK  
=
1/fADACK  
6.2  
Sample Time  
See reference manual for sample times  
See reference manual for conversion times  
Conversion  
Time  
MCF51EM256 Series ColdFire Microcontroller Data Sheet, Rev.2  
Preliminary—Subject to Change Without Notice  
Freescale Semiconductor  
29  
Electrical Characteristics  
Table 14. 16-bit ADC Characteristics full operating range(V  
= V  
> 1.8, V  
= V  
, F  
< 8MHz)  
REFH  
Min  
DDAD  
REFL  
SSAD ADCK  
Characteristic  
Conditions1  
C
Symb  
Typ2  
Max  
Unit  
Comment  
Total  
Unadjusted  
Error  
16-bit differential mode  
16-bit single-ended mode  
T
TUE  
—
—
±16  
±20  
+48/-40  
+56/-28  
LSB3  
32x  
Hardware  
Averaging  
(AVGE = %1  
AVGS = %11)  
13-bit differential mode  
12-bit single-ended mode  
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
—
—
±1.5  
±1.75  
±3.0  
±3.5  
11-bit differential mode  
10-bit single-ended mode  
—
—
±0.7  
±0.8  
±1.5  
±1.5  
9-bit differential mode  
8-bit single-ended mode  
—
—
±0.5  
±0.5  
±1.0  
±1.0  
Differential  
Non-Linearity  
16-bit differential mode  
16-bit single-ended mode  
DNL  
—
—
±2.5  
±2.5  
+5/-3  
+5/-3  
LSB2  
LSB2  
LSB2  
13-bit differential mode  
12-bit single-ended mode  
—
—
±0.7  
±0.7  
±1  
±1  
11-bit differential mode  
10-bit single-ended mode  
—
—
±0.5  
±0.5  
±0.75  
±0.75  
9-bit differential mode  
8-bit single-ended mode  
—
—
±0.2  
±0.2  
±0.5  
±0.5  
Integral  
Non-Linearity  
16-bit differential mode  
16-bit single-ended mode  
INL  
—
—
±6.0  
±10.0  
±16.0  
±20.0  
13-bit differential mode  
12-bit single-ended mode  
—
—
±1.0  
±1.0  
±2.5  
±2.5  
11-bit differential mode  
10-bit single-ended mode  
—
—
±0.5  
±0.5  
±1.0  
±1.0  
9-bit differential mode  
8-bit single-ended mode  
—
—
±0.3  
±0.3  
±0.5  
±0.5  
Zero-Scale  
Error  
16-bit differential mode  
16-bit single-ended mode  
EZS  
—
—
±4.0  
±4.0  
+32/-24  
+24/-16  
VADIN = VSSAD  
13-bit differential mode  
12-bit single-ended mode  
—
—
±0.7  
±0.7  
±2.5  
±2.0  
11-bit differential mode  
10-bit single-ended mode  
—
—
±0.4  
±0.4  
±1.0  
±1.0  
9-bit differential mode  
8-bit single-ended mode  
—
—
±0.2  
±0.2  
±0.5  
±0.5  
MCF51EM256 Series ColdFire Microcontroller Data Sheet, Rev.2  
Preliminary—Subject to Change Without Notice  
30  
Freescale Semiconductor  
Electrical Characteristics  
= V , F < 8MHz)  
Table 14. 16-bit ADC Characteristics full operating range(V  
= V  
> 1.8, V  
REFL  
REFH  
Min  
DDAD  
SSAD ADCK  
Characteristic  
Conditions1  
C
Symb  
Typ2  
Max  
Unit  
Comment  
VADIN = VDDAD  
Full-Scale  
Error  
16-bit differential mode  
16-bit single-ended mode  
T
EFS  
—
—
+10/0  
+14/0  
+42/-2  
+46/-2  
LSB2  
13-bit differential mode  
12-bit single-ended mode  
T
T
T
D
—
—
±1.0  
±1.0  
±3.5  
±3.5  
11-bit differential mode  
10-bit single-ended mode  
—
—
±0.4  
±0.4  
±1.5  
±1.5  
9-bit differential mode  
8-bit single-ended mode  
—
—
±0.2  
±0.2  
±0.5  
±0.5  
Quantization  
Error  
16 bit modes  
EQ  
—
—
-1 to 0  
—
—
LSB2  
Bits  
<13 bit modes  
±0.5  
Effective  
Number of Bits  
16 bit differential mode  
Avg=32  
Avg=16  
Avg=8  
Avg=4  
C
ENOB  
Fin  
=
12.8  
12.7  
12.6  
12.5  
11.9  
14.2  
13.8  
13.6  
13.3  
12.5  
—
—
—
—
—
Fsample/100  
Avg=1  
16 bit single-ended mode  
D
Avg=32  
Avg=16  
Avg=8  
Avg=4  
Avg=1  
—
—
—
—
—
13.2  
12.8  
12.6  
12.3  
11.5  
—
—
—
—
—
Signal to Noise  
plus Distortion  
See ENOB  
SINAD  
THD  
dB  
dB  
SINAD = 6.02⋅ ENOB+ 1.76  
Total Harmonic  
Distortion  
16-bit differential mode  
Avg = 32  
C
D
C
D
D
Fin  
=
—
—
-91.5  
-85.5  
92.2  
-74.3  
—
Fsample/100  
16-bit single-ended mode  
Avg = 32  
Spurious Free  
Dynamic  
Range  
16-bit differential mode  
Avg = 32  
SFDR  
dB  
Fin =  
Fsample/100  
75.0  
—
—
16-bit single-ended mode  
Avg = 32  
86.2  
—
IIn = leakage  
current  
(refer to DC  
characteristics)  
Input Leakage  
Error  
all modes  
EIL  
IIn * RAS  
mV  
Temp Sensor  
Slope  
-40°C– 25°C  
25°C– 125°C  
25°C  
C
C
m
—
—
—
1.646  
1.769  
701.2  
—
—
—
mV/°C  
Temp Sensor  
Voltage  
VTEMP25  
mV  
MCF51EM256 Series ColdFire Microcontroller Data Sheet, Rev.2  
Preliminary—Subject to Change Without Notice  
Freescale Semiconductor  
31  
Electrical Characteristics  
1
All accuracy numbers assume the ADC is calibrated with VREFH = VDDAD  
2
Typical values assume VDDAD = 3.0V, Temp = 25°C, fADCK = 2.0 MHz unless otherwise stated. Typical values are for reference  
only and are not tested in production.  
1 LSB = (VREFH – VREFL)/2N  
3
Table 15. 16-bit ADC Characteristics(V  
= V  
> 2.7V, V  
Min  
= V  
, F  
< 4MHz, ADHSC=1)  
REFH  
DDAD  
REFL  
SSAD ADCK  
Characteristic  
Conditions1  
C
Symb  
Typ2  
Max  
Unit  
Comment  
Total  
Unadjusted  
Error  
16-bit differential mode  
16-bit single-ended mode  
T
TUE  
—
—
±16  
±20  
+24/-24  
+32/-20  
LSB3  
32x  
Hardware  
Averaging  
(AVGE = %1  
AVGS = %11)  
13-bit differential mode  
12-bit single-ended mode  
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
—
—
±1.5  
±1.75  
±2.0  
±2.5  
11-bit differential mode  
10-bit single-ended mode  
—
—
±0.7  
±0.8  
±1.0  
±1.25  
9-bit differential mode  
8-bit single-ended mode  
—
—
±0.5  
±0.5  
±1.0  
±1.0  
Differential  
Non-Linearity  
16-bit differential mode  
16-bit single-ended mode  
DNL  
—
—
±2.5  
±2.5  
±3  
±3  
LSB2  
LSB2  
LSB2  
13-bit differential mode  
12-bit single-ended mode  
—
—
±0.7  
±0.7  
±1  
±1  
11-bit differential mode  
10-bit single-ended mode  
—
—
±0.5  
±0.5  
±0.75  
±0.75  
9-bit differential mode  
8-bit single-ended mode  
—
—
±0.2  
±0.2  
±0.5  
±0.5  
Integral  
Non-Linearity  
16-bit differential mode  
16-bit single-ended mode  
INL  
—
—
±6.0  
±10.0  
±12.0  
±16.0  
13-bit differential mode  
12-bit single-ended mode  
—
—
±1.0  
±1.0  
±2.0  
±2.0  
11-bit differential mode  
10-bit single-ended mode  
—
—
±0.5  
±0.5  
±1.0  
±1.0  
9-bit differential mode  
8-bit single-ended mode  
—
—
±0.3  
±0.3  
±0.5  
±0.5  
Zero-Scale  
Error  
16-bit differential mode  
16-bit single-ended mode  
EZS  
—
—
±4.0  
±4.0  
+16/0  
+16/-8  
VADIN = VSSAD  
13-bit differential mode  
12-bit single-ended mode  
—
—
±0.7  
±0.7  
±2.0  
±2.0  
11-bit differential mode  
10-bit single-ended mode  
—
—
±0.4  
±0.4  
±1.0  
±1.0  
9-bit differential mode  
8-bit single-ended mode  
—
—
±0.2  
±0.2  
±0.5  
±0.5  
MCF51EM256 Series ColdFire Microcontroller Data Sheet, Rev.2  
Preliminary—Subject to Change Without Notice  
32  
Freescale Semiconductor  
Electrical Characteristics  
< 4MHz, ADHSC=1)  
Table 15. 16-bit ADC Characteristics(V  
= V  
> 2.7V, V  
Min  
= V  
, F  
REFH  
DDAD  
REFL  
SSAD ADCK  
Characteristic  
Conditions1  
C
Symb  
Typ2  
Max  
Unit  
Comment  
Full-Scale  
Error  
16-bit differential mode  
16-bit single-ended mode  
T
EFS  
—
—
+8/0  
+12/0  
+24/0  
+24/0  
LSB2  
VADIN = VDDAD  
13-bit differential mode  
12-bit single-ended mode  
T
T
T
D
—
—
±0.7  
±0.7  
±2.0  
±2.5  
11-bit differential mode  
10-bit single-ended mode  
—
—
±0.4  
±0.4  
±1.0  
±1.0  
9-bit differential mode  
8-bit single-ended mode  
—
—
±0.2  
±0.2  
±0.5  
±0.5  
Quantization  
Error  
16 bit modes  
EQ  
—
—
-1 to 0  
—
—
LSB2  
Bits  
<13 bit modes  
±0.5  
Effective  
Number of Bits  
16 bit differential mode  
Avg = 32  
Avg = 16  
Avg = 8  
Avg = 4  
C
ENOB  
Fin  
=
14.3  
13.8  
13.4  
13.1  
12.4  
14.5  
14.0  
13.7  
13.4  
12.6  
—
—
—
—
—
Fsample/100  
Avg = 1  
16 bit single-ended mode  
Avg = 32  
Avg = 16  
Avg = 8  
Avg = 4  
TBD  
TBD  
TBD  
TBD  
TBD  
13.5  
13.0  
12.7  
12.4  
11.6  
—
—
—
—
—
Avg = 1  
Signal to Noise  
plus Distortion  
See ENOB  
SINAD  
THD  
dB  
dB  
SINAD = 6.02⋅ ENOB+ 1.76  
Total Harmonic  
Distortion  
16-bit differential mode  
Avg = 32  
C
D
C
D
D
Fin  
=
—
—
-95.8  
—
-90.4  
—
Fsample/100  
16-bit single-ended mode  
Avg = 32  
Spurious Free  
Dynamic  
Range  
16-bit differential mode  
Avg = 32  
SFDR  
dB  
Fin =  
Fsample/100  
91.0  
—
96.5  
—
16-bit single-ended mode  
Avg = 32  
—
—
IIn = leakage  
current  
(refer to DC  
characteristics)  
Input Leakage  
Error  
all modes  
EIL  
IIn * RAS  
mV  
Temp Sensor  
Slope  
–40°C–25°C  
25°C–125°C  
25°C  
D
D
m
—
—
—
1.646  
1.769  
701.2  
—
—
—
mV/°C  
Temp Sensor  
Voltage  
VTEMP25  
mV  
MCF51EM256 Series ColdFire Microcontroller Data Sheet, Rev.2  
Preliminary—Subject to Change Without Notice  
Freescale Semiconductor  
33  
Electrical Characteristics  
1
All accuracy numbers assume the ADC is calibrated with VREFH=VDDAD  
2
Typical values assume VDDAD = 3.0 V, Temp = 25 °C, fADCK=2.0MHz unless otherwise stated. Typical values are for reference  
only and are not tested in production.  
1 LSB = (VREFH–VREFL)/2N  
3
2.9  
External Oscillator (XOSC) Characteristics  
Reference Figure 11 and Figure 12 for crystal or resonator circuits. XOSC1 operates only in low power  
low range mode. XOSC2 operates in all the power and range modes.  
Table 16. XOSC Specifications (Temperature Range = –40 to 85 °C Ambient)  
Num  
C
Characteristic  
Symbol  
Min  
Typ1  
Max  
Unit  
Oscillator crystal or resonator (EREFS = 1, ERCLKEN = 1)  
flo  
fhi  
fhi  
Low range (RANGE = 0)  
High range (RANGE = 1), high gain (HGO = 1)  
High range (RANGE = 1), low power (HGO = 0)  
32  
1
1
—
—
—
38.4  
16  
8
kHz  
MHz  
MHz  
1
C
Load capacitors  
See Note2  
See Note3  
C1,C2  
2
3
D
D
Low range (RANGE=0), low power (HGO = 0)  
Other oscillator settings  
Feedback resistor  
Low range, low power (RANGE = 0, HGO = 0)2  
Low range, high gain (RANGE = 0, HGO = 1)  
High range (RANGE = 1, HGO = X)  
—
—
—
—
10  
1
—
—
—
RF  
MΩ  
kΩ  
Series resistor —  
Low range, low power (RANGE = 0, HGO = 0)2  
Low range, high gain (RANGE = 0, HGO = 1)  
High range, low power (RANGE = 1, HGO = 0)  
High range, high gain (RANGE = 1, HGO = 1)  
—
—
—
—
0
100  
—
—
—
RS  
4
D
≥ 8 MHz  
4 MHz  
1 MHz  
—
—
—
0
0
0
0
10  
20  
Crystal start-up time 4  
t
Low range, low power  
Low range, high power  
High range, low power  
High range, high power  
—
—
—
—
600  
400  
5
—
—
—
—
CSTL  
5
6
T
ms  
t
CSTH  
15  
Square wave input clock frequency (EREFS = 0, ERCLKEN = 1)  
fextal  
D
FEE mode  
FBE or FBELP mode  
0.03125  
0
—
—
50.33  
50.33  
MHz  
MHz  
1
2
3
4
Data in Typical column was characterized at 3.0 V, 25 °C or is typical recommended value.  
Load capacitors (C1,C2), feedback resistor (RF) and series resistor (RS) are incorporated internally when RANGE = HGO = 0.  
See crystal or resonator manufacturer’s recommendation.  
Proper PC board layout procedures must be followed to achieve specifications.  
MCF51EM256 Series ColdFire Microcontroller Data Sheet, Rev.2  
34  
Preliminary—Subject to Change Without Notice  
Freescale Semiconductor  
Electrical Characteristics  
XOSC  
EXTAL  
XTAL  
RS  
RF  
Crystal or Resonator  
C1  
C2  
Figure 11. Typical Crystal or Resonator Circuit: High Range and Low Range/High Gain  
XOSC  
EXTAL  
XTAL  
Crystal or Resonator  
Figure 12. Typical Crystal or Resonator Circuit: Low Range/Low Gain  
2.10 Internal Clock Source (ICS) Characteristics  
Table 17. ICS Frequency Specifications (Temperature Range = –40 to 85 °C Ambient)  
Num  
C
P
P
Characteristic  
Symbol  
Min  
—
Typical1  
32.768  
—
Max  
—
Unit  
Average internal reference frequency — factory trimmed  
fint_ft  
1
kHz  
at VDD = 3.6 V and temperature = 25 °C  
Internal reference frequency — user trimmed  
Internal reference start-up time  
Low range (DRS = 00)  
DCO output frequency range  
Mid range (DRS = 01)  
— trimmed2  
fint_ut  
tIRST  
2
3
31.25  
39.06  
kHz  
T
P
C
P
P
P
P
—
16  
32  
48  
—
—
—
60  
—
100  
20  
40  
60  
—
μs  
fdco_u  
4
5
—
MHz  
MHz  
High range (DRS = 10)  
—
Low range (DRS = 00)  
DCO output frequency2  
19.92  
39.85  
59.77  
fdco_DMX32  
Mid range (DRS = 01)  
—
Reference = 32768 Hz  
and DMX32 = 1  
High range (DRS = 10)  
—
Resolution of trimmed DCO output frequency at fixed voltage  
and temperature (using FTRIM)  
Δfdco_res_t  
Δfdco_res_t  
%fdco  
%fdco  
6
7
C
C
—
—
±0.1  
±0.2  
±0.2  
±0.4  
Resolution of trimmed DCO output frequency at fixed voltage  
and temperature (not using FTRIM)  
MCF51EM256 Series ColdFire Microcontroller Data Sheet, Rev.2  
Preliminary—Subject to Change Without Notice  
Freescale Semiconductor  
35  
Electrical Characteristics  
Table 17. ICS Frequency Specifications (Temperature Range = –40 to 85 °C Ambient) (continued)  
Num  
C
Characteristic  
Symbol  
Min  
Typical1  
Max  
Unit  
Total deviation of trimmed DCO output frequency over voltage  
and temperature  
0.5  
–1.0  
Δfdco_t  
%fdco  
8
C
—
±2  
Total deviation of trimmed DCO output frequency over fixed  
voltage and temperature range of 0 °C to 70 °C  
Δfdco_t  
tAcquire  
CJitter  
%fdco  
ms  
9
C
C
C
—
—
—
±0.5  
—
±1  
1
FLL acquisition time 3  
10  
11  
Long term jitter of DCO output clock (averaged over 2 ms  
interval)4  
%fdco  
0.02  
0.2  
1
2
3
Data in Typical column was characterized at 3.0 V, 25 °C or is typical recommended value.  
The resulting bus clock frequency should not exceed the maximum specified bus clock frequency of the device.  
This specification applies to any time the FLL reference source or reference divider is changed, trim value changed or changing  
from FLL disabled (FBELP, FBILP) to FLL enabled (FEI, FEE, FBE, FBI). If a crystal/resonator is being used as the reference,  
this specification assumes it is already running.  
4
Jitter is the average deviation from the programmed frequency measured over the specified interval at maximum fBus  
.
Measurements are made with the device powered by filtered supplies and clocked by a stable external clock signal. Noise  
injected into the FLL circuitry via VDD and VSS and variation in crystal oscillator frequency increase the CJitter percentage for a  
given interval.  
60  
50  
40  
30  
20  
10  
0
HR  
MR  
LR  
-40 -30 -20 -10  
0
10  
25  
35  
45  
55  
65  
75  
85  
95  
Temp (C)  
Figure 13. Deviation of DCO Output from Trimmed Frequency (50.33 MHz, 3.0 V)  
MCF51EM256 Series ColdFire Microcontroller Data Sheet, Rev.2  
36  
Preliminary—Subject to Change Without Notice  
Freescale Semiconductor  
Electrical Characteristics  
60  
50  
40  
30  
20  
10  
0
HR  
MR  
LR  
2.00 V 2.25 V 2.50 V  
2.75 V 3.00 V 3.25 V  
3.50 V 3.75 V 4.00 V  
Vdd (V)  
Figure 14. Deviation of DCO Output from Trimmed Frequency (50.33 MHz, 25 °C)  
o
2.11 LCD Specifications  
Table 18. LCD Electricals, 3 V Glass  
N
C
Characteristic  
LCD frame frequency  
Symbol  
Min  
Typical  
Max  
Unit  
1
2
3
4
5
6
D
D
D
D
fFrame  
CLCD  
CBYLCD  
Cglass  
28  
30  
58  
Hz  
nF  
nF  
pF  
LCD charge pump capacitance  
LCD bypass capacitance  
LCD glass capacitance  
100  
100  
100  
100  
2000  
1.00  
1.67  
8000  
1.15  
1.851  
HRefSel = 0  
HRefSel = 1  
.89  
D
D
D
VIREG  
VIREG  
V
1.49  
%
VIREG  
7
8
V
IREG trim resolution  
ΔRTRIM  
1.5  
—
HRefSel = 0  
HRefSel = 1  
RVEN = 1  
0.1  
VIREG ripple  
V
0.15  
9
D
D
V
IREG current adder  
LCD buffered adder3  
IVIREG  
IBuff  
—
—
12  
1
μA  
μA  
10  
V
1
2
3
VIREG Max can not exceed VDD – 0.15 V  
2000 pF Load LCD, frame frequency = 32 Hz  
VSUPPLY = 10, BYPASS = 0  
2.12 AC Characteristics  
This section describes AC timing characteristics for each peripheral system.  
MCF51EM256 Series ColdFire Microcontroller Data Sheet, Rev.2  
Preliminary—Subject to Change Without Notice  
Freescale Semiconductor  
37  
Electrical Characteristics  
2.12.1 Control Timing  
Table 19. Control Timing  
Num  
C
Parameter  
Bus frequency (tcyc = 1/fBus  
Symbol  
Min  
Typical1  
Max  
Unit  
1
2
D
D
)
fBus  
DC  
—
25.165  
1300  
MHz  
Internal low-power oscillator period  
External reset pulse width2  
tLPO  
700  
μs  
3
D
textrst  
100  
—
ns  
(tcyc = 1/fSelf_reset  
)
4
5
6
D
D
D
Reset low drive  
trstdrv  
tMSSU  
tMSH  
66 × tcyc  
500  
—
—
—
ns  
ns  
ns  
Active background debug mode latch setup time  
Active background debug mode latch hold time  
100  
IRQ pulse width  
7
8
D
D
Asynchronous path2  
Synchronous path3  
100  
1.5 × tcyc  
t
ILIH, tIHIL  
—
—
—
—
ns  
ns  
KBIPx pulse width  
Asynchronous path2  
Synchronous path3  
100  
1.5 × tcyc  
tILIH, IHIL  
t
Port rise and fall time (load = 50 pF)4  
Slew rate control disabled (PTxSE = 0), low drive  
Slew rate control enabled (PTxSE = 1), low drive  
Slew rate control disabled (PTxSE = 0), low drive  
Slew rate control enabled (PTxSE = 1), low drive  
11  
35  
40  
75  
9
D
tRise, tFall  
—
—
ns  
1
2
Typical values are based on characterization data at VDD = 5.0 V, 25 °C unless otherwise stated.  
This is the shortest pulse that is guaranteed to be recognized as a reset pin request. Shorter pulses are not guaranteed to  
override reset requests from internal sources.  
3
4
This is the minimum pulse width that is guaranteed to pass through the pin synchronization circuitry. Shorter pulses may or may  
not be recognized. In stop mode, the synchronizer is bypassed so shorter pulses can be recognized in that case.  
Timing is shown with respect to 20% VDD and 80% VDD levels. Temperature range –40 °C to 105 °C.  
textrst  
RESET PIN  
Figure 15. Reset Timing  
MCF51EM256 Series ColdFire Microcontroller Data Sheet, Rev.2  
38  
Preliminary—Subject to Change Without Notice  
Freescale Semiconductor  
Electrical Characteristics  
tIHIL  
IRQ/KBIPx  
IRQ/KBIPx  
tILIH  
Figure 16. IRQ/KBIPx Timing  
2.12.2 Timer (TPM/FTM) Module Timing  
Synchronizer circuits determine the shortest input pulses that can be recognized or the fastest clock that  
can be used as the optional external source to the timer counter. These synchronizers operate from the  
current bus rate clock.  
Table 20. TPM Input Timing  
No.  
C
Function  
Symbol  
Min  
Max  
Unit  
1
2
3
4
5
D
D
D
D
D
External clock frequency  
External clock period  
fTCLK  
tTCLK  
tclkh  
0
fBus/4  
—
Hz  
tcyc  
tcyc  
tcyc  
tcyc  
4
External clock high time  
External clock low time  
Input capture pulse width  
1.5  
1.5  
1.5  
—
tclkl  
—
tICPW  
—
tTCLK  
tclkh  
TCLK  
tclkl  
Figure 17. Timer External Clock  
tICPW  
TPMCHn  
TPMCHn  
tICPW  
Figure 18. Timer Input Capture Pulse  
MCF51EM256 Series ColdFire Microcontroller Data Sheet, Rev.2  
Preliminary—Subject to Change Without Notice  
Freescale Semiconductor  
39  
Electrical Characteristics  
2.13 VREF Characteristics  
Table 21. VREF Electrical Specifications  
Num  
C
Characteristic  
Supply voltage  
Symbol  
Min  
Typical  
Max  
Unit  
1
2
3
—
—
D
VDDAD  
Top  
1.80  
–40  
—
—
—
—
3.60  
105  
10  
V
Operating temperature range  
Load capability  
°C  
Iload  
mA  
Voltage reference output  
4
5
C
P
untrimmed  
factory trimmed  
VREFO  
1.070  
1.13  
—
1.150  
1.202  
1.17  
V
V
Load regulation  
D
20  
—
100  
μV/mA  
mode = 10, Iload = 1 mA  
Line regulation (power supply  
rejection)  
6
T
DC  
AC  
±0.1 from room temp voltage  
mV  
dB  
–60  
7
8
9
T
C
T
Bandgap only (mode = 00)  
IBG  
ILP  
ITR  
—
72  
90  
—
μA  
μA  
Low power mode (mode = 01)  
Tight regulation mode (mode =10)  
—
—
125  
—
0.27  
mA  
2.14 SPI Characteristics  
Table 22 and Figure 19 through Figure 22 describe the timing requirements for the SPI system.  
MCF51EM256 Series ColdFire Microcontroller Data Sheet, Rev.2  
40  
Preliminary—Subject to Change Without Notice  
Freescale Semiconductor  
Electrical Characteristics  
1,2  
Table 22. SPI Electrical Characteristic  
Num3  
C
Characteristic4  
Operating frequency  
Symbol  
Min  
Max  
Unit  
1
D
Master  
Slave  
fBus/2048  
0
fBus/2  
fBus/4  
fop  
Hz  
SPSCK period  
Enable lead time  
Enable lag time  
2
3
4
5
6
7
D
D
D
D
D
D
Master  
Slave  
2
4
2048  
—
tSPSCK  
tLead  
tLag  
tcyc  
tSPSCK  
tcyc  
Master  
Slave  
1/2  
—
—
—
tSPSCK  
tcyc  
Master  
Slave  
1/2  
—
—
—
Clock (SPSCK) high or low time  
Master  
1024 tcyc  
—
tWSPSCK  
tcyc – 30  
ns  
ns  
ns  
Slave  
Data setup time (inputs)  
Data hold time (inputs)  
Master  
Slave  
15  
15  
—
—
tSI  
Master  
Slave  
0
25  
—
—
tHI  
8
9
D
D
Slave access time5  
ta  
—
—
1
1
tcyc  
tcyc  
Slave MISO disable time6  
tdis  
Data valid (after SPSCK edge)  
10  
11  
12  
13  
D
D
D
D
Master  
Slave  
—
—
25  
25  
tv  
ns  
ns  
ns  
ns  
Data hold time (outputs)  
Rise time  
Master  
Slave  
0
0
—
—
tHO  
Input  
Output  
tRI  
tRO  
—
—
tcyc – 25  
—25  
Fall time  
Input  
Output  
tFI  
tFO  
—
—
tcyc – 25  
—25  
1
The performance of SPI2 depends on the configuration of power supply of the LCD pins. When the LCD pins  
are configured with full complementary drive enabled (FCDEN = 1, VSUPPLY = 11 and RVEN = 0), and VLL3  
is driven with external VDD, the SPI2 can operate at the max performance as the above table. When the internal  
LCD charge pump is used to power the LCD pins, the SPI2 is configured with open-drain outputs. Its  
performance depends on the value of the external pullup resistor implemented, and the max operating  
frequency must be limited to 1 MHz.  
2
3
SPI3 has open-drain outputs and its performance depends on the value of the external pullup resistor  
implemented.  
Refer to Figure 19 through Figure 22.  
MCF51EM256 Series ColdFire Microcontroller Data Sheet, Rev.2  
Freescale Semiconductor  
Preliminary—Subject to Change Without Notice  
41  
Electrical Characteristics  
4
All timing is shown with respect to 20% V  
assumes slew rate control disabled and high drive strength enabled for SPI output pins.  
and 70% V , unless noted; 100 pF load on all SPI pins. All timing  
DD  
DD  
5
6
Time to data active from high-impedance state.  
Hold time to high-impedance state.  
SS1  
(OUTPUT)  
2
2
3
SCK  
(CPOL = 0)  
(OUTPUT)  
5
4
4
5
SCK  
(CPOL = 1)  
(OUTPUT)  
6
7
MISO  
(INPUT)  
MSB IN2  
11  
BIT 6 . . . 1  
11  
LSB IN  
12  
MOSI  
(OUTPUT)  
MSB OUT2  
BIT 6 . . . 1  
LSB OUT  
NOTES:  
1. SS output mode (MODFEN = 1, SSOE = 1).  
2. LSBF = 0. For LSBF = 1, bit order is LSB, bit 1, ..., bit 6, MSB.  
Figure 19. SPI Master Timing (CPHA = 0)  
SS(1)  
(OUTPUT)  
2
2
3
SCK  
(CPOL = 0)  
(OUTPUT)  
5
4
SCK  
(CPOL = 1)  
5
4
(OUTPUT)  
6
7
MISO  
(INPUT)  
MSB IN(2)  
BIT 6 . . . 1  
12  
BIT 6 . . . 1  
LSB IN  
11  
MOSI  
(OUTPUT)  
MSB OUT(2)  
LSB OUT  
NOTES:  
1. SS output mode (MODFEN = 1, SSOE = 1).  
2. LSBF = 0. For LSBF = 1, bit order is LSB, bit 1, ..., bit 6, MSB.  
Figure 20. SPI Master Timing (CPHA = 1)  
MCF51EM256 Series ColdFire Microcontroller Data Sheet, Rev.2  
Preliminary—Subject to Change Without Notice  
42  
Freescale Semiconductor  
Electrical Characteristics  
SS  
(INPUT)  
3
2
SCK  
5
4
(CPOL = 0)  
4
5
(INPUT)  
2
SCK  
(CPOL = 1)  
(INPUT)  
9
8
12  
11  
MISO  
(OUTPUT)  
SEE  
NOTE  
BIT 6 . . . 1  
BIT 6 . . . 1  
SLAVE LSB OUT  
MSB OUT  
7
SLAVE  
6
MOSI  
(INPUT)  
MSB IN  
LSB IN  
NOTE:  
1. Not defined but normally MSB of character just received  
Figure 21. SPI Slave Timing (CPHA = 0)  
SS  
(INPUT)  
2
3
2
SCK  
(CPOL = 0)  
(INPUT)  
5
4
4
5
SCK  
(CPOL = 1)  
(INPUT)  
11  
SLAVE MSB OUT  
12  
9
MISO  
(OUTPUT)  
SEE  
NOTE  
BIT 6 . . . 1  
SLAVE LSB OUT  
6
7
8
MOSI  
(INPUT)  
MSB IN  
BIT 6 . . . 1  
LSB IN  
NOTE:  
1. Not defined but normally LSB of character just received  
Figure 22. SPI Slave Timing (CPHA = 1)  
2.15 Flash Specifications  
This section provides details about program/erase times and program-erase endurance for the flash  
memory.  
Program and erase operations do not require any special power sources other than the normal V supply.  
DD  
For more detailed information about program/erase operations, see the Memory section of the  
MCF51EM256 Series ColdFire Microcontroller Reference Manual.  
MCF51EM256 Series ColdFire Microcontroller Data Sheet, Rev.2  
Freescale Semiconductor  
Preliminary—Subject to Change Without Notice  
43  
Electrical Characteristics  
Table 23. Flash Characteristics  
N
C
Characteristic  
Symbol  
Min  
Typical  
Max  
Unit  
Supply voltage for program/erase  
–40 °C to 85 °C  
1
D
Vprog/erase  
VRead  
fFCLK  
1.8  
1.8  
150  
5
3.6  
3.6  
V
2
3
D
D
D
P
P
P
P
Supply voltage for read operation  
Internal FCLK frequency1  
V
200  
6.67  
kHz  
μs  
4
Internal FCLK period (1/fFCLK  
)
tFcyc  
5
Longword program time (random location)2  
Longword program time (burst mode)2  
Page erase time2  
tprog  
9
4
tFcyc  
tFcyc  
tFcyc  
tFcyc  
mA  
mA  
6
tBurst  
7
tPage  
4000  
20,000  
9.7  
8
Mass erase time2  
tMass  
9
Longword program current3  
Page erase current3  
RIDDBP  
RIDDPE  
—
—
—
—
10  
7.6  
Program/erase endurance4  
TL to TH = –40 °C to 85 °C  
T = 25 °C  
11  
12  
C
C
10,000  
—
—
100,000  
—
—
cycles  
years  
Data retention5  
tD_ret  
15  
100  
—
1
2
The frequency of this clock is controlled by a software setting.  
These values are hardware state machine controlled. User code does not need to count cycles. This information supplied for  
calculating approximate time to program and erase.  
3
4
5
The program and erase currents are additional to the standard run IDD. These values are measured at room temperatures with  
VDD = 3.0 V, bus frequency = 4.0 MHz.  
Typical endurance for flash was evaluated for this product family on the HC9S12Dx64. For additional information on how  
Freescale defines typical endurance, please refer to Engineering Bulletin EB619, Typical Endurance for Nonvolatile Memory.  
Typical data retention values are based on intrinsic capability of the technology measured at high temperature and de-rated  
to 25°C using the Arrhenius equation. For additional information on how Freescale defines typical data retention, please refer  
to Engineering Bulletin EB618, Typical Data Retention for Nonvolatile Memory.  
2.16 EMC Performance  
Electromagnetic compatibility (EMC) performance is highly dependant on the environment in which the  
MCU resides. Board design and layout, circuit topology choices, location and characteristics of external  
components as well as MCU software operation all play a significant role in EMC performance. The  
system designer should consult Freescale applications notes such as AN2321, AN1050, AN1263,  
AN2764, and AN1259 for advice and guidance specifically targeted at optimizing EMC performance.  
2.16.1 Radiated Emissions  
Microcontroller radiated RF emissions are measured from 150 kHz to 1 GHz using the TEM/GTEM Cell  
method in accordance with the IEC 61967-2 and SAE J1752/3 standards. The measurement is performed  
with the microcontroller installed on a custom EMC evaluation board while running specialized EMC test  
software. The radiated emissions from the microcontroller are measured in a TEM cell in two package  
orientations (North and East). For more detailed information concerning the evaluation results, conditions  
and setup, please refer to the EMC Evaluation Report for this device.  
MCF51EM256 Series ColdFire Microcontroller Data Sheet, Rev.2  
44  
Preliminary—Subject to Change Without Notice  
Freescale Semiconductor  
Mechanical Outline Drawings  
3
Mechanical Outline Drawings  
3.1  
80-pin LQFP Package  
MCF51EM256 Series ColdFire Microcontroller Data Sheet, Rev.2  
Preliminary—Subject to Change Without Notice  
Freescale Semiconductor  
45  
Mechanical Outline Drawings  
MCF51EM256 Series ColdFire Microcontroller Data Sheet, Rev.2  
Preliminary—Subject to Change Without Notice  
46  
Freescale Semiconductor  
Mechanical Outline Drawings  
MCF51EM256 Series ColdFire Microcontroller Data Sheet, Rev.2  
Preliminary—Subject to Change Without Notice  
Freescale Semiconductor  
47  
Mechanical Outline Drawings  
MCF51EM256 Series ColdFire Microcontroller Data Sheet, Rev.2  
Preliminary—Subject to Change Without Notice  
48  
Freescale Semiconductor  
Mechanical Outline Drawings  
3.2  
100-pin LQFP Package  
MCF51EM256 Series ColdFire Microcontroller Data Sheet, Rev.2  
Preliminary—Subject to Change Without Notice  
Freescale Semiconductor  
49  
Mechanical Outline Drawings  
MCF51EM256 Series ColdFire Microcontroller Data Sheet, Rev.2  
Preliminary—Subject to Change Without Notice  
50  
Freescale Semiconductor  
Mechanical Outline Drawings  
MCF51EM256 Series ColdFire Microcontroller Data Sheet, Rev.2  
Preliminary—Subject to Change Without Notice  
Freescale Semiconductor  
51  
Mechanical Outline Drawings  
MCF51EM256 Series ColdFire Microcontroller Data Sheet, Rev.2  
Preliminary—Subject to Change Without Notice  
52  
Freescale Semiconductor  
4
Revision History  
Table 24. Revision History  
Description  
Revision  
Date  
1
2
10/15/2009  
4/29/2010  
Initial public release.  
Updated teh descriptions of SPI in the Table 2.  
Changed the FSPIx to SPI16 to keep the term in accordance.  
Updated Figure 4 to Figure 8.  
Updated WIDD, S2IDD, S3IDD in the Table 11.  
Updated the ADC characteristics in the Table 13 to Table 15.  
Updated description of XOSC in the Section 2.9, “External Oscillator (XOSC)  
Characteristics.”  
Updated tCSTL in the Table 16.  
Updated the the classification of IBG and ITR to T and added Voltage reference output  
(factory trimmed) in the Table 21.  
Update SPI data in the Table 22.  
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MCF51EM256  
Rev.2  
4/2010  
Preliminary—Subject to Change Without Notice  

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