•ꢀ Audioꢀvisualꢀinterfaces
System-Level Cost Saving
Key Features
The P1022 processor’s highly integrated
architecture is designed to enhance
LCD interface supporting a display of
•ꢀ Dualꢀ(P1022)ꢀorꢀsingleꢀ(P1013)ꢀhigh-
performance e500v2 cores built on Power
Architecture technology
1280ꢀxꢀ1024Pꢀ@ꢀ60ꢀHz,ꢀ24ꢀbitsꢀperꢀpixel
performance and deliver system-level cost
savings in a small board footprint. Key
system-level peripherals include dual Gigabit
Ethernet, dual USB 2.0, dual SATA, SD/
MMC and triple PCI Express interconnects.
Furthermore, the P1022 integrates LCD
controller, I2S audio and VoIP TDM interfaces
for use in creating engaging human interfaces.
Special care was taken to design the P1022
processor’s pin locations for mounting on
low-cost six layer PCBs. The P1022 is a
full-featured, high-performance gigahertz
processor that is designed to support fanless
operation for power-sensitive applications.
I2S interface with maximum sampling
frequency of 192 kHz
36-bit physical addressing
•ꢀ VoIPꢀTDMꢀinterface
Double precision floating point support
Support for up to 128 channels
•ꢀ TwoꢀHigh-SpeedꢀUSBꢀcontrollersꢀ(USBꢀ2.0)
Host and device support
Signal processing engine (SPE) APU
(auxiliary processing unit)
32 KB L1 instruction cache and 32 KB L1
data cache for each core
Enhanced host controller interface (EHCI)
ULPI interface to PHY
600 MHz to 1055 MHz core
clock frequency
•ꢀ Enhancedꢀsecureꢀdigitalꢀhostꢀcontrollerꢀ
•ꢀ 256ꢀKBꢀL2ꢀcacheꢀwithꢀECC,ꢀalsoꢀ
configurable as SRAM and stashing
memory
(SD/MMC)
•ꢀ Serialꢀperipheralꢀinterface
•ꢀ Programmableꢀinterruptꢀcontrollerꢀ(PIC)ꢀ
•ꢀ 64-bitꢀDDR2/DDR3ꢀSDRAMꢀmemoryꢀ
Advanced Energy-Efficient Modes
Balancing the performance requirements
for powerful new networking- and Internet-
centric applications, with the increasing
concerns over energy consumption, is driving
manufacturers to develop intelligent strategies
for optimizing performance within specific
energy budgets. This is a key challenge
for the next-generation green embedded
systems. The P1022 processor implements
sophisticated power-saving modes for
managing energy consumption in both
dynamic and static power modes. These
include the traditional nap, doze plus the
jog (dynamic frequency scaling) and packet-
lossless deep-sleep modes. Designers may
leverage these modes to efficiently match
work accomplished with the correct level of
energy consumed.
compliant with Open-PIC standard
controller with ECC support
•ꢀ Dualꢀfour-channelꢀDMAꢀcontrollers
•ꢀ DualꢀI2C controllers, DUART, timers
•ꢀ Enhancedꢀlocalꢀbusꢀcontrollerꢀ(eLBC)
•ꢀ Advancedꢀpowerꢀandꢀenergyꢀmanagement
Low power operation
•ꢀ Twoꢀ10/100/1000ꢀMbpsꢀvirtualizedꢀ
enhanced three-speed Ethernet controllers
(eTSECs)
TCP/IP acceleration and classification
capabilities
IEEE® 1588 support
Support for dynamic and static power
management
Loseless flow control
Doze, nap and sleep modes for dynamic
power management
RMII, RGMII, SGMII
•ꢀ Integratedꢀsecurityꢀengineꢀ(optional)
Packet-lossless deep sleep: power
Crypto algorithm support includes 3DES,
AES,ꢀRSA/ECC,ꢀMD5/SHA,ꢀARC4,ꢀ
Kasumi, Snow 3G and FIPS deterministic
RNG
removed from major portion of the chip
PMC wake on: filtered LAN activity,
USB connection, GPIO, internal timer or
external interrupt event
Single pass encryption/message
authentication for common security
protocols (IPsec, SSL, SRTP, WiMAX)
•ꢀ Upꢀtoꢀ87ꢀgeneral-purposeꢀsignalsꢀ
•ꢀ Availableꢀinꢀextendedꢀtemperatureꢀ(optional)
•ꢀ 689-pinꢀTEPBGAꢀpackage
The combination of these features makes
the P1022 processor an optimal embedded
processing solution for Ethernet or PCI
Express interworking applications, such as
enterprise networking, industrial, storage,
security and office automation applications.
Examples include control plane processing,
protocol processing, media processing while
producing an engaging human machine
interface.
XOR acceleration
•ꢀ High-speedꢀinterfacesꢀ(notꢀallꢀavailableꢀ
simultaneously)
Six SerDes lanes (multiplexed across
controllers)
ꢀ Oneꢀx4ꢀandꢀtwoꢀx1ꢀPCIꢀExpressꢀ
interfaces
Two serial ATA (SATA) interfaces
Two SGMII interfaces
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© 2009, 2010, 2011 Freescale Semiconductor, Inc.
Document Number: QP1022FS / REV 1