TK5P60W [FREESCALE]

MOSFETsSilicon N Channel MOS Type (π-MOSⅦ); MOSFETsSilicon N沟道MOS类型(I ?? - 莫萨? | )
TK5P60W
型号: TK5P60W
厂家: Freescale    Freescale
描述:

MOSFETsSilicon N Channel MOS Type (π-MOSⅦ)
MOSFETsSilicon N沟道MOS类型(I ?? - 莫萨? | )

文件: 总9页 (文件大小:340K)
中文:  中文翻译
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TK5P60W  
MOSFETs Silicon N Channel MOS Type (π-MOS)  
1. Applications  
Switching Voltage Regulators  
2. Features  
(1) Low drain-source on-resistance: RDS(ON) = 0.77 (typ.)  
by used to Super Junction Structure : DTMOS  
(2) Easy to control Gate switching  
(3) Enhancement mode: Vth = 2.7 to 3.7 V (VDS = 10 V, ID = 0.27 mA)  
3. Packaging and Internal Circuit  
1: Gate  
2: Drain (Heatsink)  
3: Source  
DPAK  
4. Absolute Maximum Ratings (Note) (T = 25unless otherwise specified)  
a
Characteristics  
Symbol  
Rating  
Unit  
V
Drain-source voltage  
Gate-source voltage  
Drain current (DC)  
Drain current (pulsed)  
Power dissipation  
VDSS  
VGSS  
ID  
600  
±30  
(Note 1)  
(Note 1)  
5.4  
A
IDP  
21.6  
60  
(Tc = 25)  
PD  
W
mJ  
A
Single-pulse avalanche energy  
Avalanche current  
(Note 2)  
EAS  
IAR  
71  
1.4  
Reverse drain current (DC)  
Reverse drain current (pulsed)  
Channel temperature  
(Note 1)  
(Note 1)  
IDR  
5.4  
IDRP  
Tch  
21.6  
150  
Storage temperature  
Tstg  
-55 to 150  
Note: Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the  
significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even  
if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum  
ratings.  
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5. Thermal Characteristics  
Characteristics  
Symbol  
Rth(ch-c)  
Max  
2.09  
Unit  
Channel-to-case thermal resistance  
/W  
Note 1: Ensure that the channel temperature does not exceed 150.  
Note 2: VDD = 90 V, Tch = 25(initial), L = 63.1 mH, RG = 25 , IAR = 1.4 A  
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6. Electrical Characteristics  
6.1. Static Characteristics (T = 25unless otherwise specified)  
a
Characteristics  
Gate leakage current  
Symbol  
Test Condition  
Min  
Typ.  
Max  
Unit  
IGSS  
IDSS  
VGS = ±30 V, VDS = 0 V  
±1  
10  
µA  
Drain cut-off current  
VDS = 600 V, VGS = 0 V  
Drain-source breakdown voltage  
Gate threshold voltage  
V(BR)DSS ID = 10 mA, VGS = 0 V  
Vth VDS = 10 V, ID = 0.27 mA  
RDS(ON) VGS = 10 V, ID = 2.7 A  
600  
2.7  
V
3.7  
0.9  
Drain-source on-resistance  
0.77  
6.2. Dynamic Characteristics (T = 25unless otherwise specified)  
a
Characteristics  
Input capacitance  
Symbol  
Test Condition  
Min  
Typ.  
Max  
Unit  
pF  
Ciss  
Crss  
Coss  
Co(er)  
rg  
VDS = 300 V, VGS = 0 V, f = 1 MHz  
25  
380  
1.5  
10  
17  
8.2  
18  
40  
7
Reverse transfer capacitance  
Output capacitance  
Effective output capacitance  
Gate resistance  
VDS = 0 to 400 V, VGS = 0 V  
VDS = OPEN, f = 1 MHz  
See Figure 6.2.1  
Switching time (rise time)  
Switching time (turn-on time)  
Switching time (fall time)  
Switching time (turn-off time)  
MOSFET dv/dt ruggedness  
tr  
ns  
ton  
tf  
toff  
50  
dv/dt  
VDD = 0 to 400 V, ID = 2.7 A  
V/ns  
Fig. 6.2.1 Switching Time Test Circuit  
6.3. Gate Charge Characteristics (T = 25unless otherwise specified)  
a
Characteristics  
Symbol  
Qg  
Test Condition  
Min  
Typ.  
10.5  
Max  
Unit  
nC  
Total gate charge (gate-source plus  
gate-drain)  
VDD 400 V, VGS = 10 V, ID = 5.4 A  
Gate-source charge 1  
Gate-drain charge  
Qgs1  
Qgd  
2.7  
5.8  
6.4. Source-Drain Characteristics (T = 25unless otherwise specified)  
a
Characteristics  
Diode forward voltage  
Symbol  
Test Condition  
IDR = 5.4 A, VGS = 0 V  
Min  
Typ.  
Max  
Unit  
VDSF  
trr  
15  
200  
1.3  
13  
-1.7  
V
ns  
Reverse recovery time  
IDR = 2.7 A, VGS = 0 V  
-dIDR/dt = 100 A/µs  
Reverse recovery charge  
Peak reverse recovery current  
Diode dv/dt ruggedness  
Qrr  
µC  
A
Irr  
dv/dt  
IDR = 2.7 A, VGS = 0 V, VDD = 400 V  
V/ns  
3/9  
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7. Marking  
Fig. 7.1 Marking  
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8. Characteristics Curves (Note)  
Fig. 8.1 I - V  
Fig. 8.2 I - V  
D DS  
D
DS  
Fig. 8.3 I - V  
Fig. 8.4  
V - V  
DS GS  
D
GS  
Fig. 8.5  
V
DSS  
- T  
Fig. 8.6  
R
- I  
a
DS(ON) D  
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Fig. 8.7  
R
DS(ON)  
- T  
Fig. 8.8  
I - V  
DR DS  
a
Fig. 8.9 C - V  
Fig. 8.10  
E - V  
OSS DS  
DS  
Fig. 8.11 V - T  
Fig. 8.12 Dynamic Input/Output Characteristics  
th  
a
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Fig. 8.13 r - t  
th  
w
(Guaranteed Maximum)  
Fig. 8.14  
E
AS  
- T  
Fig. 8.15 P - T  
D c  
ch  
(Guaranteed Maximum)  
(Guaranteed Maximum)  
Fig. 8.16 Test Circuit/Waveform  
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Fig. 8.17 Safe Operating Area  
(Guaranteed Maximum)  
Note: The above characteristics curves are presented for reference only and not guaranteed by production test,  
unless otherwise noted.  
8/9  
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Package Dimensions  
Unit: mm  
9/9  
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