FTK8N80P [FS]
8.0 Amps, 800 Volts N-Channel MOS -FET;
| 型号： | FTK8N80P |
| 厂家： | 
First Silicon Co., Ltd |
| 描述： | 8.0 Amps, 800 Volts N-Channel MOS -FET |
| 文件： | 总8页 (文件大小：278K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SEMICONDUCTOR
FTK8N80P/D/DD
TECHNICAL DATA
8.0 Amps, 800 Volts N-Channel MOS-FET
DESCRIPTION
These N-Channel enhancement mode power field effect
Transistors are produced using planar stripe, DMOS
technology.
P :
1
This advanced technology has been especially tailored
to minimize on - state resistance , provide superior
switching performance,and Withstand high energy pulse
in the avalanche and commutaion mode .These devices
are well suited for high efficiency switch mode power
TO-220
F :
supply electronic lamp ballasts
based on half bridge topology.
1
TO-220F
FEATURES
* RDS(ON) = 1.9Ω@VGS = 10V
* Fast switching capability
* Avalanche energy tested
DD :
1
* Improved dv/dt capability, high ruggedness
TO-263
SYMBOL
2.Drain
1.Gate
3.Source
ORDERING INFORMATION
Pin Assignment
Order Number
Package
Packing
1
2
3
FTK8N80P
FTK8N80F
FTK8N80DD
TO-220
TO-220F
TO-263
G
D
S
Tube
Tube
G
G
D
D
S
S
Reel & Taping
Note: Pin Assignmen:
G: Gate
D: Drain
S: Source
2012. 07. 05
Revision No : 0
1/8
FTK8N80P/F/DD
(
TC = 25˚C, unless otherwise specified)
ABSOLUTE MAXIMUM RATINGS
PARAMET
SYMBOL
VDSS
RATINGS
800
UNIT
V
Drain-Source Voltage
VGSS
Gate-Source Voltage
±30
V
IAR
Avalanche Current (Note 1)
7.5
A
TC = 25°C
7.5
A
Continuous Drain Current
Pulsed Drain Current (Note 1)
Avalanche Energy
ID
TC = 100°C
4.2
IDM
EAS
28
A
Single Pulse(Note 2)
580
16.7
4.5
mJ
mJ
Repetitive Limited by TJ(MAX)
EAR
Peak Diode Recovery dv/dt (Note 3)
dv/dt
V/ns
W
TC = 25°C
142 / 48
1.14 / 0.38
+150
Power Dissipation (TO-220,TO-263/ TO-220F)
PD
Derate above 25°C
W / ˚C
TJ
Junction Temperature
˚C
˚C
TSTG
-55 ~ +150
Operating and Storage Temperature
Note: Absolute maximum ratings are those values beyond which the device could be permanently damaged.
Absolute maximum ratings are stress ratings only and functional device operation is not implied.
THERMAL DATA
PARAMETER
Junction-to-Ambient
Junction-to-Case
SYMBOL
MIN
TYP
MAX
62.5
UNIT
θJA
TO-220, TO-263
TO-220F
θJc
θJc
˚C / W
0.88
2.6
ELECTRICAL CHARACTERISTICS
(TC = 25˚C , unless Otherwise specified.)
PARAMETER
OFF CHARACTERISTICS
Drain-Source Breakdown Voltage
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX UNIT
BVDSS
IDSS
VGS = 0V, ID = 250µA
800
V
10
µA
Drain-Source Leakage Current
Gate-Body Leakage Current
VDS = 800V, VGS = 0V
IGSSF
IGSSR
VGS = 30V, VDS = 0V
Forward
Reverse
100
nA
nA
VGS = -30V, VDS = 0V
-100
ID = 250µA, Referenced to
25°C
ΔBVDSS / ΔTJ
Breakdown Voltage Temperature Coefficient
0.93
5.5
V / ˚C
ON CHARACTERISTICS
Gate Threshold Voltage
VGS(TH)
RDS(ON)
gFS
VDS = VGS, ID = 250µA
VGS = 10V, ID = 3.50A
2.0
4.0
1.9
V
Ω
S
Static Drain-Source On-Resistance
VDS = 40V, ID = 3.5A (Note 4)
Forward Transconductance
DYNAMIC CHARACTERISTICS
Input Capacitance
CISS
COSS
CRSS
1290
120
10
pF
pF
pF
VDS = 25V, VGS = 0V,
f = 1.0MHz
Output Capacitance
Reverse Transfer Capacitance
SWITCHING CHARACTERISTICS
Turn-On Delay Time
tD(ON)
35
ns
tR
tD(OFF)
tF
Turn-On Rise Time
Turn-Off Delay Time
Turn-Off Fall Time
Total Gate Charge
Gate-Source Charge
VDD = 300V, ID = 7A, RG = 25Ω
(Note 4,5)
100
50
ns
ns
60
ns
QG
28
nC
nC
VDS = 640V,ID = 7A, VGS = 10V
(Note 4,5)
QGS
8.2
QGD
Gate-Drain Charge
12
nC
2012. 07. 05
Revision No : 0
2/8
FTK8N80P/F/DD
(TJ
=
˚C ,
Otherwise specified.)
unless
25
ELECTRICAL CHARACTERISTICS
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX UNIT
DRAIN-SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS
VSD
IS
VGS = 0 V, IS = 7.0 A
Drain-Source Diode Forward Voltage
1.4
6.6
V
A
Maximum Continuous Drain-Source Diode
Forward Current
Maximum Pulsed Drain-Source Diode Forward
Current
ISM
26
A
tRR
VGS = 0 V, IS = 7.0A,
Reverse Recovery Time
650
7.0
ns
QRR
dIF/dt =100 A/µs (Note 4)
Reverse Recovery Charge
µC
Note:
1. Repetitive Rating : Pulse width limited by maximum junction temperature
2. L = 25mH, I AS
= 6.6A, VDD = 50V, RG = 25 Ω, Starting TJ = 25°C
μs, VDD ≤ BVDSS, Starting TJ = 25°C
3. ISD
≤ 8.0A, di/dt ≤ 200A/
4. Pulse Test: Pulse width ≤ 300μs, Duty cycle ≤ 2%
5. Essentially independent of operating temperature
2012. 07. 05
Revision No : 0
3/8
FTK8N80P/F/DD
Fig1. I - V
Fig2. I - V
D
D
GS
DS
100
10
V
DS
=30V
101
V
=10V
GS
V
V
=6V
GS
100 C
=5V
25 C
GS
100
1
10-1
0.1
0.1
10
Drain - Source Voltage VDS (V)
2
4
6
8
10
1
100
Gate - Source Voltage VGS (V)
Fig3. BV
- T
Fig4. R
- I
DS(ON) D
DSS
j
1.2
1.1
1.0
0.9
0.8
3.0
2.5
2.0
1.5
1.0
0.5
0
VGS = 0V
IDS = 250
V
GS
=6V
V
=10V
GS
100
-100
-50
0
50
150
0
2
4
6
8
10
12
Junction Temperature Tj (
)
Drain Current ID (A)
C
Fig6. R
- T
j
DS(ON)
Fig5. I - V
S
SD
102
101
100
10-1
3.0
2.5
2.0
1.5
1.0
0.5
0.0
V
=10V
= 7 A
GS
I
DS
100 C
25 C
-100
-50
0
50
100
150
0.4
0.6
0.8
1.0
1.2
(V)
1.4
Junction Temperature T (
)
C
Source - Drain Voltage VSD
j
2012. 07. 05
Revision No : 0
4/8
FTK8N80P/F/DD
Fig 7. C - V
DS
Fig8. Q - V
g
GS
104
103
102
101
12
ID=7A
10
8
C
C
iss
V
= 480V
DS
6
oss
4
2
C
rss
0
0
5
10 15 20 25 30 35 40 45
Gate - Charge (nC)
0
10
20
30
40
Q
g
Drain - Source Voltage VDS (V)
Fig10. Safe Operation Area
Fig9. Safe Operation Area
(FTK8N80P)
(FTK8N80F)
102
101
102
101
10µs
10µs
100µs
100µs
1ms
1ms
100
10-1
10-2
100
10-1
10-2
10ms
DC
10ms
Operation in this
Operation in this
area is limited by RDS(ON)
area is limited by RDS(ON)
DC
T = 25
C
c
C
T = 150
j
Single pulse
100
101
102
103
100
101
102
103
Drain - Source Voltage V (V)
DS
Drain - Source Voltage V (V)
DS
2012. 07. 05
Revision No : 0
5/8
FTK8N80P/F/DD
Fig11. Transient Thermal Response Curve
(FTK8N80P)
100
Duty=0.5
0 2
0.1
10-1
P
DM
t
1
t
2
- Rth(j-c) = 2.8 C/W Max.
- Duty Factor, D= t1/t2
Single Pulse
10-2
10-5
10-4
10-3
10-2
10-1
100
101
TIME (sec)
Fig12. Transient Thermal Response Curve
(FTK8N80F)
100
Duty=0.5
0 2
10-1
P
DM
0.1
t
1
0.05
t
0.02
2
- Rth(j-c) = 2.8 C/W Max.
- Duty Factor, D= t1/t2
Single Pulse
10-2
10-5
10-4
10-3
10-2
10-1
100
101
TIME (sec)
2012. 07. 05
Revision No : 0
6/8
FTK8N80P/F/DD
+
D.U.T.
VDS
-
+
-
L
RG
Driver
VDD
* dv/dt controlled by R
G
* ISD controlled by pulse period
* D.U.T.-Device Under Test
Same Type
as D.U.T.
VGS
Fig. 1A Peak Diode Recovery dv/dt Test Circuit
Period
P. W.
VGS
(Driver)
D=
P.W.
Period
10V
=
VGS
I
FM, Body Diode Forward Current
ISD
(D.U.T.)
di/dt
IRM
Body Diode Reverse Current
Body Diode Recovery dv/dt
VDS
(D.U.T.)
VDD
Body Diode
Forward Voltage Drop
Fig. 1B Peak Diode Recovery dv/dt Waveforms
2012. 07. 05
Revision No : 0
7/8
FTK8N80P/F/DD
TEST CIRCUITS AND WAVEFORMS (Cont.)
RL
VDS
VDS
90%
VDD
VGS
RG
10%
VGS
D.U.T.
10V
tD(ON)
tD(OFF)
Pulse Width ≤ 1μs
Duty Factor ≤ 0 1%
tF
tR
Fig. 2A Switching Test Circuit
Fig. 2B Switching Waveforms
Same Type
as D.U.T.
50kΩ
QG
12V
10V
0 3μF
0.2μF
VDS
QGS
QGD
VGS
DUT
VG
3mA
Charge
Fig. 3A Gate Charge Test Circuit
Fig. 3B Gate Charge Waveform
L
VDS
BVDSS
RD
VDD
10V
D.U.T.
tp
IAS
Time
tp
Fig. 4A Unclamped Inductive Switching Test Circuit
Fig. 4B Unclamped Inductive Switching Waveforms
2012. 07. 05
Revision No : 0
8/8
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