MB40874-P [FUJITSU]
PARALLEL, 4 BITS INPUT LOADING, 4-BIT DAC, PDIP20, PLASTIC, DIP-20;
| 型号： | MB40874-P |
| 厂家： | 
FUJITSU |
| 描述： | PARALLEL, 4 BITS INPUT LOADING, 4-BIT DAC, PDIP20, PLASTIC, DIP-20 输入元件 光电二极管 转换器 |
| 文件： | 总12页 (文件大小：196K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
August 1990
Edition 2.0
DATA SHEET
MB40874
CHANNEL 4-BIT D/A CONVERTER
1 CHANNEL 4–BIT D/A CONVERTER WITH LOOK–UP
TABLE (50 MSPS)
The Fujitsu MB40874 is a 50-MSPS (mega sample per second) 4-bit digital-
to-analog converter with look-up table (LUT). The MB40874 is designed for
high-speed video application with video RAM. The LUT is a 16-word, 4-bit
memory to store luminance data. Instead of changing video RAM data, LUT
data updating makes quick luminance changes in monochrome video ap-
plication and quick color changes in color video application.
• Resolution:
Linearity :
4 bits
•
"1/2 LSB maximum
50 MSPS minimum
4.0V to 5.0V
TTL compatible
+5V
• Operation frequency:
• Analog output voltage:
• Digital input:
• Power supply voltage:
• Power dissipation:
• Package:
430 mW typical
20-pin Cerdip (Suffix: –Z)
20-pin plastic DIP (Suffix: –P)
ABSOLUTE MAXIMUM RATINGS (see Note)
Rating
Symbol
Value
Unit
Power supply voltage
V
CCA
V
CCD
–0.5 to +7.0
V
Digital input voltage
Digital output voltage
V
–0.5 to +7.0
V
V
I
V
INA
–0.5 to V +0.5
CC
Plastic
–55 to +125
–65 to + 150
Storage temperature
T
STG
_C
Ceramic
Note :
Permanent device damage may occur if the above Absolute Maximum Ratings are exceeded. Functional
operation should be restricted to the conditions as detailed in the operational sections data sheet. Exposure
to absolute maximum rating conditions for extended periods may affect device reliability.
This device contains circuitry to protect the inputs against dam-
age due to high static voltages or electric fields. However, it is
advised that normal precautions be taken to avoid application of
any voltage higher than maximum rated voltages to this high
impedance circuit.
CopyrightE 1990 by FUJITSU LIMITED
MB40874
Figure 1. MB40874 Block Diagram
2
MB40874
PIN DESCRIPTION
Pin No.
1, 2, 18, 19
3
Pin Name
D0 to 03
CLK
Description
Data input/output to read/write LUT data
Clock Input for digital-to-analog operation; operation speed is dependent on this input. At the rising edge of
this input, A0 to A3, BLK, and SYNC are latched, and converted signal outputs at OUT.
4 to 7
A0 to A3
COMP
BLK
Address input for LUT; during displaying time, dot data from VRAM is input. During display’s flying line peri-
od, address is input in order to write or read the data of LUT.
8
9
Terminal for phase compensation capacitance; capacitance of 1 mF or more should be inserted between
COMP and A.GND.
Input to make OUT at blank level; when BLK is at low level, OUT is at blank level. When BLK is at high
level, content of LUT is converted and outputs at OUT.
10
11
12
13
15
A. GND
D.GND
OUT
Ground for analog circuit
Ground for digital circuit
Output of digital-to-analog converter; load resistance should be inserted between OUT and V
.
CC
R
Terminal for reference resistance; reference resistor should be inserted between R
and V
.
REF
REF
CCA
SYN
R/W
CS
C-input for exclusive-ORed vertical/horizontal synchronous signal; this input is used to obtain composite
output. SYNC input should be input while BLK is at low level.
16
Mode switch for read/write of LUT. This input is effective when CS is at low level. When R/W is at high level,
read mode is selected. When R/W is at low level, write mode is selected.
17
18
20
Chip select for LUT read/write mode
Power supply pin for analog circuit
Power supply pin for digital circuit
V
CCA
V
CCD
3
MB40874
RECOMMENDED OPERATING CONDITIONS
Value
Typ
Parameter
Symbol
Unit
Min
Max
1
Power supply voltage
V
CC
4.75
5.00
5.25
V
V
CCD
Output high current
Output low current
CLK frequency
I
–400
8
mA
mA
MHz
mF
OH
I
OL
f
50
CLK
Phase compensation capacitance
Operating temperature
C
1
0
COMP*
T
70
°C
A
*Phase compensation capacitance should connect between COMP and A.GND.
ELECTRICAL CHARACTERISTICS
ANALOG DC CHARACTERISTICS
(V = +5V "5%, T =0 to 70_C, unless otherwise noted)
CC
A
Value
Typ
Parameter
Symbol
Condition
Unit
Min
Max
4
Resolution
bits
LSB
mV
V
Linearity Error
LE
"1/2
WHITE level output voltage
BLACK level output voltage
BLANK level output voltage
SYNC level output voltage
DAC output voltage
V
W
V
–15
V
CCA
V
+15
CCA
CCA
V
B
4.357
4.286
V
V
BLANK
V
= 5.000V
CCA
R
V
SYNC
4.000
V
= 300W
REF
Output is pulled up to
at 37.5W
DV
0.9
236
5
1.0
1.1
V
DAC
SYNC
BLANK
V
CCA
SYNC output voltage
DV
DV
286
336
15
mV
IRE*
IRE*
BLANK output voltage
GRAY output voltage
10(71 mv)
90(634 mV)
DV
85
95
GRAY
*IRE: The ratio of a reflection signal composition (V
to V ) and a syncronous signal composition (V
to V
) is a 100:40 on ElA R5343A
BLANK
W
SYNC
BLANK
standard.1/140ofthesum(reflectionsignalcompositionandsynchronoussignalcomposition)isnamed1IRE,whichisusedasunitofareflection
signal.
4
MB40874
ELECTRICAL CHARACTERISTICS (Continued)
DIGITAL DC CHARACTERISTICS
(V = +5V "5%, T = 0 to 70_C, unless otherwise noted)
CC
A
Value
Typ
Parameter
Symbol
Condition
Unit
Min
Max
Input high voltage
V
2.0
V
V
V
IH
Input low voltage
V
0.8
–1.5
100
IL
Input cramp voltage
V
IC
V
= 4.75V, I = -18mA
CC I
V = 7V
I
Input high current
I
IH
V
CC
= 5.25V
mA
V = 2.7V
I
20
Input low current
I
VCC = 5.25V
0.4
V
V
IL
1
Output high voltage
V
OH
V
CC
= 4.75V, I = –400 mA
2.7
3.4
OH
2
I
4mA
0.25
0.4
0.5
OL =
Output low voltage
Output short current
V
V
= 4.75V
V
OL
CC
2
I
OL
= 8mA
0.35
3
I
V
CC
= 5.25V
–20
–100
100
–20
120
mA
OS
Output current
Off condition (Hi–Z)
V = 2.4V
0
l
V
CC
= 5.25V
= 5.25V
mA
OZ
V = 0.4V
0
Power Supply Current
I
V
CC
mA
CC
1
Except common I/O of D to D
0
3
2
3
V
=+5V, T = 25_C
CC
A
Time of output short should be within 1 second
SWITCHING CHARACTERISTICS
VIDEO OUTPUT
(V = +5.0V "5%, T = 0_C to +70_C, unless otherwise noted.)
CC
A
Value
Typ
Parameter
Symbol
Unit
Min
20
7
Max
CLK cycle time
t
ns
ns
ns
ns
ns
ns
ns
ns
CLK
CLK high pulse width
t
+
–
WCLK
CLK low pulse width
t
7
WCLK
Address. BLK, SYNC high pulse width
Address. BLK. SYNC low pulse width
Address, BLK, SYNC setup time
Address, BLK. SYNC hold time
Propagation time
twv+
18
18
6
t
–
WV
t
SV
t
3
HV
PD
t
25
5
MB40874
ELECTRICAL CHARACTERISTICS, continued
SWITCHING CHARACTERISTICS, continued
LUT Access (Read)
(V = +5.0V "5%, T = 0_C to +70_C, unless otherwise noted.)
CC
A
Value
Typ
Parameter
Symbol
Unit
Min
100
10
Max
CS pulse width low level time
R/W setup time
t
t
ns
ns
ns
ns
ns
ns
ns
ns
ns
WCSR
SRWR
HRWR
R/W hold time
t
10
BLK setup time
t
2ꢀt
CLK
+6
SBR
BLK hold time
t
t
+3
HBR
CLK
Address setup time
Address hold time
Data setup time
Data hold time
t
2ꢀt
CLK
+6
SAR
HAR
DEN
t
t
t
+3
CLK
50
50
t
15
DDIS
LUT Access (Write)
Parameter
(V = +5.0V "5%, T = 0_C to +70_C, unless otherwise noted.)
CC
A
Value
Typ
Symbol
Unit
Min
100
10
Max
CS pulse width low level time
R/W setup time
t
t
ns
ns
ns
ns
ns
ns
ns
ns
ns
WCSW
SRWW
HRWW
R/W hold time
t
10
BLK setup time
t
2ꢀt
CLK
+6
SBW
HBW
BLK hold time
t
t
+3
CLK
Address setup time
Address hold time
Data setup time
Data hold time
t
2ꢀt
CLK
+6
SAW
t
t
+3
HAW
CLK
t
10
10
SD
t
HD
6
MB40874
Figure 2. Video Output Timing Diagram
Figure 3. LUT Access (Read) Timing Diagram
Figure 4. LOT Access (Write) Timing Diagram
7
MB40874
* Don’t Care
Output is pulled up to V
at 37.5W
CCA
Figure 5. DAC Output Voltage
8
MB40874
Figure 6. MB40874 Connection Circuit Example
9
MB40874
Figure 7. Application Information
The above application is an example of RGB system using three pieces of MB40874. The system allows user to simultaneously dis-
play whole 4096 type of color defined by the bit number of LUT and D/A converter and promptly change color tone.
10
MB40874
PACKAGE DIMENSIONS
11
MB40874
All Rights Reserved. Circuit diagrams utilizing Fujitsu products are in-
cluded as a means of illustrating typical semiconductor applications.
Completeinformationsufficient for construction purposes is not neces-
sarilygiven.Theinformationcontainedinthisdocumenthasbeencare-
fully checked and is believed to be reliable. However, Fujitsu assumes
no responsibility for inaccuracies.
The information contained in this document does not convey any license
under the copyrights, patent rights or trademarks claimed and owned by
Fujitsu. Fujitsu reserves the right to change products or specifications
withoutnotice. No part of this publication may be copied or reproduced in
any form or by any means, or transferred to any third party without prior
written consent of Fujitsu.
For further information please contact:
Japan
Europe
FUJITSU LIMITED
FUJlTSU MlKROELEKTRONiK GmbH
Arabella Centre 9.OG
Lyoner Strasse 44-48
D-6000 Frankfurt 71
Integrated Circuits and Semiconductor Marketing
Furukawa Sogo Bldg., 6–1, Marunouchi 2–chome
Chiyoda–ku, Tokyo 100, Japan
Tel: (03) 3216–3211
F.R. Germany
Telex: 781–2224361
FAX: (03) 3216–9771
Tel:
Telex:
(069) 66320
411963 FAX: (069) 6632122
North and South America
Asia
FUJITSU MICROELECTRONICS, INC.
Semiconductor Division
3545 North First Street
San Jose, CA 95134–1804 USA
Tel: 408 –922–9000
FUJITSU MICROELECTRONICS ASIA PTE LIMITED
51 Bras Basah Road,
Plaza By The Park,
#06–04/07,
Singapore 0718
Telex: 910–671–4915
FAX: 408–432–9044
Tel: 336–1600
Telex: 55573 FAX: 336–1609
Printed in Japan AV0040-908A
12
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