MB84VZ128A [FUJITSU]

Memory IC;
MB84VZ128A
型号: MB84VZ128A
厂家: FUJITSU    FUJITSU
描述:

Memory IC

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MB84VZ128A  
New products  
Stacked MCP Mounted with  
128M-bit (×16) Page Mode  
NOR-type Dual Operation Flash  
Memories (2 chips), 16M-bit (×16)  
TM  
Mobile FCRAM , and  
4M-bit (×16) SRAM  
MB84VZ128A  
This is an MCP with a 256M-bit ROM and 20M-bit RAM.  
The combined density, 276M-bit, is the world's largest density for mobile purposes.  
The Flash Memory has the Page Mode capable of high-speed read-out at 25ns.  
Product Description  
terminals grow more sophisticated, so grows the demand for  
mobile terminal memory with increased density, low power  
Mobile terminal functions have advanced remarkably in  
recent years. Beyond the simple call functions, today's users  
have their choice of a dizzying array of functions, including  
Java applications, music playback and distribution, GPS,  
and shoot/transmit/receive functions with digital images.  
Some of the mobile terminals now on the market incorporate  
almost every function that today's technologies allow them  
to perform. These terminals are even being used to store and  
browse web contents without the help of personal computers.  
And the development of these terminals is expected to be  
just as radical in the future as it has been up to now. Motion  
image distribution and other applications requiring higher  
bit rates and higher-speed processing functions are growing  
more commonplace, and newer mobile devices are being  
designed to meet the hardware requirements. As mobile  
Photo 1 External View  
2002 No.2  
FIND Vol.20  
69  
MB84VZ128A  
New products  
consumption, high speed, miniaturization, and consolidation of  
multiple memory types within single memory package.  
FUJITSU has been providing highly advanced stacked MCP  
memories optimal for storage of application data. The Flash  
Memory has the page access mode, and its page access time  
achieves 25ns, effectively tripling the access speeds of today's  
conventional products (a conventional 64M-bit flash memory  
has a random access time of 70ns). The additional 16M-bit  
FCRAM mounted in the package is optimal for the storage of  
temporary memory for large application or data rewrites, and  
the 4M-bit SRAM can be used as a work memory for Base  
Band working consistently. With these advantages, the  
MB84VZ128A dramatically improves mobile terminal  
performance and is optimal for the newer functions in the  
mobiles terminals of the next generation.  
(Multi Chip Package) products to meet the market demand.  
_
_
_
FUJITSU has now developed the remarkable MB84VZ128A  
the world's very first stacked MCP mounted with two 128M-bit  
page mode NOR-type flash memories, a low-power-  
consumption 16M-bit Mobile FCRAM*1 for mobile  
applications, and a 4M-bit SRAM as supplemental memory for  
mobile terminals. This new package provides an impressive non-  
volatile memory domain of 256M-bit the largest MCP density  
in the world by mounting two 128M-bit NOR-type flash  
Figure 1 Pin Assignments  
(Top view)  
Stamped Surface  
M18  
A18  
B18  
N.C.  
B17  
N.C.  
B16  
L18  
N.C.  
L17  
N.C.  
A17  
N.C.  
A16  
N.C.  
M17  
N.C.  
L16  
N.C.  
M16  
N.C.  
A15  
N.C.  
B15  
N.C.  
L15  
N.C.  
M15  
N.C.  
A14  
N.C.  
B14  
N.C.  
L14  
N.C.  
M14  
N.C.  
M13  
C14  
D14  
E14  
N.C.  
E13  
A21  
E12  
J14  
N.C.  
J13  
F14  
N.C.  
F13  
G14  
N.C.  
G13  
H14  
N.C.  
H13  
K14  
N.C.  
K13  
N.C.  
K12  
N.C.  
A13  
N.C.  
B13  
N.C.  
C13  
N.C.  
D13  
N.C.  
L13  
N.C.  
N.C.  
B12  
N.C.  
B11  
N.C.  
B10  
N.C.  
B9  
N.C.  
C12  
A15  
D12  
A12  
D11  
A22  
F12  
A16  
G12  
N.C.  
H12  
VSS  
J12  
N.C.  
L12  
N.C.  
A11  
C11  
A8  
A13  
E11  
A14  
F11  
N.C. DQ15 DQ7 DQ14 N.C.  
G11  
DQ6 DQ13 DQ12 DQ5  
G10 H10  
J10  
H11  
J11  
K11  
L11  
N.C.  
L10  
N.C.  
L9  
A19  
D10  
A9  
A10  
F10  
C10  
WE  
C9  
E10  
K10  
CE2r A20  
D9  
E9  
N.C. CE2s DQ4 VCCr N.C.  
F9  
G9 H9 J9  
K9  
CEf_2 ACC RESET_1 RY/BY_1 CE1s VCCs DQ3 VCCf_1 DQ11 VCCf_2  
C8  
RY/BY_2 LB  
B8  
E8  
A18  
E7  
F8  
A17  
F7  
G8  
DQ1  
G7  
H8  
J8  
L8  
D8  
UB  
D7  
K8  
DQ9 DQ10 DQ2 VSS  
C7  
A7  
C6  
H7  
OE  
H6  
B7  
VSS  
B6  
J7  
DQ0  
J6  
K7  
L7  
A6  
A5  
A4  
VSS  
G6  
DQ8 RESET_2  
E6  
M6  
A6  
N.C.  
A5  
D6  
F6  
K6  
L6  
N.C.  
N.C.  
C5  
A3  
A2  
E5  
A1  
A0  
CEf_1 CE1r  
N.C. N.C.  
N.C.  
M5  
F5  
G5  
J5  
K5  
L5  
D5  
H5  
N.C.  
A4  
N.C.  
N.C.  
N.C.  
N.C.  
N.C.  
N.C.  
N.C.  
N.C.  
N.C.  
L4  
N.C.  
M4  
B4  
N.C.  
A3  
N.C.  
B3  
N.C.  
L3  
N.C.  
M3  
N.C.  
A2  
N.C.  
B2  
N.C.  
L2  
N.C.  
M2  
N.C.  
A1  
N.C.  
B1  
N.C. N.C..  
M1  
L1  
N.C.  
N.C.  
N.C.  
N.C.  
70  
FIND Vol.20  
No.2 2002  
MB84VZ128A  
New products  
Product Features  
A common assignment for stacked MCPs has been adopted  
for signal pin assignments (also compatible with conventional  
4-chip MCP).  
Product Configuration  
128M-bit NOR-type page read mode dual operation flash  
memory (×16) ×2 chips  
16M-bit mobile FCRAM (×16)  
4M-bit SRAM (×16)  
Access Time  
Page Read Access: 25ns (NOR-type flash memory, 8 Word  
Page)  
Random Read Access: 85ns (NOR-type flash memory)  
Random Read Access: 85ns (mobile FCRAM)  
Random Read Access: 70ns (SRAM)  
Package  
Package: FBGA -139 ball  
*2  
(Signal ball, 96; reinforcement ball, 43)  
Size: 15mm×11mm×1.4 (t) mm  
Operation Power Supply Voltage: Vcc2.7V to 3.1V  
Figure 2 Block Diagram  
Vccf_1 Vss  
A22 to A0  
A22 to A0  
RY/BY_1  
DQ15 to  
DQ0  
128M-bit  
Page Mode  
Flash Memory 1  
/CEf_1  
/OE  
/WE  
DQ15 to DQ0  
ACC  
/RESET_1  
Vccf_2 Vss  
A22 to  
A0  
RY/BY_2  
DQ15 to  
DQ0  
128M-bit  
Page Mode  
Flash Memory 2  
/CEf_2  
/RESET_2  
Vccr Vss  
A19 to  
A0  
DQ15 to  
DQ0  
/CE1r  
CE2r  
16M-bit  
Mobile FCRAM  
/UB  
/LB  
Vccs Vss  
A17 to  
A0  
DQ15 to  
DQ0  
/CE1s  
CE2s  
4M-bit SRAM  
2002 No.2  
FIND Vol.20  
71  
MB84VZ128A  
New products  
Low Power Consumption  
Standby Current:  
Future Development  
5μA at maximum (NOR-type flash memory / 1 chip  
70μA at maximum (mobile FCRAM),  
7μA at maximum (SRAM)  
This article has introduced the stacked MCP mounted  
with two 128M-bit page mode NOR-type flash memories, a  
16M-bit mobile FCRAM, and a 4M-bit SRAM as a memory  
solution for the coming generation of mobile devices. As a  
total memory solution supplier, FUJITSU will continue to  
develop and provide advanced MCP products that will  
Read-out Operation:  
60mA at maximum (NOR-type flash memory at initial  
stage of page read)  
20mA at maximum (mobile FCRAM)  
40mA at maximum (SRAM)  
Write/Erase Operation:  
35mA at maximum (NOR-type flash memory)  
Number of Erase/Write Times:  
100 thousand times (NOR-type flash memory)  
match the evermore demanding needs of the market.  
NOTES  
1: Mobile FCRAM: A large density, low-power pseudo SRAM  
which consists of an FCRAM core with an asynchronous  
SRAM interface.  
*
*
*
2: FBGA (Fine-pitch Ball Grid Array): A type of surface-mounting  
_
_
_
_
Fig. 1 shows the pin assignments, Fig. 2 the block diagram,  
and Fig. 3 the package external dimension diagram.  
package.  
FCRAM (Fast Cycle RAM) is a registered trademark of FUJITSU  
_
_
_
LIMITED.  
Figure 3 Package External Dimension Diagram  
139-φ0.4000..0105  
M
0.08  
S AB  
11.00±0.10  
0.20 S B  
B
+0.15  
1.25 -0.10 SEATED HEIGHT)  
0.4  
REF  
0.8  
REF  
18  
17  
16  
15  
14  
13  
12  
11  
10  
9
0.8  
REF  
A
15.00±0.10  
8
7
0.4  
REF  
6
5
4
0.10(.004)S  
3
2
1
M L  
K J H G F E D C B A  
0.10±0.05  
INDEX-MARK AREA  
(STAND OFF)  
0.20  
S
A
S
FBGA-139,BGA-139P-M01  
0.08  
S
72  
FIND Vol.20  
No.2 2002  

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