MB89190A [FUJITSU]
8-bit Proprietary Microcontroller CMOS; 8位微控制器的专有CMOS
| 型号： | MB89190A |
| 厂家： | 
FUJITSU |
| 描述： | 8-bit Proprietary Microcontroller CMOS |
| 文件： | 总41页 (文件大小：401K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
FUJITSU SEMICONDUCTOR
DATA SHEET
DS07-12512-8E
8-bit Proprietary Microcontroller
CMOS
F2MC-8L MB89190/190A Series
MB89191/193/195/P195/PV190
MB89191A/191AH/193A/193AH/195A/P195A/PV190A
■ OUTLINE
The MB89190/190A series microcontrollers contain various resources such as timers, serial interfaces, A/D
converters, external interrupts, and remote-control functions, as well as an F2MC*-8L CPU core for low-voltage
and high-speed operations. These single-chip microcontrollers are suitable for small devices such as remote
controllers with compact packages.
*: F2MC stands for FUJITSU Flexible Microcontroller.
■ FEATURES
• Minimum execution time: 0.95 µs at 4.2 MHz (VCC = 2.7 V)
• F2MC-8L family CPU core
• Two timers
8/16-bit timer/counter
20-bit timebase counter
• Serial interface
8-bit synchronous serial (Selectable transfer direction allows communication with various equipment.)
(Continued)
■ PACKAGE
28-pin Plastic SOP
28-pin Plastic DIP
28-pin Plastic SH-DIP
48-pin Ceramic MQFP
(FPT-28P-M17)
(DIP-28P-M05)
(DIP-28P-M03)
(MQP-48C-P01)
MB89190/190A Series
(Continued)
• External interrupts
Edge detection (Selectable edge): 3 channels
Low-level interrupt (Wake-up function): 8 channels
• A/D converter (MB89190A series only)
8-bit successive approximation type: 8 channels
• Built-in remote-control transmitting frequency generator
• Low-power consumption modes
Stop mode (Almost no current consumption occurs because oscillation stops.)
Sleep mode (The current consumption is reduced about 1/3 of that during normal operation because the CPU
stops.)
• Packages
SOP-28, SH-DIP-28, and DIP-28
■ PRODUCT LINEUP
Part number
MB89191
MB89191A
MB89191AH
MB89193
MB89193A
MB89193AH
MB89195
MB89195A
MB89P195
MB89P195A
MB89PV190
MB89PV190A
Item
Classification
ROM size
One-time
product
For
Mask ROM products
development
and evaluation
4 K × 8 bits
(internal mask
ROM)
8 K × 8 bits
(internal mask
ROM)
16 K × 8 bits
(internal mask
ROM)
16 K × 8 bits
(internal PROM, (external ROM)
to be
32 K × 8 bits
programmed
with general-
purpose
EPROM
programmer)
RAM size
128 × 8 bits
256 × 8 bits
136
8 bits
1 to 3 bytes
CPU functions
The number of basic instructions:
Instruction bit length:
Instruction length:
Data bit length:
Minimum execution time:
Interrupt processing time:
1, 8, and 16 bits
0.95 µs at 4.2 MHz
8.57 µs at 4.2 MHz
Ports
Output port (N channel open drain): 4 (also serves as peripherals for MB89190A
series)or 6 (for MB89190 series)
I/O port (CMOS):
Total:
16 (also serves as peripherals)
20 or 22
Timer counter
Serial I/O
2 channels of 8-bit timer counter or one 16-bit event counter (operation clock: 1.9 µs, 30.4
µs, and 487.6 µs at 4.2 MHz, and external clock)
8 bits
LSB/MSB first selectable
Transfer clock (external, 1.9 µs, 7.6 µs, 30.4 µs at 4.2 MHz)
A/D converter
(MB89190A series
only)
8 bits x 8 channels
A/D conversion mode (conversion time: 41.9 µs at 4.2 MHz)
Sense mode (conversion time: 11.9 µs at 4.2 MHz)
Capable of continuous activation by an internal timer.
Reference voltage input
(Continued)
2
MB89190/190A Series
(Continued)
Part number
MB89191
MB89191A
MB89191AH
MB89193
MB89193A
MB89193AH
MB89195
MB89195A
MB89P195
MB89P195A
MB89PV190
MB89PV190A
Item
External interrupt 1 3 independent channels (selectable edge, interrupt vector, and interrupt source flag)
Rising/falling/both edge selectable
Used for wake-up from stop/sleep mode. (Edge detection is also permitted in the stop
mode.)
External interrupt 2
8 channels (low-level interrupt only)
(Wake-up function)
Remote-control
transmitting
The pulse width and cycle are software-programmable.
frequency generator
Standby mode
Process
Sleep mode and stop mode
CMOS
Operating voltage*
EPROM for use
2.2 V to 6.0 V
2.7 V to 6.0 V
MBM27C256A-
20TVM
*: Varies with conditions such as operating frequencies (see “■ Electrical Characteristics.”) It differs from the
operating voltage of an A/D converter.
■ PACKAGE AND CORRESPONDING PRODUCTS
MB89191
MB89191A
MB89191AH
MB89193
MB89193A
MB89193AH
MB89195
MB89P195
MB89P195A
MB89PV190
MB89PV190A
Package
MB89195A
DIP-28P-M05
DIP-28P-M03
FPT-28P-M17
MQP-48C-P01
×
×
×
*
×
×
×
: Available
× : Not available
* : A socket (manufacturer: Sun Hayato Co., Ltd.) for pin pitch conversion is available.
48QF-28SOP-8L: (MQP-48C-P01) → for conversion to FPT-28P-M17
Inquiry: Sun Hayato Co., Ltd.: TEL (81)-3-3986-0403
FAX (81)-3-5396-9106
Note: For more information on each package, see “■ Package Dimensions.”
3
MB89190/190A Series
■ DIFFERENCES AMONG PRODUCTS
1. Memory Size
Before evaluating using the piggyback model, verify its difference from the model that will actually be used.
Take particular care on the following points:
• On the MB89191/191A, addresses 0140H to 0180H cannot be used for register banks.
• The stack area, etc., is set in the upper limit of the RAM.
2. Current Consumption
• In the case of MB89PV190/PV190A, added is the current consumed by the EPROM which is connected to
the top socket.
• When operated at low speed, the products with an OTPROM (EPROM) will consume more current than the
products with a mask ROM.
However, the same is current consumption in the sleep/stop mode. (For more information, see “■ Electrical
Characteristics.”)
3. Mask Options
Functions that can be selected as options and how to designate these options vary with product.
Before using options, check “■ Mask Options.”
Take particular care on the following points:
• Pull-up resistor optional cannot be set for P00 to P03, and P40 to P45 on the MB89191A/193A/195A/P195A.
• The power-on reset option is fixed as “enabled” for MB89P195/P195A.
• Options are fixed on the MB89PV190/PV190A.
4. MB89191AH/MB89193AH
MB89191AH/193AH are “L” level heavy output current drive type of P30 to P32 and P40 to P43 of MB89191A/
193A.Characteristics other than “L” level output of P30 to P32 and P40 to P43 are the same as MB89191A/193A.
4
MB89190/190A Series
■ PIN ASSIGNMENT
(TOP VIEW)
P04/INT24
P05/INT25
P06/INT26
P07/INT27
TEST
1
28
27
26
25
24
23
22
21
20
19
18
17
16
15
VCC
2
P03/INT23/AN7
P02/INT22/AN6
P01/INT21/AN5
P00/INT20/AN4
P45/AVR
3
4
5
RST
6
X0
7
P44/AVSS
P43/AN3
X1
8
VSS
9
P42/AN2
P37/BZ/RCO
P36/INT12
P35/INT11
P34/TO/INT10
P33/EC
10
11
12
13
14
P41/AN1
P40/AN0
P30/SCK
P31/SO
P32/SI
(FPT–28P–M17)
(DIP–28P–M03)
(DIP–28P–M05)
5
MB89190/190A Series
(Top view)
P34/TO/INT10
P33/EC
1
36
35
34
33
32
31
30
29
28
27
26
25
N. C.
2
N. C.
69
70
71
72
73
74
75
76
60
59
58
57
56
55
54
53
P32/SI
3
P36/INT12
P37/BZ/RCO
X1
P31/SO
4
P30/SCK
P40/AN0
P41/AN1
P42/AN2
P43/AN3
P44/AVSS
P45/AVR
P00/INT20/AN4
5
Each pin inside the dashed line
is for MB89PV190/PV190A
units only.
6
X0
7
RST
8
TEST
9
P07/INT27
P06/INT26
P05/INT25
P04/INT24
10
11
12
(MQP-48C-P01)
• Pin assignment on the package top (MB89PV190/PV190A only)
Pin no.
49
Pin name
VPP
Pin no.
57
Pin name
N.C.
A2
Pin no.
65
Pin name
O4
Pin no.
Pin name
OE
73
74
75
76
77
78
79
80
50
A12
A7
58
66
O5
N.C.
A11
A9
51
59
A1
67
O6
52
A6
60
A0
68
O7
53
A5
61
O1
69
O8
A8
54
A4
62
O2
70
CE
A13
A14
VCC
55
A3
63
O3
71
A10
N.C.
56
N.C.
64
VSS
72
N.C.: Internally connected. Do not use.
6
MB89190/190A Series
■ PIN DESCRIPTION
Pin no.
Circuit
type
Pin name
X0
Function
SOP*1, DIP*2
MQFP*4
SH-DIP*3
7
8
5
31
32
29
A
Clock oscillation pins
X1
TEST
B
C
Test input pin
Connect directly to VSS.
6
30
RST
Reset I/O pin
This pin consists of an N-ch open-drain output with
a pull-up resistor and of hysteresis input. A low
level is output from this pin by internal source. The
internal circuit is initialized by the input of a low
level.
24 to 27
12
P00/INT20/
AN4 to P03/
INT23/AN7
G
General-purpose I/O ports
13,
23,
24
Also serve as external interrupt input pins. In the
MB89190A series, also serve as analog input pins.
External interrupt input is of hysteresis input type.
1 to 4
17
25 to 28
P04/INT24 to
P07/INT27
D
D
General-purpose I/O ports
Also serve as external interrupt input.
External interrupt input is of hysteresis input type.
5
P30/SCK
General-purpose I/O port
Also serves as clock I/O for the 8-bit serial I/O
interface.
The serial I/O clock input is of hysteresis input type
with a built-in noise filter.
16
15
4
3
P31/SO
P32/SI
E
D
General-purpose I/O port
Also serves as a serial I/O data output pin.
General-purpose I/O port
Also serves as a serial I/O data input pin.
The serial I/O data input is of hysteresis input type
with a built-in noise filter.
14
13
2
1
P33/EC
D
D
General-purpose I/O port
Also serves as an external clock input pin for the 8-
bit timer/counter.
External clock input of the 8-bit timer/counter is
hysteresis input type with a built-in noise filter.
P34/TO/
INT10
General-purpose I/O port
Also serves as the overflow output and external
interrupt input for the 8-bit timer/counter.
External interrupt input is of hysteresis input type
with a built-in noise filter.
(Continued)
*1: FPT-28P-M17
*2: DIP-28C-M05
*3: DIP-28P-M03
*4: MQP-48C-P01
7
MB89190/190A Series
(Continued)
Pin no.
Circuit
type
Pin name
Function
General-purpose I/O port
Also serve as external interrupt input pins.
External interrupt input is of hysteresis input type
with a built-in noise filter.
SOP*1, DIP*2
MQFP*4
SH-DIP*3
12
11
48
34
P35/INT11
P35/INT12
D
10
18 to 21
23
33
6 to 9
11
P37/BZ/RCO
E
F
F
General-purpose I/O port
Also serves as a buzzer output pin and remote-
control output pin.
P40/AN0 to
P43/AN3
N-ch open-drain output ports
Also serve as analog input pins for the A/D
converter.
P45/AVR
In the MB89190A series, also serves as a
reference voltage input pin for the A/D converter.
In the MB89190 series, serves as an N-ch open-
drain output port.
22
10
P44/AVSS
F
In the MB89190A series, also serves as a power
pin for the A/D converter, and should be applied the
same voltage as VSS to.
In the MB89190 series, also serves as an N-ch
open-drain output port.
28
9
18
42
VCC
VSS
—
—
Power supply pin
Power supply (GND) pin
*1: FPT-28P-M17
*2: DIP-28P-M05
*3: DIP-28P-M03
*4: MQP-48C-P01
8
MB89190/190A Series
• External EPROM pins (MB89PV190/PV190A)
Pin no.
Pin name
I/O
O
Function
49
VPP
“H” level output pin
Address output pins
79
78
50
75
71
76
77
51
52
53
54
55
58
59
60
A14
A13
A12
A11
A10
A9
O
A8
A7
A6
A5
A4
A3
A2
A1
A0
61
62
63
65
66
67
68
69
O1
O2
O3
O4
O5
O6
O7
O8
I
Data input pins
70
CE
O
O
ROM chip enable pin
Outputs “H” during standby.
73
OE
ROM output enable pin
Outputs “L” at all times.
80
64
VCC
O
O
EPROM power pin
VSS
Power supply (GND) pin
9
MB89190/190A Series
■ I/O CIRCUIT TYPE
Type
Circuit
Remarks
A
• Oscillation feedback registor of approximately
1 MΩ at 5 V
X1
X0
• When crystal and ceramic oscillators are selected
optionally
Standby control signal
X1
X0
Standby control signal
• When CR oscillation is selected optionally
B
C
• Output pull-up resistor (P-ch): Approx. 50 kΩ at 5 V
• Hysteresis input
R
P-ch
N-ch
D
• CMOS output
• CMOS input
• Hysteresis input (resource input)
R
P-ch
P-ch
N-ch
• Pull-up resistor optional
(Continued)
10
MB89190/190A Series
(Continued)
Type
Circuit
Remarks
E
• CMOS output
• CMOS input
R
P-ch
P-ch
N-ch
• Pull-up resistor optional
F
• N-ch open-drain output
• Analog input
R
Pch
Nch
Analog input
• Pull-up resistor optional (MB89190 series only)
G
• CMOS output
• CMOS input
R
• Hysteresis input (resource input)
• Analog input
P-ch
P-ch
N-ch
Analog input
• Pull-up resistor optional (MB89190 series only)
11
MB89190/190A Series
■ HANDLING DEVICES
1. Preventing Latch-up
Latchup may occur on CMOS ICs if voltage higher than VCC or lower than VSS is applied to input or output pins
other than medium- and high-voltage pins or if higher than the voltage which shows on “ 1. Absolute Maximum
Ratings” in “■ Electrical Characteristics” is applied between VCC to VSS.
When latchup occurs, power supply current increases rapidly and might thermally damage elements. When
using, take great care not to exceed the absolute maximum ratings.
Also, take care to prevent the analog power supply (AVCC and AVR) and analog input from exceeding the digital
power supply (VCC) when the analog system power supply is turned on and off.
2. Treatment of Unused Input Pins
Leaving unused input pins open could cause malfunctions. They should be connected to pull-up or pull-down
resistor.
3. Treatment of Power Supply Pins on Microcontrollers with A/D and D/A Converters
Connect to be AVCC=DAVC=VCC and AVSS=AVR=VSS even if the A/D and D/A converters are not in use.
4. Treatment of N.C. Pin
Be sure to leave (internally connected) N.C. pins open.
5. Power Supply Voltage Fluctuations
Although operation is assured within the rated range of VCC power supply voltage, a rapid fluctuation of the
voltage could cause malfunctions within the rated range. Stabilizing voltage supplied to the IC is therefore
important. As stabilization guidelines, it is recommended to control power so that VCC ripple fluctuations (P-P
value) will be less than 10% of the standard VCC value at the commercial frequency (50 to 60 Hz) and the transient
fluctuation rate will be less than 0.1 V/ms at the time of a momentary fluctuation such as when power is switched.
6. Precautions when Using an External Clock
Even when an external clock is used, oscillation stabilization time is required for power-on reset (optional) and
release from stop mode.
12
MB89190/190A Series
■ PROGRAMMING TO PROM ON THE MB89P195/P195A
The MB89P195/P195A can program data in the internal PROM using a dedicated conversion adaptor and
specified general-purpose EPROM programmer.
1. Memory Space
Address in normal operation mode
EPROM mode
(Corresponding addresses on the EPROM programmer)
0000 H
I/O
0080 H
0180 H
RAM
8000 H
C000 H
Not available
0000 H
Vacancy
(Read value FFH)
4000 H
PROM
16 K
EPROM
16 K
FFFF H
7FFF H
• Programming procedure
(1) Load program data into the ROM programmer at addresses 4000H to 7FFFH. (Addresses 0C000H to 0FFFFH
in the operation mode correspond to 4000H to 7FFFH in ROM programmer. See the illustration above.)
(2) Set the data at addresses 0000H to 3FFFH of the programmer ROM in the ROM programmer, to FFH.
(3) Program in the successive-address write mode of the ROM programmer.
Note: Program must be started at the address 00000H.
For details, contact our Sales Division.
13
MB89190/190A Series
2. Recommended Screening Conditions
High-temperature aging is recommended as the pre-assembly screening procedure for a product with a blanked
OTPROM microcontroller program.
Program, verify
Aging
+150 °C for 48 h
Data verification
Assembly
3. Programming Yield
Due to its nature, bit programming test can’t be conducted as Fujitsu delivery test. For this reason, a programming
yield of 100% cannot be assured at all times.
4. EPROM Programmer Socket Adapter
Recommended programmer manufacturer
and programmer name
Compatible
socket
Minato
Data I/O Co., Ltd.
Electronics Inc.
Part no.
Package
adapter
MODEL1890A
(ver.2.2)
+
Sun Hayato
Co., Ltd.
UNISITE
(ver.5.0 or
later)
3900
(ver.2.8 or
later)
2900
(ver.3.8 or
later)
OU-910
(ver.4.1)
MB89P195
ROM-28DP-
28DP-8L
DIP-28
Recommended
Recommended
Recommended
Recommended
MB89P195A
MB89P195PF
MB89P195APF
ROM-28SOP-
28DP-8L
SOP-28
Inquiry: Sun Hayato Co., Ltd.:
TEL: (81)-3-3986-0403
FAX: (81)-3-5396-9106
Minato Electronics Inc.: TEL: USA (1)-916-348-6066
JAPAN (81)-45-591-5611
Data I/O Co., Ltd.:
TEL: USA/ASIA (1)-206-881-6444
EUROPE (49)-8-985-8580
14
MB89190/190A Series
■ PROGRAMMING TO THE EPROM WITH PIGGYBACK/EVALUATION DEVICE
1. EPROM for Use
MBM27C256A-20TVM
2. Programming Socket Adapter
To program to the EPROM using an EPROM programmer, use the socket adapter (manufacturer: Sun Hayato
Co., Ltd.) below.
Package
Adapter socket part number
LCC-32
ROM-32LC-28DP-YS
Inquiry: Sun Hayato Co., Ltd.: TEL (81)-3-3986-0403
FAX (81)-3-5396-9106
3. Memory Space
Address in normal operation mode
Address when writing to EPROM
(Corresponding addresses on the EPROM programmer)
0000 H
0080 H
I/O
RAM
0180 H
8000 H
Not available
0000 H
EPROM
32 K
PROM
32 K
FFFF H
7FFF H
4. Programming to the EPROM
(1) Set the EPROM programmer for MBM27C256A.
(2) Load program data into the EPROM programmer at 0000H to 7FFFH.
(3) Program to 0000H to 7FFFH with the EPROM programmer.
15
MB89190/190A Series
■ BLOCK DIAGRAM
X0
X1
Oscillator
(Max. 4.2 MHz)
Timebase timer
Clock control
Reset circuit
(WDT)
RST
CMOS I/O port
P34/TO
/INT10
8-bit timer/counter
8-bit timer/counter
4
4
External interrupt
(Wake-up)
P04/INT24 to
P07/INT27
P33/EC
P00/INT20/AN4 to
P03/INT23/AN7
P30/SCK
P32/SI
8-bit
serial
8-bit A/D converter
(MB89190A only)
P31/SO
P45*/AVR
P44*/AV SS
P35/INT11
P36/INT12
External interrupt
P40/AN0 to
P43/AN3
4
Remote-control
transmit frequency
generator
N-ch open-drain output port
P37/BZ/RCO
Buzzer output
CMOS I/O port
RAM
F2MC-8L
CPU
ROM
*:
In the MB89190A series, P44 and P45 serve only as
AVR and AV ss pins, respectively, and cannot be used as ports.
The MB89190 has no built-in A/D converter.
The other pins
TEST, VCC, V SS
16
MB89190/190A Series
■ CPU CORE
1. Memory Space
The microcontrollers of MB89190/190A series offer a 64 Kbytes of memory for storing all of I/O, data, and
program areas. The I/O area is allocated from the lowest address. The data area is allocated immediately above
the I/O area. The data area can be divided into register, stack, and direct areas according to the application.
The program area is allocated from exactly the opposite end of I/O area, that is, the highest address. The tables
of interrupt reset vectors, and vector call instructions are allocated from the highest address within the program
area. The memory space of the MB89190/190A series is structured below:
Memory Space
MB89191/191A
MB89193/193A
MB89195/195A
MB89PV190/PV190A
MB89P195/P195A
0000 H
0080 H
0000 H
0080 H
0000 H
0080 H
0000 H
I/O
I/O
I/O
I/O
0080 H
0100 H
0180 H
Vacancy
00C0 H
0100 H
RAM
RAM
RAM
0100 H
0180 H
0100 H
0180 H
RAM
Register
Register
Register
Register
0140 H
Not available
Not available
Not available
Not available
8000 H
C000 H
External ROM
Program PROM
(Mask ROM)
E000 H
FFFF H
F000 H
FFFF H
Mask ROM
Mask ROM
FFFF H
FFFF H
17
MB89190/190A Series
2. Registers
The F2MC-8L family has two types of registers; dedicated hardware registers and general-purpose memory
registers. The following dedicated registers are provided:
Program counter (PC):
Accumulator (A):
A 16-bit-long register for indicating the instruction storage positions
A 16-bit-long temporary register for arithmetic operations, etc. When the
instruction is an 8-bit data processing instruction, the lower byte is used.
Temporary accumulator (T): A16-bit-longregisterwhichisusedforarithmeticoperationswiththeaccumulator.
When the instruction is an 8-bit data processing instruction, the lower byte is
used.
Index register (IX):
Extra pointer (EP) :
Stack pointer (SP) :
Program status (PS) :
A 16-bit-long register for index modification
A 16-bit-long pointer for indicating a memory address
A 16-bit-long pointer for indicating a stack area
A 16-bit-long register for storing a register pointer, a condition code
Initial value
16 bits
PC
: Program counter
: Accumulator
FFFDH
A
T
Indeterminate
: Temporary accumulator Indeterminate
IX
: Index register
: Extra pointer
: Stack pointer
: Program status
Indeterminate
Indeterminate
Indeterminate
EP
SP
PS
I-flag = 0, IL1, 0 = 11
The other bit values are indeterminate
The PS can further be divided into higher 8 bits for use as a register bank pointer (RP) and the lower 8 bits for
use as a condition code register (CCR) (see the diagram below).
Structure of the Program Status Register
15
14
13
12
11
10
9
8
7
6
I
5
4
3
2
Z
1
0
Vacancy Vacancy
Vacancy
PS
RP
H
IL1, 0
N
V
C
RP
CCR
18
MB89190/190A Series
The RP indicates the address of the register bank currently in use. The relationship between the pointer contents
and the actual address is based on the conversion rule illustrated below.
Rule for Conversion of Actual Addresses of the General-purpose Register Area
RP
Lower OP codes
“0” “0” “0” “0” “0” “0” “0” “1” R4 R3 R2 R1 R0 b2 b1 b0
↓
↓
↓
↓
↓
↓
↓
↓
↓
↓
↓
↓
↓
↓
↓
↓
Generated addresses A15 A14 A13 A12 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0
The CCR consists of bits indicating the results of arithmetic operations and the contents of transfer data, and
bits for control of CPU operations at the time of an interrupt.
H-flag: Set to ‘1’ when a carry or a borrow from bit 3 to bit 4 occurs as a result of an arithmetic operation. Cleared
to ‘0’ otherwise. This flag is for decimal adjustment instructions.
I-flag: Interrupt is enabled when this flag is set to ‘1’. Interrupt is disabled when the flag is cleared to ‘0’. Cleared
to ‘0’ at the reset.
IL1, 0: Indicates the level of the interrupt currently allowed. Processes an interrupt only if its request level is
higher than the value indicated by this bit.
IL1
0
IL0
0
Interrupt level
High-low
High
1
0
1
1
0
2
3
1
1
Low
N-flag: Set to ‘1’ if the MSB becomes ‘1’ as the result of an arithmetic operation. Cleared to ‘0’ otherwise.
Z-flag: Set to ‘1’ when an arithmetic operation results in 0. Cleared to ‘0’ otherwise.
V-flag: Set to ‘1’ if the complement on ‘2’ overflows as a result of an arithmetic operation. Cleared to ‘0’ if the
overflow does not occur.
C-flag: Set to ‘1’ when a carry or a borrow from bit 7 occurs as a result of an arithmetic operation. Cleared to
‘0’ otherwise. Set to ‘1’ the shift-out value in the case of a shift instruction.
19
MB89190/190A Series
The following general-purpose registers are provided:
General-purpose registers: An 8-bit-long register for storing data
The general-purpose registers are of 8 bits and located in register banks of the memory. One bank contains
eight registers and up to a total of 16 banks can be used on the MB89190/190A (8 banks on MB89191/191A).
The bank currently in use is indicated by the register bank pointer. (RP)
Note: The number of register banks that can be used varies with the RAM size.
Register Bank Configuraiton
This address = 0100 H + 8 × (RP)
R 0
R 1
R 2
R 3
R 4
R 5
R 6
R 7
16 banks
(8 banks for the MB89191/191A)
Memory area
20
MB89190/190A Series
■ I/O MAP
Address
00H
Read/write
(R/W)
Register name
PDR0
Register description
Port 0 data register
01H
(W)
DDR0
Port 0 data direction register
Port 0 input enable register
Vacancy
02H
(R/W)
ENI0
03H to 07H
08H
(R/W)
(R/W)
(R/W)
STBC
WDTC
TBTC
Standby control register
Watchdog control register
Time-base timer control register
Vacancy
09H
0AH
0BH
0CH
(R/W)
(W)
PDR3
DDR3
PDR4
BUZR
Port 3 data register
0DH
Port 3 data direction register
Port 4 data register
0EH
(R/W)
(R/W)
0FH
Buzzer register
10H to 13H
14H
Vacancy
(R/W)
(R/W)
RCR1
RCR2
Remote-control transmit control register 1
Remote-control transmit control register 2
Vacancy
15H
16H
17H
Vacancy
18H
(R/W)
(R/W)
(R/W)
(R/W)
(R/W)
(R/W)
T2CR
T1CR
T2DR
T1DR
SMR
Timer 2 control register
Timer 1 control register
Timer 2 data register
Timer 1 data register
Serial mode register
Serial data register
19H
1AH
1BH
1CH
1DH
SDR
1EH
Vacancy
1FH
Vacancy
20H
(R/W)
(R/W)
(R/W)
(R/W)
(R/W)
ADC1
ADC2
ADCD
EIC1
A/D converter control register 1
A/D converter control register 2
A/D converter data register
External interrupt control register 1
External interrupt control register 2
Vacancy
21H
22H
23H
24H
EIC2
25H to 31H
32H
(R/W)
(R/W)
EIE2
EIF2
External interrupt 2 enable register
External interrupt 2 flag register
Vacancy
33H
34H to 7BH
7CH
(W)
(W)
(W)
ILR1
ILR2
ILR3
Interrupt level register 1
Interrupt level register 2
Interrupt level register 3
Vacancy
7DH
7EH
7FH
Note: Do not use vacancies.
21
MB89190/190A Series
■ ELECTRICAL CHARACTERISTICS
1. Absolute Maximum Rating
(AVSS = VSS = 0.0 V)
Value
Symbol
Unit
Remarks
Parameter
Min.
Max.
VCC
VSS – 0.3
VSS – 0.3
VSS + 7.0
V
V
Power supply voltage
Must not exceed VCC + 0.3 V.
MB89190A series only
AVR
VSS + 7.0
EPROM program voltage
Input voltage
VPP
VI
VSS – 0.3
VSS – 0.3
VSS – 0.3
VSS + 13.0
VCC + 0.3
VCC + 0.3
V
V
V
MB89P195/P195A only
Output voltage
VO
Except P33 and P34
IOL1
10
20
mA (Except P30 toP34 and P40 to
P43 for MB89191AH/193AH)
“L” level maximum output
current
P33, P34(P30 toP34 and P40 to
mA
IOL2
P43 for MB89191AH/193AH)
Except P33 and P34
(Except P30 toP34 and P40 to
mA P43 for MB89191AH/193AH)
Average value (operating current
× operation rate)
IOLAV1
4
8
“L” level average output current
P33 and P34(P30 toP34 and P40
to P43 for MB89191AH/193AH)
IOLAV2
mA
Average value (operating current
× operation rate)
“L” level total average output
current
Average value (operating current
× operation rate)
ΣIOLAV
ΣIOL
20
mA
“L” level total maximum output
current
100
mA
IOH1
–10
–20
mA Except P33, P34, and P37
mA P33, P34, P37
“H” level maximum output
current
IOH2
Except P33, P34, and P37
mA Average value (operating current
× operation rate)
IOHAV1
–2
–4
“H” level average output
current
Except P33, P34, and P37
mA Average value (operating current
× operation rate)
IOHAV2
“H” level total average output
current
Average value (operating current
× operation rate)
ΣIOHAV
ΣIOH
–10
–30
mA
“H” level total maximum output
current
mA
Power consumption
Operating temperature
Storage temperature
PD
200
+85
mW
°C
Ta
–40
–55
Tstg
+150
°C
WARNING: Semiconductor devices can be permanently damaged by application of stress (voltage, current,
temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings.
22
MB89190/190A Series
2. Recommended Operating Conditions
(VSS = 0.0 V)
Value
Symbol
Unit
Remarks
Parameter
Min.
Max.
Normal operation assurance range*
MB89191/191A/193/193A/195/195A
2.2*
2.7*
1.5
6.0*
V
V
V
Normal operation assurance range*
MB89P195/P195A/PV190/PV190A
Power supply voltage
VCC
6.0*
6.0
Retains the RAM state in the stop
mode
A/D converter reference input
voltage
AVR
TA
0.0
VCC
V
Operating temperature
–40
+85
°C
*: These values vary with the operation frequency and the assured analog operation range. See Figure 1 and “ 5.
A/D Converter Electrical Characteristics.”
6
Analog accuracy assured in the
Vcc = 3.5 V to 6.0 V range.
5
Operation assurance range
4
3
2
1
1
2
3
4
Main clock operation frequency (at an instruction cycle of 4/Fc) (MHz)
(µs)
0.95
4.0
2.0
Minimum execution time (instruction cycle) (µs)
Note: The shaded area is assured only for the MB89191/191A/193/193A/195/195A.
Figure 1 Operating Voltage vs. Main Clock Operating Frequency
Figure 1 indicates the operating frequency of the external oscillator at an instruction cycle of 4/FC.
23
MB89190/190A Series
WARNING: Recommended operating conditions are normal operating ranges for the semiconductor device. All
the device’s electrical characteristics are warranted when operated within these ranges.
Always use semiconductor devices within the recommended operating conditions. Operation outside
these ranges may adversely affect reliability and could result in device failure.
No warranty is made with respect to uses, operating conditions, or combinations not represented on
the data sheet. Users considering application outside the listed conditions are advised to contact their
FUJITSU representative beforehand.
3. DC Characteristics
(VCC = +5.0 V, AVSS = VSS = 0.0 V, TA = –40°C to +85°C)
Value
Typ.
Sym-
bol
Parameter
Pin
Condition
Unit Remarks
Min.
Max.
P00 to P07,
P30 to P37,
TEST
VCC +
VIH
0.7 VCC
V
0.3
“H” level
RST,
input voltage
INT10 to INT12,
EC, SCK, SI,
INT20 to INT27
VCC +
0.3
VIHS
0.8 VCC
V
V
V
P00 to P03,
P33 to P36,
TEST
VSS −
0.3
VIL
0.3 VCC
0.2 VCC
“L” level
input voltage
RST,
INT10 to INT12,
EC, SCK, SI,
INT 20 to INT27
VSS −
0.3
VILS
Open-drain output
pin applied voltage
VSS −
VSS +
0.3
VD
P40 to P44
V
V
0.3
P00 to P07,
P30 to P32,
P35, P36
VOH1
IOH = –2.0 mA
2.4
“H” level
output voltage
VOH2
P33, P34
P37
IOH = –15 mA
IOH = –7.0 mA
2.4
2.4
V
V
VOH3
P00 to P07,
P40 to P45,
P30 to P32,
P35 to P37
Except
MB89191AH/
193AH
VOL1
IOL = 1.8 mA
0.4
V
MB89191AH/
193AH
P00 to P07,
P35 to P37
“L” level
output voltage
VOL2
RST
IOL = 4.0 mA
IOL = 12 mA
0.4
0.4
V
Except
MB89191AH/
193AH
P33, P34
VOL3
V
P30 to P34,
P40 to P43
MB89191AH/
193AH
Input leakage
P00 to P07,
P30 to P37,
TEST
Without
µA pull-up
resistor
current(Hi-z output
leakage current)
ILI1
0.0 V < V
I
I
< VCC
< VCC
±5
±1
Open-drain output
leakage current (Off ILD1
state)
Without
µA pull-up
resistor
P40 to P45
0.0 V < V
(Continued)
24
MB89190/190A Series
(Continued)
(VCC = 5.0 V, AVSS = VSS = 0.0 V, TA = –40°C to +85°C)
Value
Parameter
Symbol
Pin
Condition
Unit
Remarks
Min.
Typ.
Max.
P00 to P07,
P30 to P37,
P40 to P45,
RST
Pull-up
resistance
RPULL
VI = 0.0 V
25
50
100
kΩ
MB89191/
191A/193/
—
—
5
7
10
12
mA 193A/195/
195A/PV190/
PV190A
ICC
FC = 4.2 MHz
MB89P195/
mA
Power supply
voltage*
P195A
VCC
ICCS
ICCH
FC = 4.2 MHz
—
—
3
7
1
mA Sleep mode
TA = +25 °C
—
µA Stop mode
MB89191A/
mA 193A/195A/
PV190A
FC = 4.2 MHz
During A/D
converter
—
6
13
ICCA
operation
—
—
8
15
—
mA MB89P195A
Except AVR,
AVSS, VCC, and VSS
Input capacitance CIN
f = 1 MHz
10
pF
*: For the MB89PV190/PV190A, the current consumption of a connected EPROM and ICE is not included.
The mesurement condition of the power supply current are set as VCC = 5.0 V with an external clock.
25
MB89190/190A Series
4. AC Characteristics
(1) Reset Timing
(VCC = +5.0 V±10%, AVSS = VSS = 0.0 V, TA = –40°C to +85°C)
Value
Symbol
Condition
Unit
Remarks
Parameter
Min.
Max.
RST “L” pulse width
tZLZH
—
16 tXCYL
—
ns
Note: tXCYL is the oscillation period (1/FC) input to the X0 pin.
t ZLZH
RST
0.2 VCC
0.2 VCC
(2) Power-on Reset
(AVSS = VSS = 0.0 V, TA = –40°C to +85°C)
Value
Symbol Condition
Unit
Remarks
Parameter
Min.
Max.
50
Power supply rising time
Power supply cut-off time
tR
—
1
ms
ms
—
tOFF
—
Due to repeated operations
Note: Make sure that power supply rises within the oscillation stabilization time selected.
If power supply voltage needs to be varied in the course of operation, a smooth voltage rise is recommended.
t R
t OFF
2.0 V
0.2 V
0.2 V
0.2 V
VCC
26
MB89190/190A Series
(3) Clock Timings
Parameter
(AVSS = VSS = 0.0 V, TA = –40°C to +85°C)
Value
Symbol
Pin
Condition
Unit
Remarks
Min.
1
Max.
4.2
Clock frequency
Clock cycle time
FC
X0, X1
X0, X1
—
—
MHz
ns
tXCYL
238
1000
Input clock pulse
width
PWH
PWL
X0
X0
—
—
20
—
—
ns
ns
External clock
External clock
Input clock pulse
risilng/falling time
tCR
tCF
10
X0, X1 Timings and Conditions of Applied Voltage
t XCYL
PWH
PWL
t CF
t CR
0.8 VCC
0.8 VCC
X0
0.2 VCC
0.2 VCC
0.2 VCC
Clock Conditions
When a crystal or ceramic resonator is used
When an external clock is used
X0
X1
X0
X1
Open
(4) Instruction Cycles
Parameter
(AVSS = VSS = 0.0 V, TA = –40°C to +85°C)
Symbol
Value (typical)
Unit
Remarks
Instruction cycle
(minimum execution time)
tinst = 0.95 µs when operating at FC =
4.2 MHz
tinst
4/FC
µs
27
MB89190/190A Series
(5) Recommended Resonator Manufacturers
• Sample Application of Piezoelectric Resonator (FAR Series)
X0
X1
R
FAR*1
C1*2
C2*2
*1: Fujitsu Acoustic Resonator
Temperature
Initial deviation
of
resistor FAR frequency
characteristics of
FAR frequency
(TA = –20°C to
+60°C)
Loading
FAR part number
(built-in capacitor type)
Frequency Dumping
capacitors*2
(MHz)
(TA = +25°C)
4.00
200 Ω
±0.5%
±0.5%
Built-in
FAR-C4SA-04000- 01M
Inquiry: FUJITSU LIMITED
28
MB89190/190A Series
• Sample Application of Ceramic Resonator
X0
X1
R
*
C1
C2
• Mask ROM products
Resonator
Resonator
Frequency
(MHz)
C1 (pF)
C2 (pF)
R
manufacturer*
CSA2.00MG040
CST2.00MG040
100
100
Not required
Not required
Not required
Not required
Not required
Not required
Not required
2.00
4.00
4.00
Built-in
30
Built-in
30
Murata Mfg. Co., Ltd.
CSA4.00MG
CST4.00MGW
CSTCS4.00MG0C5
CCR4.0MC3
Built-in
Built-in
Built-in
Built-in
Built-in
Built-in
Built-in
Built-in
TDK. Co., Ltd.
FCR4.0MC5
• One-time products
Resonator
manufacturer*
Frequency
(MHz)
Resonator
C1 (pF)
C2 (pF)
R
CSA3.20MGCA
CST3.20MGA
30
30
1 kΩ
Built-in
100
Built-in
100
1 kΩ
3.20
3.58
CSA3.20MGA040
CST3.20MGWA040
CSA3.58MGCA
CST3.58MGWHA
Not required
Not required
Not required
Not required
Murata Mfg. Co., Ltd.
Built-in
30
Built-in
30
Built-in
Built-in
Inquiry: Murata Mfg. Co., Ltd
•Murata Electronics North America. Inc.: TEL 1-404-436-1300
•Murata Europe Mnagement GmbH: TEL 49-911-66870
•Murata Electronics Singapore (Pte.) Ltd.: TEL 65-758-4233
TDK Corporation
•TDK Corporation of America
Chicago Regional Office: TEL 1-708-803-6100
•TDK Electronics Europe GmbH
Components Division: TEL 49-2102-9450
•TDK Singapore (PTE) Ltd.: TEL 65-273-5022
•TDK Hongkong Co., Ltd.: TEL 852-736-2238
•Korea Branch, TDK Corporation: TEL 82-2-554-6633
29
MB89190/190A Series
(6) Serial I/O Timings
(VCC = 5.0 V±10%, AVSS = VSS= 0.0 V, TA = –40°C to +85°C)
Value
Symbol
Pin
SCK
Condition
Unit Remarks
Parameter
Min.
2 tinst*
–200
Max.
—
Serial clock cycle time
SCK ↓ → SO time
tSCYC
tSLOV
tIVSH
tSHIX
tSHSL
tSLSH
tSLOV
tIVSH
tSHIX
µs
ns
µs
µs
µs
µs
ns
µs
µs
SCK, SO
SI, SCK
SCK, SI
200
—
Internal clock
operation
Valid SI → SCK ↑
1/2 tinst*
1/2 tinst*
1 tinst*
1 tinst*
0
SCK ↑ → valid SI hold time
Serial clock “H” pulse width
Serial clock “L” pulse width
SCK ↓ → SO time
—
—
SCK
—
External
SCK, SO clock
200
—
operation
Valid SI → SCK ↑
SI, SCK
SCK, SI
1/2 tinst*
1/2 tinst*
SCK ↑ → valid SI hold time
—
*: For information on tinst, see “(4) Instruction Cycles.”
Internal Shift Clock Mode
t SCYC
2.4 V
SCK
0.8 V
0.8 V
t SLOV
2.4 V
SO
0.8 V
t IVSH
t SHIX
0.8 VCC
0.8 VCC
SI
0.2 VCC
0.2 VCC
External Shift Clock Mode
t SLSH
t SHSL
0.8 VCC
0.8 VCC
SCK
0.2 VCC
0.2 VCC
t SLOV
2.4 V
0.8 V
SO
SI
t IVSH
t SHIX
0.8 VCC
0.2 VCC
0.8 VCC
0.2 VCC
30
MB89190/190A Series
(7) Peripheral Input Timings
Parameter
(VCC = 5.0 V±10%, AVSS = VSS = 0.0 V, TA = –40°C to +85°C)
Value
Symbol
Pin
Unit Remarks
Min.
2 tinst*
2 tinst*
Max.
—
Peripheral input “H” pulse width 1
Peripheral input “L” pulse width 1
tILIH1
tIHIL1
µs
µs
EC, INT10 to INT12,
INT20 to INT27
—
*: For information on tinst, see “(4) Instruction Cycles.”
Peripheral Input Timing Diagram
t IHIL
t ILIH
EC
INT10 to INT12
INT20 to INT27
0.8 VCC
0.8 VCC
0.2 VCC
0.2 VCC
(VCC = 5.0 V±10%, AVSS= VSS = 0.0 V, TA = –40°C to +85°C)
Value
Symbol
Pin
Unit Remarks
Parameter
Min.
Typ. Max.
Peripheral input “H” noise
limit width
EC, SI, SCK
INT10 to INT12
tIHNC
tILNC
7
15
15
23
23
ns
ns
Peripheral input “L” noise
limit width
EC, SI, SCK
INT10 to INT12
7
Peripheral Input Timing Diagram
t ILNC
t IHNC
EC, SCK, S1
INT10 to INT12
0.8 VCC
0.8 VCC
0.2 VCC
0.2 VCC
31
MB89190/190A Series
5. A/D Converter Electrical Characteristics (MB89190A Series Only)
(AVCC = VCC = 3.5 V to 6.0 V, AVSS = VSS = 0.0 V, TA = –40°C to +85°C)
Value
Typ.
—
Sym-
bol
Parameter
Resolution
Pin
Condition
Unit
Remarks
Min.
—
Max.
8
—
bit
Total error
—
—
±1.5
±1.0
LSB
LSB
—
Linearity error
—
—
Differential linearity
error
—
—
±0.9
LSB
AVSS
–1.0
LSB
AVSS
+0.5
LSB
AVSS
+2.0
LSB
Zero transition
voltage
VOT
mV
AVR = AVCC
—
AVR
–3.0
LSB
AVR
–1.5
LSB
Full-scale transition
voltage
VFST
AVR
mV
Inter channel
disparity
—
—
0.5
—
LSB
µs
A/D mode
conversion time
—
—
—
—
44 tinst*
12 tinst*
—
Sense mode
conversion time
—
µs
—
Analog port input
current
IAIN
10
µA
AN0 to AN7
AVR
Analog input voltage
Reference voltage
0
0
—
—
AVR
VCC
V
V
—
IR
AVR = VCC =
5.0 V when A/
D conversion is
operating
—
100
300
µA
Reference voltage
supply current
IRH
—
—
1
µA
*: For information on tinst, see “(4) Instruction Cycles” in “4. AC Characteristics.”
6. A/D Converter Glossary
• Resolution
Analog changes that are identifiable by the A/D converter.
When the number of bits is 8, analog voltage can be divided into 28=256.
Linearity error (unit: LSB)
The deviation of the straight line connecting the zero transition point (“0000 0000” ↔ “0000 0001”) with the
full-scale transition point (“1111 1110” ↔ “1111 1111”) from actual conversion characteristics.
Differential linearity error (unit: LSB)
The deviation of input voltage needed change the output code by 1 LSB from the theoretical value.
• Total error (unit: LSB)
The difference between theoretical and actual conversion values.
32
MB89190/190A Series
Digital output
1111 1111
Theoretical conversion value
Actual conversion value
1111 1110
•
•
•
•
•
(1LSB × N + VOT)
AVR
256
•
1LSB =
•
•
•
VNT – (1LSB × N + VOT)
•
=
Linearity error
•
1LSB
•
•
V( N + 1 ) T – VNT
•
Differential linearity error
Total error
–1
=
=
•
1LSB
Linearity error
•
•
VNT – (1LSB × N + 1LSB)
•
•
1LSB
•
0000 0010
0000 0001
0000 0000
VOT
VNT
V( N + I )T
VFST
Analog input
7. Notes on Using A/D Converter
• Input impedance of analog input pins
The A/D converter used for the MB89190A series contains a sample hold circuit as illustrated below to fetch
analog input voltage into the sample hold capacitor for eight instruction cycles after starting A/D conversion.
For this reason, if the output impedance of the external circuit for the analog input is high, analog input voltage
might not stabilize within the analog input sampling period. Therefore, it is recommended to keep the output
impedance of the external circuit low (below 10 kΩ).
Note that if the impedance cannot be kept low, it is recommended to connect an external capacitor of approx.
0.1 µF for the analog input pin.
Sample hold circuit,
Analog input equivalent circuit
Analog input pin
.
C = 33 pF
.
Comparator
If the analog input impedance
is higher than 10 kΩ, it is
recommended to connect an
external capacitor of approx.
0.1 µF.
.
R = 6 kΩ
.
Close for 8 instruction cycles
after starting A/D conversion.
Analog channel selector
• Error
The smaller the AVR-AVSS , the greater the error would become relatively.
33
MB89190/190A Series
■ EXAMPLE CHARACTERISTICS
(1) “L” Level Output Voltage
VOL1 vs. IOL
VOL2 vs. IOL
VCC = 2.5 V
VCC = 3.0 V
VCC = 2.5 V
VCC = 3.0 V
VOL (V)
0.30
VOL (V)
0.6
VCC = 2.0 V
TA = +25°C
VCC = 2.0 V
VCC = 4.0 V
VCC = 4.0 V
TA = +25°C
VCC = 5.0 V
VCC = 6.0 V
0.25
0.20
0.15
0.10
0.05
0.5
0.4
0.3
0.2
0.1
VCC = 5.0 V
VCC = 6.0 V
0.00
0
0.0
0
1
2
3
4
5
1
2
3
4
5
6
7
8
9
10
IOL (mA)
IOL (mA)
VOL3 vs. IOL
VCC = 2.0 V
VOL (V)
VCC = 2.5 V
1.2
1.0
0.8
0.6
0.4
0.2
0.0
TA = +25°C
VCC = 3.0 V
VCC = 4.0 V
VCC = 5.0 V
VCC = 6.0 V
0
2
4
6
8
10 12 14 16 18 20
IOL (mA)
34
MB89190/190A Series
(2) “H” Level Output Voltage
VOH1 vs. IOH
VOH2 vs. IOH
VCC = 2.5 V
VCC = 4.0 V
VCC - VOH (V)
VCC - VOH (V)
0.6
VCC = 2.0 V
VCC = 3.0 V
VCC = 3.0 V
3.0
2.5
2.0
1.5
1.0
0.5
TA = +25°C
VCC = 2.5 V
VCC = 5.0 V
VCC = 6.0 V
TA = +25°C
0.5
VCC = 2.0 V
VCC = 4.0 V
0.4
0.3
VCC = 5.0 V
VCC = 6.0 V
0.2
0.1
0.0
0.0
0
– 1
– 2
– 3
– 4
– 5
IOH (mA)
0
– 4
– 8
– 12
– 16
– 20
IOH (mA)
VOH3 vs. IOH
VCC = 2.0 V VCC = 2.5 V
VCC - VOH (V)
1.2
VCC = 3.0 V
TA = + 25°C
1.0
0.8
0.6
0.4
0.2
0.0
VCC = 4.0 V
VCC = 5.0 V
VCC = 6.0 V
0
– 2
– 4
– 6
– 8
– 10
IOH (mA)
(3) “H” Level Input Voltage/“L” Level
Input Voltage (CMOS Input)
(4) “H” Level Input Voltage/“L” Level
Input Voltage (Hysteresis Input)
VIN vs. VCC
VIN (V)
5.0
TA = +25°C
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
VIN vs. VCC
VIN (V)
5.0
TA= +25°C
4.5
VIHS
4.0
3.5
3.0
2.5
2.0
1.5
VILS
1.0
0.5
0.0
0
1
2
3
4
5
6
7
VCC (V)
VIHS: Threshold when input voltage in hysteresis
characteristics is set to “H” level
0
1
2
3
4
5
6
7
VCC (V)
VILS: Threshold when input voltage in hysteresis
characteristics is set to “L” level
35
MB89190/190A Series
(5) Power Supply Current (External Clock)
ICC vs. VCC
ICC (mA)
6
ICCS vs. VCC
ICCS (mA)
1.50
TA = +25°C
TA = +25°C
Fc = 4.2 MHz
Fc = 3.0 MHz
5
1.25
1.00
0.75
0.50
0.25
Fc = 4.2 MHz
4
3
2
1
Fc = 3.0 MHz
Fc = 1.0 MHz
Fc = 1.0 MHz
0
0.00
1
1
2
3
4
5
6
7
2
3
4
5
6
7
VCC (V)
VCC (V)
ICCH vs. VCC
IR vs. AVR
ICCH (µA)
IR (µA)
2.0
150
TA = +25°C
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
TA = +25°C
125
100
75
50
25
0
1
0
1
2
3
4
5
6
7
2
3
4
5
6
7
VCC (V)
AVR (V)
(6) Pull-up Resistance
RPULL vs. VCC
RPULL (kΩ)
1000
TA = +25°C
100
10
1
2
3
4
5
6
VCC (V)
36
MB89190/190A Series
■ MASK OPTION LIST
MB89191 MB89191A
MB89193 MB89193A
MB89195 MB89195A
MB89PV190
MB89PV190A
Part number
No.
MB89P195
MB89P195A
Specify when
ordering masking
Specify when
ordering masking
–201*2
Specifying procedure
–101*2
Fixed
P00 to P07
P30 to P37
Selectable by pin
None
Selectable by pin None
Not available
Port pull-up
resistors
1
Selectable Not
Selectable Not
None
P00 to P03
P40 to P45
None
Not available
Provided Provided
by pin
available
Selectable
by pin
available
Power-on reset
2
3
•
Power-on reset provided
Provided
Provided
• No power-on reset
Selection of oscillation
stabilization wait time
(at 4.2 MHz)*1
• 218/FC (approx. 62.4 ms)
• 216/FC (approx. 15.6 ms)
• 212/FC (approx. 0.98 ms)
• 22/FC (approx. 0 ms)
Fixed to
216/FC
Fixed to Fixed to
216/FC 216/FC
Selectable
Selectable
Reset pin output
4
5
•
Reset output provided
Selectable
Selectable
Provided
“1” only
Selectable
Selectable
Provided Provided
• No reset output
Oscillation type of clock
1 Crystal and ceramic
oscillators
“1” only
“1” only
2 CR
*1: The oscillation stabilization time is generated by dividing the original clock oscillation. The time described
in this item should be used as a rough guideline since the oscillation cycle is unstable immediately after
oscillation starts. “FC” indicates the original oscillation frequency.
*2: –101 and –201 are provided respectively for the MB89P195 and MB89P195A OTP versions as the standard
products.
37
MB89190/190A Series
■ ORDERING INFORMATION
Part number
MB89191PF
Package
Remarks
MB89193PF
MB89195PF
MB89P195PF-101PF
MB89191APF
MB89191AHPF
MB89193APF
28-pin Plastic SOP
(FPT-28P-M17)
MB89193AHPF
MB89195APF
MB89P195APF-201PF
MB89191P-SH
MB89193P-SH
MB89195P-SH
MB89191AP-SH
MB89191AHP-SH
MB89193AP-SH
MB89193AHP-SH
MB89195AP-SH
28-pin Plastic SH-DIP
(DIP-28C-M03)
MB89191P
MB89193P
MB89195P
MB89P195P-101P
MB89191AP
MB89191AHP
MB89193AP
MB89193AHP
MB89195AP
MB89P195AP-201P
28-pin Plastic DIP
(DIP-28P-M05)
MB89PV190CF
MB89PV190ACF
48-pin Ceramic MQFP
(MQP-48C-P01)
38
MB89190/190A Series
■ PACKAGE DIMENSION
28-pin Plastic SOP
(FPT-28P-M17)
17.75 +–00..2205
.699 –+..000180
28
15
Details of "B" part
Details of "A" part
0.15(.006)
0.20(.008)
0.35(.014)
0.20(.008)
11.80±0.30
(.465±.012)
INDEX
8.60±0.20
(.339±.008)
"A"
0.18(.007)
0.18(.007)
MAX
MAX
0.68(.027)
MAX
0.68(.027)
MAX
1
14
1.27(.050)
TYP
0.45±0.10
(.018±.004)
M
0.13(.005)
2.80(.110)MAX
(Mounting height)
0.15±0.05
(.006±.002)
"B"
0.10(.004)
0(0)MIN
16.51(.650)
REF
0.80±0.20
(.031±.008)
10.20±0.30
(.402±.012)
(STAND OFF)
Dimensions in mm (inches)
C
1994 FUJITSU LIMITED F28048S-1C-1
28-pin Plastic DIP
(DIP-28P-M05)
35.73 +–00..3200
1.407 +–..001028
INDEX-1
13.80±0.25
(.543±.010)
INDEX-2
0.99 –+00.50
.039 –+0.020
1.52 +–00.50
.060 +–0.020
0.51(.020)MIN
4.96(.195)MAX
3.00(.118)MIN
0.25±0.05
(.010±.002)
15°MAX
2.54(.100)
TYP
0.46±0.08
(.018±.003)
1.58(.062)
MAX
15.24(.600)
TYP
C
Dimensions in mm (inches)
1994 FUJITSU LIMITED D28013S-3C-2
39
MB89190/190A Series
28-pin Plastic SH-DIP
(DIP-28P-M03)
+0.20
–0.30
26.00
1.024 +–..001028
INDEX-1
9.10±0.25
(.358±.010)
INDEX-2
4.85(.191)MAX
0.51(.020)MIN
0.25±0.05
(.010±.002)
3.00(.118)MIN
0.45±0.10
(.018±.004)
+0.50
–0
1.00
15°
.039 +–0.020
10.16(.400)
TYP
1.778±0.18
(.070±.007)
1.778(.070)
MAX
23.114(.910)REF
Dimensions in mm (inche
C
1994 FUJITSU LIMITED D28012S-3C-3
48-pin Ceramic MQFP
(MQP-48C-P01)
17.20(.677)TYP
15.00±0.25
(.591±.010)
1.50(.059)TYP
1.00(.040)TYP
8.80(.346)REF
PIN No.1 INDEX
14.82±0.35
(.583±.014)
0.80±0.22
(.0315±.0087)
PIN No.1 INDEX
1.02±0.13
(.040±.005)
10.92 –+00..013
.430 –+0.005
8.71(.343)
TYP
7.14(.281)
TYP
PAD No.1 INDEX
4.50(.177)TYP
1.10 +–00..2455
.043 +–..001108
0.40±0.08
(.016±.003)
0.60(.024)TYP
0.30(.012)TYP
8.50(.335)MAX
0.15±0.05
(.006±.002)
C
1994 FUJITSU LIMITED M48001SC-4-2
Dimensions in mm (inches)
40
MB89190/190A Series
FUJITSU LIMITED
All Rights Reserved.
The contents of this document are subject to change without notice.
Customers are advised to consult with FUJITSU sales
representatives before ordering.
The information and circuit diagrams in this document are
presented as examples of semiconductor device applications, and
are not intended to be incorporated in devices for actual use. Also,
FUJITSU is unable to assume responsibility for infringement of
any patent rights or other rights of third parties arising from the use
of this information or circuit diagrams.
The products described in this document are designed, developed
and manufactured as contemplated for general use, including
without limitation, ordinary industrial use, general office use,
personal use, and household use, but are not designed, developed
and manufactured as contemplated (1) for use accompanying fatal
risks or dangers that, unless extremely high safety is secured, could
have a serious effect to the public, and could lead directly to death,
personal injury, severe physical damage or other loss (i.e., nuclear
reaction control in nuclear facility, aircraft flight control, air traffic
control, mass transport control, medical life support system, missile
launch control in weapon system), or (2) for use requiring
extremely high reliability (i.e., submersible repeater and artificial
satellite).
Please note that Fujitsu will not be liable against you and/or any
third party for any claims or damages arising in connection with
above-mentioned uses of the products.
Any semiconductor devices have an inherent chance of failure. You
must protect against injury, damage or loss from such failures by
incorporating safety design measures into your facility and
equipment such as redundancy, fire protection, and prevention of
over-current levels and other abnormal operating conditions.
If any products described in this document represent goods or
technologies subject to certain restrictions on export under the
Foreign Exchange and Foreign Trade Law of Japan, the prior
authorization by Japanese government will be required for export
of those products from Japan.
F0112
FUJITSU LIMITED Printed in Japan
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