MB89485PFM [FUJITSU]
8-bit Proprietary Microcontroller; 8位微控制器专有
| 型号： | MB89485PFM |
| 厂家： | 
FUJITSU |
| 描述： | 8-bit Proprietary Microcontroller |
| 文件： | 总55页 (文件大小：468K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
FUJITSU SEMICONDUCTOR
DATA SHEET
DS07-12559-1E
8-bit Proprietary Microcontroller
CMOS
F2MC-8L MB89480/MB89480L Series
MB89485/485L/P485/P485L/PV480
■ DESCRIPTION
The MB89480 series has been developed as a general-purpose version of the F2MC*-8L family consisting of
proprietary 8-bit single-chip microcontrollers.
In addition to a compact instruction set, the microcontroller contains a variety of peripheral functions such as 21-
bit timebase timer, watch prescaler, PWC timer, PWM timer, 8/16-bit timer/counter, 6-bit PPG, LCD controller/
driver, external interrupt 1 (edge), external interrupt 2 (level), 10-bit A/D converter, UART/SIO, buzzer, watchdog
timer reset.
The MB89480 series is designed suitable for LCD remote controller as well as in a wide range of applications for
consumer product.
*: F2MC stands for FUJITSU Flexible Microcontroller.
■ FEATURES
• Package used
LQFP package and SH-DIP package for MB89P485/P485L, MB89485/485L
MDIP package and MQFP package for MB89PV480
• High speed operating capability at low voltage
• Minimum execution time: 0.32 µs at 12.5 MHz
(Continued)
■ PACKAGES
64-pin Plastic SH-DIP
64-pin Plastic LQFP
64-pin Ceramic MDIP
64-pin Ceramic MQFP
(DIP-64P-M01)
(FPT-64P-M09)
(MDP-64C-P02)
(MQP-64C-P01)
MB89480/480L Series
(Continued)
• F2MC-8L family CPU core
Multiplication and division instructions
16-bit arithmetic operations
Test and branch instructions
Instruction set optimized for controllers
Bit manipulation instructions, etc.
• Six timers
PWC timer (also usable as an interval timer)
PWM timer
8/16-bit timer/counter x 2
21-bit timebase timer
Watch prescaler
• Programmable pulse generator
6-bit PPG with program-selectable pulse width and period
• External interrupt
Edge detection (selectable edge) : 4 channels
Low level interrupt (wake-up function) : 8 channels
• A/D converter (4 channels)
10-bit successive approximation type
• UART/SIO
Synchronous/asynchronous data transfer capability
• LCD controller/driver
Max 31 segments output x 4 commons
Booster for LCD driving (selected by mask option)
• Buzzer
7 frequencies are selectable by software
• Low-power consumption mode
Stop mode (oscillation stops so as to minimize the current consumption.)
Sleep mode (CPU stops so as to reduce the current consumption to approx. 1/3 of normal.)
Watch mode (everything except the watch prescaler stops so as to reduce the power comsumption to an
extremely low level.)
Sub-clock mode
• Watchdog timer reset
• I/O ports: Max 42 channels
2
MB89480/480L Series
■ PRODUCT LINEUP
Part number
MB89485L
MB89485
MB89P485L
MB89P485
MB89PV480
Parameter
Mass production products
(mask ROM product)
Classification
OTP
Piggy-back
16K x 8-bit (internal PROM
with read protection) *2
32K x 8-bit
ROM size
RAM size
16K x 8-bit (internal ROM)
(external ROM)*1
512 x 8-bit
1K × 8-bit
Number of instructions
Instruction bit length
: 136
: 8 bits
Instruction length
Data bit length
Minimum execution time
Minimum interrupt processing time
: 1 to 3 bytes
: 1, 8, 16 bits
: 0.32 µs at 12.5 MHz
: 2.88 µs at 12.5 MHz
CPU functions
I/O ports (CMOS)
N-channel open drain I/O ports
: 11 pins
: 28 pins
Ports
Output ports (N-channel open drain)
Input port
Total
: 2 pins
: 1 pin
: 42 pins
21-bit timebase
timer
Interrupt period (0.66 ms, 2.6 ms, 21.0 ms, 335.5 ms) at 12.5 MHz.
Watchdog timer
Reset period (167.8 ms to 335.5 ms) at 12.5 MHz.
1 channel.
8-bit one-shot timer operation (supports underflow output, operating clock period: 1, 4, 32 tinst,
external).
Pulse width count
timer
8-bit reload timer operation (supports square wave output, operating clock period: 1, 4, 32 tinst,
external).
8-bit pulse width measurement operation (supports continuous measurement, H width,
L width, rising edge to rising edge, falling edge to falling edge measurement and both edge
measurement).
8-bit reload timer operation (supports square wave output, operating clock period: 1, 4, 32 tinst,
PWM timer
external).
8-bit resolution PWM operation.
6- bit programmable
pulse generator
Can generate square pulse with programmable period.
Can be operated either as a 2-channel 8-bit timer/counter (timer 11 and timer 12, each with its
8/16-bit timer/counter own independent operating clock cycle), or as one 16-bit timer/counter.
11, 12
In timer 11 or 16-bit timer/counter operation, event counter operation (external clock-triggered)
and square wave output capability.
Can be operated either as a 2-channel 8-bit timer/counter (timer 21 and timer 22, each with its
8/16-bit timer/counter own independent operating clock cycle), or as one 16-bit timer/counter.
21, 22
In timer 21 or 16-bit timer/counter operation, event counter operation (external clock-triggered)
and square wave output capability.
4 independent channels (selectable edge, interrupt vector, request flag).
8 channels (low level interrupt).
External interrupt
(Continued)
3
MB89480/480L Series
(Continued)
Part number
MB89485L
MB89485
MB89P485L MB89P485
MB89PV480
Parameter
10-bit resolution × 4 channels.
A/D converter
A/D conversion function (conversion time: 60 tinst ).
Supports repeated activation by internal clock.
Common output
Segment output
: 4 (Max)
: 31 (Max) (selected resistor ladder)
: 26 (Max) (selected booster)
: 4
: 31 × 4 bits
: selected by mask option
LCD controller/driver
UART/SIO
Bias power supply pins
LCD display RAM size
Dividing resistor/booster
Synchronous/asynchronous data transfer capability.
(Max baud rate: 97.656 Kbps at 12.5 MHz).
(7 and 8 bits with parity bit; 8 and 9 bits without parity bit).
Buzzer output
Standby mode
Process
7 frequencies are selectable by software.
Sleep mode, stop mode, watch mode, sub-clock mode.
CMOS
Operating voltage
2.2 V to 3.6 V 2.2 V to 5.5 V 2.7 V to 3.6 V 3.5 V to 5.5 V
2.7 V to 5.5 V
*1 : Use MBM27C256A as the external ROM.
*2 : Read protection feature is selected by part number, detail please refer to MASK OPTIONS.
Note : 1 tinst = one instruction cycle (execution time) which can be selected as 1/4, 1/8, 1/16, or 1/64 of main clock.
■ PACKAGE AND CORRESPONDING PRODUCTS
Part number
MB89485/485L
MB89P485/P485L
MB89PV480
Package
DIP-64P-M01
O
O
X
X
O
O
X
X
X
X
FPT-64P-M09
MDP-64C-P02
MQP-64C-P01
O
O
O : Availabe
: Not available
X
4
MB89480/480L Series
■ DIFFERENCES AMONG PRODUCTS
1. Memory Size
Before evaluating using the piggyback product, verify its differences from the product that will actually be used.
Take particular care on the following point:
• The stack area is set at the upper limit of the RAM.
2. Current Consumption
• For the MB89PV480, the current consumed by the EPROM mounted in the piggy-back socket is needed to
be included.
• When operating at low speed, the current consumed by the one-time PROM product is greater than that for
the mask ROM product. However, the current consumption is roughly the same in sleep and stop mode.
• For more information, see “■ ELECTRICAL CHARACTERISTICS”.
3. Oscillation Stabilization Time after Power-on Reset
• For MB89PV480, MB89P485L and MB89485L, there is no power-on stabilization time after power-on reset.
• For MB89P485, there is power-on stabilization time after power-on reset.
• For MB89485, the power-on stabilization time can be selected.
• For more information, please refer to “■ MASK OPTION”.
5
MB89480/480L Series
■ PIN ASSIGNMENT
(TOP VIEW)
COM0
SEG1
SEG2
SEG3
SEG4
SEG5
SEG6
SEG7
1
2
3
4
5
6
7
8
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
Vcc
COM1
3
*
A15
A12
A7
A6
A5
A4
A3
A2
A1
A0
O1
O2
O3
65
66
67
68
69
70
71
72
73
74
75
76
77
78
92
91
90
89
88
87
86
85
84
83
82
81
80
79
V
CC
P30/COM2
P31/COM3
V3
P27/V2/EC1
P26/V1/TO1
V0/SEG0
P25/C0/EC2 *1
P24/C1/TO2 *1
P23/SI
A14
A13
A8
A9
A11
OE
A10
CE
O8
O7
O6
O5
O4
P40/SEG8
P41/SEG9
P42/SEG10
P43/SEG11
P44/SEG12
P45/SEG13
P46/SEG14
P47/SEG15
P50/SEG16
P51/SEG17
P52/SEG18
P53/SEG19
P54/SEG20
P55/SEG21
P56/SEG22
P57
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
P22/SO
P21/SCK
P20/PWM
P00/INT20
P01/INT21
P02/INT22
P03/INT23 *1
P04/INT24 *1
P05/INT25/PWC
P06/INT26/PPG
P07/INT27/BUZ
AVss
VSS
AVcc
P10/SEG23/INT10
P11/SEG24/INT11
P12/SEG25/INT12
P13/SEG26/INT13
X0A
P17/SEG30/AN3 *1
P16/SEG29/AN2 *1
P15/SEG28/AN1 *1
P14/SEG27/AN0 *1
RST
X1A
C *2
VSS
MODE
X1
X0
(DIP-64P-M01)
(MDP-64C-P02)
*1: If booster is selected, EC2 and TO2 will be redirected to P03/INT23 and P04/INT24 respectively.
Segment output of P17/SEG30/AN3 - P14/SEG27/AN0 will be disabled.
*2: For product other than MB89P485, pin 31 is NC pin.
*3: Pin assignment on package top.
Pin
symbol
Pin
symbol
Pin
symbol
Pin
symbol
Pin no.
Pin no.
Pin no.
Pin no.
65
66
67
68
69
70
71
72
A15
A12
A7
73
74
75
76
77
78
79
80
A1
A0
81
82
83
84
85
86
87
88
O6
O7
89
90
91
92
A8
A13
A14
Vcc
O1
O2
O3
VSS
O4
O5
O8
A6
CE
A10
OE
A11
A9
A5
A4
A3
A2
N.C.: As connected internally, do not use.
(Continued)
6
MB89480/480L Series
(TOP VIEW)
P40/SEG8
P41/SEG9
P42/SEG10
P43/SEG11
P44/SEG12
P45/SEG13
P46/SEG14
P47/SEG15
P50/SEG16
P51/SEG17
P52/SEG18
P53/SEG19
P54/SEG20
P55/SEG21
P56/SEG22
P57
1
2
3
4
5
6
7
8
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
P25/C0/EC2 *1
P24/C1/TO2 *1
P23/SI
P22/SO
P21/SCK
P20/PWM
P00/INT20
P01/INT21
P02/INT22
P03/INT23 *1
P04/INT24 *1
P05/INT25/PWC
P06/INT26/PPG
P07/INT27/BUZ
AVss
9
10
11
12
13
14
15
16
AVcc
(FPT-64P-M09)
*1: If booster is selected, EC2 and TO2 will be redirected to P03/INT23 and P04/INT24 respectively.
Segment output of P17/SEG30/AN3 - P14/SEG27/AN0 will be disabled.
*2: For product other than MB89P485, pin 23 is NC pin.
(Continued)
7
MB89480/480L Series
(Continued)
(TOP VIEW)
SEG7
P40/SEG8
1
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
P26/V1/TO1
V0/SEG0
P25/C0/EC2 *1
P24/C1/TO2 *1
P23/SI
2
3
P41/SEG9
4
P42/SEG10
P43/SEG11
P44/SEG12
P45/SEG13
P46/SEG14
P47/SEG15
P50/SEG16
P51/SEG17
P52/SEG18
P53/SEG19
P54/SEG20
P55/SEG21
P56/SEG22
P57
5
6
P22/SO
85
86
87
88
89
90
91
92
93
77
76
75
74
73
72
71
70
69
7
P21/SCK
8
P20/PWM
9
P00/INT20
P01/INT21
P02/INT22
P03/INT23 *1
P04/INT24 *1
P05/INT25/PWC
P06/INT26/PPG
P07/INT27/BUZ
AVss
10
11
12
13
14
15
16
17
18
19
P10/SEG23/INT10
P11/SEG24/INT11
AVcc
P17/SEG30/AN3 *1
(MQP-64C-P01)
*1: If booster is selected, EC2 and TO2 will be redirected to P03/INT23 and P04/INT24 respectively.
Segment output of P17/SEG30/AN3 - P14/SEG27/AN0 will be disabled.
*2: Pin 24 is NC pin.
Pin assignment on package top
Pin
no.
Pin
symbol
Pin
no.
Pin
symbol
Pin
Pin
Pin
symbol
Pin no.
symbol no.
65
66
67
68
69
70
71
72
N.C.
VPP
A12
A7
73
74
75
76
77
78
79
80
A2
A1
81
82
83
84
85
86
87
88
N.C.
O4
89
90
91
92
93
94
95
96
OE
N.C.
A11
A9
A0
O5
N.C.
O1
O2
O3
VSS
O6
A6
O7
A8
A5
O8
A13
A14
VCC
A4
CE
A10
A3
N.C.: As connected internally, do not use.
8
MB89480/480L Series
■ PIN DESCRIPTION
Pin number
I/O
SH-DIP*1
Pin name
circuit
type
Function
MQFP*2 QFP*3
MDIP*4
33
34
29
30
26
27
22
23
25
26
21
22
X0
X1
Connection pins for a crystal or other oscillator.
An external clock can be connected to X0. In this case,
leave X1 open.
A
X0A
X1A
Connection pins for a crystal or other oscillator.
An external clock can be connected to X0A. In this case,
leave X1A open.
A
B
Input pin for setting the memory access mode.
35
36
28
29
27
28
MODE
RST
Connect directly to VSS
.
Reset I/O pin. The pin is an N-ch open-drain type with pull-
up resistor and a hysteresis input. The pin outputs an “L”
level when an internal reset request is present. Inputting
an “L” level initializes internal circuits.
C
D
P00/INT20
to
General-purpose CMOS I/O port.
A hysteresis input.
50 to 48 43 to 41 42 to 40
P02/INT22
The pin is shared with external interrupt 2 input.
General-purpose CMOS I/O port.
A hysteresis input.
47
46
40
39
39
38
P03/INT23
P04/INT24
D
D
The pin is shared with external interrupt 2 input, and
shared with 8/16-bit timer/counter 21, 22 input when
booster is selected.
General-purpose CMOS I/O port.
A hysteresis input.
The pin is shared with external interrupt 2 input, and
shared with 8/16-bit timer/counter 21, 22 output when
booster is selected.
General-purpose CMOS I/O port.
P05/INT25/
PWC
A hysteresis input.
The pin is shared with external interrupt 2 input, and PWC
input.
45
44
43
38
37
36
37
36
35
D
D
D
General-purpose CMOS I/O port.
A hysteresis input.
The pin is shared with external interrupt 2 input, and 6-bit
PPG output.
P06/INT26/
PPG
General-purpose CMOS I/O port.
A hysteresis input.
The pin is shared with external interrupt 2 input and buzzer
output.
P07/INT27/
BUZ
General-purpose N-ch open-drain I/O port.
A hysteresis input.
The pin is shared with external interrupt 1 input and LCD
segment output.
P10/SEG23/
25 to 28 18 to 21 17 to 20 INT10 to P13/ F/K
SEG26/INT13
(Continued)
9
MB89480/480L Series
Pin number
I/O
SH-DIP*1
MDIP*4
Pin name
circuit
type
Function
MQFP*2 QFP*3
General-purpose N-ch open-drain I/O port.
An analog input.
The pin is shared with A/D converter input and LCD
segment output.
LCD segment output will be disabled when booster is
selected.
P14/SEG27/
37 to 40 30 to 33 29 to 32 AN0 to P17/
SEG30/AN3
G/K
General-purpose CMOS I/O port.
The pin is shared with PWM output.
51
52
53
54
44
45
46
47
43
44
45
46
P20/PWM
P21/SCK
P22/SO
P23/SI
E
E
E
D
General-purpose CMOS I/O port.
The pin is shared with UART/SIO clock I/O.
General-purpose CMOS I/O port.
The pin is shared with UART/SIO data output.
General-purpose CMOS I/O port.
The pin is shared with UART/SIO data input.
General-purpose CMOS I/O port.
The pin is shared with 8/16-bit timer 21, 22 output (it is
redirected to P04/INT24 when booster is selected), and
as a capacitor connecting pin when booster is selected.
55
56
48
49
47
48
P24/C1/TO2
P25/C0/EC2
H
F
General-purpose CMOS I/O port.
A hysteresis input.
The pin is shared with 8/16-bit timer 21, 22 input (it is
redirected to P03/INT23 when booster is selected), and
as a capacitor connecting pin when booster is selected.
General-purpose CMOS I/O port.
58
59
51
52
50
51
P26/V1/TO1
P27/V2/EC1
H
F
The pin is shared with 8/16-bit timer 11, 12 output, and
LCD power driving pin.
General-purpose CMOS I/O port.
A hysteresis input.
The pin is shared with 8/16-bit timer 11, 12 input, and
LCD power driving pin.
General-purpose N-ch open-drain output port.
The pin is shared with the LCD common output.
62
61
55
54
54
53
P30/COM2
P31/COM3
I / K
I / K
General-purpose N-ch open-drain output port.
The pin is shared with the LCD common output.
P40/SEG8 to
P47/SEG15
General-purpose N-ch open-drain I/O port.
The pin is shared with LCD segment output.
9 to 16
2 to 9
1 to 8
H / K
P50/SEG16to
P56/SEG22
General-purpose N-ch open-drain I/O port.
The pin is shared with LCD segment output.
17 to 23 10 to 16 9 to 15
24 17 16
H / K
J
P57
General-purpose CMOS input port.
(Continued)
10
MB89480/480L Series
(Continued)
Pin number
I/O
SH-DIP*1
MDIP*4
Pin name
circuit
type
Function
MQFP*2 QFP*3
59 to
SEG1 to
SEG7
2 to 8
58 to 64
64, 1
K
LCD segment output-only pins.
COM0 to
COM1
1, 63
60
58, 56 57, 55
K
—
LCD common output-only pins.
LCD driving power supply pin.
53
50
52
49
V3
LCD driving power supply pin when booster is selected.
LCD segment output when booster is not selected.
57
V0/SEG0
— / K
When MB89P485 is used, connect an external 0.1 µF
capacitor between this pin and the ground.
31
24
23
C
—
N.C. pin when MB89485/485L, MB89P485L or
MB89PV480 is used.
64
32
41
57
25
34
56
24
33
VCC
VSS
—
—
—
Power supply pin (+3 V or +5 V).
Power supply pin (GND).
AVCC
A/D converter power supply pin.
A/D converter power supply pin.
Use at the same voltage level as VSS
42
35
34
AVSS
—
.
*1: DIP-64P-M01
*2: MQP-64C-P01
*3: FPT-64P-M09
*4: MDP-64C-P02
11
MB89480/480L Series
■ External EPROM Socket (MB89PV480 only)
Pin number
Pin
I/O
Function
name
MDIP*1 MQFP*2
91
90
66
87
85
88
89
67
68
69
70
71
72
73
74
95
94
67
91
88
92
93
68
69
70
71
72
73
74
75
A14
A13
A12
A11
A10
A9
A8
A7
A6
A5
O
Address output pins.
A4
A3
A2
A1
A0
83
82
81
80
79
77
76
75
86
85
84
83
82
79
78
77
O8
O7
O6
O5
O4
O3
O2
O1
I
Data input pins.
65
76
81
90
65
76
81
90
N.C.
VPP
—
Internally connected pins. Always leave open.
65
78
84
86
92
66
80
87
89
96
O
O
O
O
O
“H” level output pin.
V
SS
Power supply pin (GND).
CE
OE
Chip enable pin for the EPROM. Outputs “H” in standby mode.
Output enable pin for the EPROM. Always outputs “L”.
Power supply pin for the EPROM.
V
CC
*1: MDP-64C-P02
*2: MQP-64C-P01
12
MB89480/480L Series
■ I/O CIRCUIT TYPE
Type
Circuit
Remarks
• Main/Sub-clock circuit
• Oscillation feedback resistance
is approx. 500 kΩ for main clock
circuit and 5 MΩ for sub-clock
circuit.
X1 (X1A)
N-ch P-ch
P-ch
X0 (X0A)
A
N-ch
N-ch
Stop mode control signal
• Hysteresis input
• The pull-down resistor (not
available in MB89P485/P485L)
Approx. 50 kΩ
B
R
• Thepull-upresistor(P-channel)
Approx. 50 kΩ
R
• Hysteresis input
P-ch
N-ch
C
• CMOS output
• CMOS input
pull-up
resistor register
R
• Hysteresis input
• Selectable pull-up resistor
Approx. 50 kΩ
P-ch
P-ch
D
N-ch
port
resource
• CMOS output
• CMOS input
pull-up
resistor register
R
• Selectable pull-up resistor
Approx. 50 kΩ
P-ch
N-ch
P-ch
E
port
(Continued)
13
MB89480/480L Series
(Continued)
Type
Circuit
Remarks
• N-ch open-drain output
• CMOS input
• Hysteresis input
N-ch
F
port
resources
• N-ch open-drain output
• CMOS input
• Analog input
N-ch
G
port
analog input
• N-ch open-drain output
• CMOS input
H
N-ch
port
• N-ch open-drain output
I
N-ch
• CMOS input
J
port
• LCD segment output
P-ch
N-ch
K
P-ch
N-ch
14
MB89480/480L Series
■ HANDLING DEVICES
1. Preventing Latch-up
Latch-up may occur on CMOS IC if voltage higher than VCC or lower than VSS is applied to input and output pins
other than medium- to high-voltage pins or if higher than the voltage which shows on “1. Absolute Maximum
Ratings” in ■ ELECTRICAL CHARACTERISTICS is applied between VCC and VSS.
When latch-up occurs, power supply current increases rapidly and might thermally damage elements. When
using, take great care not to exceed the absolute maximum ratings.
Also, take care to prevent the analog power supply (AVCC) and analog input from exceeding the digital power
supply (VCC) when the analog system power supply is turned on and off.
2. Treatment of Unused Input Pins
Leaving unused input pins open could cause malfunctions. They should be connected to a pull-up or pull-down
resistor.
3. Treatment of Power Supply Pins on Microcontrollers with A/DConverter
Connect to be AVCC = VCC and AVSS = VSS even if the A/D converter is not in use.
4. Treatment of N.C. Pins
Be sure to leave (internally connected) N.C. pins open.
5. Power Supply Voltage Fluctuations
Although VCC power supply voltage is assured to operate within the rated range, a rapid fluctuation of the voltage
could cause malfunctions, even if it occurs within the rated range. Stabilizing voltage supplied to the IC is therefore
important. As stabilization guidelines, it is recommended to control power so that VCC ripple fluctuations (P-P
value) will be less than 10% of the standard VCC value at the commercial frequency (50 to 60 Hz) and the transient
fluctuation rate will be less than 0.1 V/ms at the time of a momentary fluctuation such as when power is switched.
6. Precautions when Using an External Clock
Even when an external clock is used, oscillation stabilization time is required for power-on reset and wake-up
from stop mode.
7. Notes on noise in the External Reset Pin (RST)
If the reset pulse applied to the external reset pin (RST) does not meet the specifications, it may cause malfunc-
tions. Use caution so that the reset pulse less than the specifications will not be fed to the external reset pin (RST).
15
MB89480/480L Series
■ PROGRAMMING OTPROM IN MB89P485/P485L WITH SERIAL PROGRAMMER
1. Programming the OTPROM with Serial Programmer
• All OTP products can be programmed with serial programmer.
2. Programming the OTPROM
• To program the OTPROM using FUJITSU MCU programmer MB91919-001.
Inquiry : Fujitsu Microelectronics Asia Pte Ltd. :TEL (65)-2810770
FAX (65)-2810220
3. Programming Adapter for OTPROM
• To program the OTPROM using FUJITSU MCU programmer MB91919-001, use the programming adapter
listed below.
Package
Compatible socket adapter
MB91919-812
DIP-64P-M01
FPT-64P-M09
MB91919-813
Inquiry : Fujitsu Microelectronics Asia Pte Ltd. : TEL (65)-2810770
FAX (65)-2810220
4. OTPROM Content Protection
For product with OTPROM content protection feature (MB89P485/P485L-103, MB89P485/P485L-104), OT-
PROM content can be read using serial programmer if the OTPROM content protection mechanism is not
activated.
One predefined area of the OTPROM (FFFCH) is assigned to be used for preventing the read access of OTPROM
content. If the protection code "00H" is written in this address (FFFCH), the OTPROM content cannot be read by
any serial programmer.
Note: The program written into the OTPROM cannot be verified once the OTPROM protection code is written ("00H"
in FFFCH). It is advised to write the OTPROM protection code at last.
5. Programming Yield
All bits cannot be programmed at Fujitsu shipping test to a blanked OTPROM microcomputer, due to its nature.
For this reason, a programming yield of 100% cannot be assured at all times.
16
MB89480/480L Series
■ PROGRAMMING OTPROM IN MB89P485/P485L WITH PARALLEL PROGRAMMER
1. Programming OTPROM with Parallel Programmer
• Only products without protection feature (i.e. MB89P485/P485L-101 and MB89P485/P485L-102) can be pro-
grammed with parallel programmer. Product with protection feature (i.e. MB89P485/P485L-103 and
MB89P485/P485L-104) cannot be programmed with parallel programmer.
2. ROM Writer Adapters and Recommended ROM Writers
• The following shows ROM writer adapters and recommended ROM writers.
Ando Electric Co., Ltd. (Parallel programmer)
Package name
Applicable adapter model
Recommended writer
AF9708*
AF9709*
AF9723*
DIP-64P-M01
ROM2-64SD-32DP-8LA2
FPT-64P-M09
ROM2-64QF2-32DP-8LA3
* : For the programmer and the version of the programmer, contact the Flash Support Group, Inc.
Fujitsu Microelectronics Asia Pte Ltd. (Serial programmer)
Package name
DIP-64P-M01
FPT-64P-M09
Applicable adapter model
MB91919-604
Recommended writer
MB91919-001
MB91919-605
Inquiries : Fujitsu Microelectronics Asia Pte Ltd. : TEL (65)-2810770
Sunhayato Corp.
: TEL 81-(3)-3986-7791
: FAX 81-(3)-3971-0535
E-mail : adapter@sunhayato.co.jp
: FAX 81-(53)-428-8377
Flash Support Group, Inc
E-mail : support@j-fsg.co.jp
3. Writing Data to the OTPROM using Writer from Minato Electronics Co., Ltd.
(1) Set the OTPROM writer for the CU50-OTP (device code: cdB6DC).
(2) Load the program data to the OTPROM writer.
(3) Write data using the OTPROM writer.
4. Programming Yield
All bits cannot be programmed at Fujitsu shipping test to a blanked OTPROM microcomputer, due to its nature.
For this reason, a programming yield of 100% cannot be assured at all times.
17
MB89480/480L Series
■ PROGRAMMING TO THE EPROM WITH PIGGYBACK/EVALUATION DEVICE
1. EPROM for Use
MBM27C256A-20TVM
2. Programming Socket Adapter
To program to the PROM using an EPROM programmer, use the socket adapter (manufacturer: Sun Hayato
Co., Ltd.) listed below.
Package
LCC-32 (Rectangle)
Adapter socket part number
ROM-32LC-28DP-S
Inquiry: Sun Hayato Co., Ltd.: TEL 81-3-3986-0403
3. Memory Space
Memory space in each mode is shown in the diagram below.
Address
0000H
Corresponding addresses on the EPROM programmer
Normal operating mode
I/O
0080H
RAM
0480H
8000H
Not available
0000H
PROM
32KB
EPROM
32KB
7FFFH
FFFFH
4. Programming to the EPROM
(1) Set the EPROM programmer to the MBM27C256.
(2) Load program data into the EPROM programmer at 0000H to 7FFFH.
(3) Program to 0000H to 7FFFH with the EPROM programmer.
18
MB89480/480L Series
■ BLOCK DIAGRAM
CMOS I/O port
X0
X1
Main clock
oscillator
P07/INT27/BUZ
P06/INT26/PPG
P05/INT25/PWC
Buzzer output
6-bit PPG
Clock controller
Sub-clock
oscillator
X0A
X1A
8-bit
PWC timer
Reset circuit
(Watchdog timer)
P04/INT24*1
P03/INT23 *1
RST
8
External interrupt 2
(level)
21-bit timebase
timer
P02/INT22
to P00/INT20
AVcc
AVss
Watch prescaler
CMOS I/O port *4
8-bit PWM timer
4
10-bit
A/D converter
P20/PWM
P14/SEG27/AN0 *1
to
4
4
P21/SCK
P22/SO
P23/SI
N-ch open-drain I/O port
P17/SEG30/AN3 *1
UART/SIO
4
External interrupt 1
8/16-bit
timer/counter 21,22
(edge)
P24/C1/TO2 *1
P25/C0/EC2 *1
P26/V1/TO1
P27/V2/EC1
P10/SEG23/INT10
to
P13/SEG26/INT13
8/16-bit
timer/counter 11,12
8
2
Booster
2
7
2
SEG1 to SEG7
COM0 to COM1
LCD controller/driver
32 × 4-bit display
2
V3
V0/SEG0 *3
P30/COM2
P31/COM3
N-ch open-drain output port
P57
RAM (16 bytes)
16
P56/SEG22
to P54/SEG20
RAM
3
P53/SEG19
to P50/SEG16
4
2
F MC-8L
CPU
P47/SEG15
4
4
to P44/SEG12
P43/SEG11
to P40/SEG8
N-ch open-drain I/O port
ROM
Other pins
Vcc, Vss, MODE, C *2
*1: If booster is selected, EC2 and TO2 will be redirected to P03/INT23 and P04/INT24 respectively.
Segment output of P14/SEG27/AN0 to P17/SEG30/AN3 will be disabled.
*2: For product other than MB89P485, C pin is NC pin.
*3: If booster is selected, it serves as V0. If booster is not selected, it serves as SEG0.
*4: P20 to P23 are CMOS I/O ports. P24 to P27 are N-ch open-drain I/O ports. P57 is input-only port.
19
MB89480/480L Series
■ CPU CORE
1. Memory Space
The microcontrollers of the MB89480 series offer a memory space of 64 Kbytes for storing all of I/O, data, and
program areas. The I/O area is located the lowest address. The data area is provided immediately above the
I/O area. The data area can be divided into register, stack, and direct areas according to the application. The
program area is located at exactly the opposite end, that is, near the highest address. Provide the tables of
interrupt reset vectors and vector call instructions toward the highest address within the program area. The
memory space of the MB89480 series is structured as illustrated below.
Memory Space
MB89485/485L
MB89P485/P485L
MB89PV480
I/O
0000
H
H
0000
H
H
0000
H
I/O
I/O
0080
0080
0080
0100
H
RAM
RAM
RAM
0100
H
0100
H
H
General-
purpose
registers
General-
purpose
registers
General-
purpose
registers
H
0200
H
H
0200
H
0200
0280
0280
H
H
0480
Vacant
Vacant
Vacant
8000
H
External
ROM
(32KB)
C000
H
C000
H
ROM
ROM
FFC0
FFFFH
FFC0
FFFFH
FFC0
FFFFH
H
H
H
Vector table (reset, interrupt, vector call instruction)
20
MB89480/480L Series
2. Registers
The F2MC-8L family has two types of registers; dedicated registers in the CPU and general-purpose registers
in the memory. The following registers are provided:
Program counter (PC)
Accumulator (A)
: A 16-bit register for indicating instruction storage positions.
: A 16-bit temporary register for storing arithmetic operations, etc. When the
instruction is an 8-bit data processing instruction, the lower byte is used.
Temporary accumulator (T) : A 16-bit register for performing arithmetic operations with the accumulator.
When the instruction is an 8-bit data processing instruction, the lower byte is used.
Index register (IX)
Extra pointer (EP)
Stack pointer (SP)
Program status (PS)
: A 16-bit register for index modification.
: A 16-bit pointer for indicating a memory address.
: A 16-bit register for indicating a stack area.
: A 16-bit register for storing a register pointer, a condition code.
Initial value
16 bits
PC
A
: Program counter
: Accumulator
FFFD
H
Undefined
Undefined
Undefined
Undefined
Undefined
T
: Temporary accumulator
: Index register
IX
EP
SP
PS
: Extra pointer
: Stack pointer
: Program status
I-flag = 0, IL1, 0 = 11
Other bits are undefined.
The PS can further be divided into higher 8 bits for use as a register bank pointer (RP) and the lower 8 bits for
use as a condition code register (CCR). (See the diagram below.)
Structure of the Program Status Register
15
14
13
12
11
10
9
8
7
6
I
5
4
3
2
Z
1
0
PS
RP
Vacancy Vacancy Vacancy
H
IL1, 0
N
V
C
RP
CCR
21
MB89480/480L Series
The RP indicates the address of the register bank currently in use. The relationship between the pointer contents
and the actual address is based on the conversion rule illustrated below.
Rule for Conversion of Actual Addresses of the General-purpose Register Area
RP
Lower OP codes
“0” “0” “0” “0” “0” “0” “0” “1” R4 R3 R2 R1 R0 b2 b1 b0
↓
↓
↓
↓
↓
↓
↓
↓
↓
↓
↓
↓
↓
↓
↓
↓
Generated addresses A15 A14 A13 A12 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0
The CCR consists of bits indicating the results of arithmetic operations and the contents of transfer data and
bits for control of CPU operations at the time of an interrupt.
H-flag : Set to "1" when a carry or a borrow from bit 3 to bit 4 occurs as a result of an arithmetic operation. Clear
to "0" otherwise. This flag is for decimal adjustment instructions.
I-flag
: Interrupt is allowed when this flag is set to "1". Interrupt is prohibited when the flag is set to "0". Clear
to "0" when reset.
IL1, 0
: Indicates the level of the interrupt currently allowed. Processes an interrupt only if its request level is
higher than the value indicated by this bit.
IL1
IL0
0
Interrupt level
Priority
0
0
1
1
High
1
1
0
2
3
1
Low = no interrupt
N-flag : Set to "1" if the MSB is set to "1" as the result of an arithmetic operation. Clear to "0" otherwise.
Z-flag
V-flag
: Set to "1" when an arithmetic operation results in "0". Clear to "0" otherwise.
: Set to "1" if a signed numeric value overflows because of an arithmetic calculation. Clear to "0" if the
overflow does not occur.
C-flag : Set to "1" when a carry or a borrow from bit 7 occurs as a result of an arithmetic operation. Clear to
"0" otherwise. Set to the shift-out value in the case of a shift instruction.
22
MB89480/480L Series
The following general-purpose registers are provided:
General-purpose registers: An 8-bit register for storing data
The general-purpose registers are 8 bits and located in the register banks of the memory. One bank contains
eight registers. Up to a total of 32 banks can be used on the MB89480 series. The bank currently in use is
indicated by the register bank pointer (RP).
Register Bank Configuration
This address = 0100 + 8 × (RP)
H
R 0
R 1
R 2
R 3
R 4
R 5
R 6
R 7
32 banks
Memory area
23
MB89480/480L Series
■ I/O MAP
Address
00H
Register name
PDR0
Register description
Port 0 data register
Read/Write
R/W
Initial value
XXXXXXXXB
00000000B
XXXXXXXXB
00000000B
00000000B
01H
DDR0
Port 0 data direction register
Port 1 data register
W*
02H
PDR1
R/W
03H
DDR1
Port 1 data direction register
Port 2 data register
W*
04H
PDR2
R/W
05H
(Reserved)
06H
DDR2
SYCC
STBC
WDTC
TBTC
WPCR
PDR3
Port 2 data direction register
System clock control register
Standby control register
R/W
R/W
R/W
W*
00000000B
X-1MM100B
00010XXXB
0---XXXXB
00---000B
07H
08H
09H
Watchdog timer control register
Timebase timer control register
Watch prescaler control register
Port 3 data register
0AH
0BH
0CH
0DH
0EH
0FH
R/W
R/W
R/W
00--0000B
------11B
(Reserved)
RSFR
PDR4
PDR5
Reset flag register
Port 4 data register
Port 5 data register
R
XXXX----B
11111111B
X1111111B
(Reserved)
(Reserved)
(Reserved)
10H
R/W
R/W
11H
12H
13H to 1FH
20H
SMC1
SMC2
SRC
UART/SIO mode control register 1
UART/SIO mode control register 2
UART/SIO rate control register
UART/SIO status/data register
UART/SIO data register
R/W
R/W
R/W
R
00000000B
00000000B
XXXXXXXXB
00001---B
21H
22H
23H
SSD
24H
SIDR/SODR
EIC1
R/W
R/W
R/W
R/W
R/W
XXXXXXXXB
00000000B
00000000B
00000000B
-------0B
25H
External interrupt 1 control register 1
External interrupt 1 control register 2
External interrupt 2 enable register
External interrupt 2 flag register
(Reserved)
26H
EIC2
27H
EIE2
28H
EIF2
29H to 2BH
2CH
2DH
2EH
2FH
ADC1
ADC2
ADDH
ADDL
ADEN
PCR1
PCR2
PLBR
A/D control register 1
R/W
R/W
R
-0000000B
-0000001B
------XXB
A/D control register 2
A/D data register (Upper byte)
A/D data register (Lower byte)
A/D input enable register
R
XXXXXXXXB
1111----B
30H
R/W
R/W
R/W
R/W
31H
PWC control register 1
0-0--000B
32H
PWC control register 2
00000000B
XXXXXXXXB
33H
PWC reload buffer register
(Continued)
24
MB89480/480L Series
(Continued)
Address
Register name
CNTR
Register description
PWM timer control register
Read/Write
R/W
W*
Initial value
0-000000B
34H
35H
COMR
PWM timer compare register
Timer 22 control register
Timer 21 control register
Timer 22 data register
Timer 21 data register
Timer 12 control register
Timer 11 control register
Timer 12 data register
Timer 11 data register
PPG control register 1
PPG control register 2
Buzzer control register
XXXXXXXXB
000000X0B
000000X0B
XXXXXXXXB
XXXXXXXXB
000000X0B
000000X0B
XXXXXXXXB
XXXXXXXXB
00000000B
0-000000B
36H
T22CR
T21CR
T22DR
T21DR
T12CR
T11CR
T12DR
T11DR
PPGC1
PPGC2
BUZR
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
37H
38H
39H
3AH
3BH
3CH
3DH
3EH
3FH
40H
-----000B
41H to 5DH
5EH
(Reserved)
LCR1
LCR2
LCD controller control register 1
LCD controller control register 2
LCD data RAM
R/W
R/W
R/W
R/W
00010000B
-0000000B
5FH
60H to 6FH
70H
VRAM
PURC0
XXXXXXXXB
11111111B
Port 0 pull up resistor control register
(Reserved)
71H
72H
PURC2
Port 2 pull up resistor control register
(Reserved)
R/W
----1111B
73H to 7AH
7BH
ILR1
ILR2
ILR3
ILR4
Interrupt level setting register 1
Interrupt level setting register 2
Interrupt level setting register 3
Interrupt level setting register 4
(Reserved)
W*
W*
W*
W*
11111111B
11111111B
11111111B
11111111B
7CH
7DH
7EH
7FH
* : Bit manipulation instruction cannot be used.
• Read/write access symbols
R/W : Readable and writable
R
W
: Read-only
: Write-only
• Initial value symbols
0
1
X
-
: The initial value of this bit is “0”.
: The initial value of this bit is “1”.
: The initial value of this bit is undefined.
: Unused bit.
M
: The initial value of this bit is determined by mask option.
25
MB89480/480L Series
■ ELECTRICAL CHARACTERISTICS
1. Absolute Maximum Ratings
(AVSS = VSS = 0.0 V)
Value
Symbol
Unit
Remarks
Parameter
Min
Max
MB89PV480, MB89P485,
MB89485
AVCC must not exceed VCC
VCC
AVCC
VSS – 0.3
VSS + 6.0
V
Power supply voltage
VCC
AVCC
MB89P485L, MB89485L
AVCC must not exceed VCC
VSS – 0.3
VSS + 4.0
V
V
V
LCD power supply voltage
Input voltage
V0 to V3 VSS – 0.3 VSS + 6.0
P00 to P07, P10 to P17, P20 to
P27, P40 to P47, P50 to P57
VI
VSS – 0.3 VCC + 0.3
P00 to P07, P10 to P17, P20 to
P27, P30 to P31, P40 to P47, P50
to P56
Output voltage
VO
VSS – 0.3 VCC + 0.3
V
Maximum clamp current
ICLAMP
∑ |ICLAMP|
IOL
– 2.0
+ 2.0
20
mA
mA
mA
*
*
Total maximum clamp current
“L” level maximum output current
15
Average value (operating current ×
operating rate)
“L” level average output current
IOLAV
4
mA
mA
“L” level total maximum output
current
∑IOL
100
“L” level total average output
current
Average value (operating current ×
operating rate)
∑IOLAV
IOH
40
–15
–4
mA
mA
mA
“H” level maximum output current
Average value (operating current ×
operating rate)
“H” level average output current
IOHAV
“H” level total maximum output
current
∑IOH
–50
–20
mA
mA
“H” level total average output
current
Average value (operating current ×
operating rate)
∑IOHAV
Power consumption
Operating temperature
Storage temperature
PD
TA
300
+85
mW
°C
–40
–55
Tstg
+150
°C
Precautions: Permanent device damage may occur if the above “Absolute Maximum Ratings” are exceeded.
Functional operation should be restricted to the conditions as detailed in the operational sections of
this data sheet. Exposure to absolute maximum rating conditions for extended periods may affect
device reliability.
* : • Applicable to pins: P00 to P07, P20 to P23, AN0 to AN3
• Use within recommended operating conditions.
• Use at DC voltage (current).
• The +B signal should always be applied with a limiting resistance placed between the +B signal and the
microcontroller.
• The value of the limiting resistance should be set so that when the +B signal is applied the input current to
the microcontroller pin does not exceed rated values, either instantaneously or for prolonged periods.
26
MB89480/480L Series
• Note that when the microcontroller drive current is low, such as in the power saving modes, the +B input
potential may pass through the protective diode and increase the potential at the Vcc pin, and this may affect
other devices.
• Note that if a +B signal is input when the microcontroller current is off (not fixed at 0 V), the power supply is
provided from the pins, so that incomplete operation may result.
• Note that if the +B input is applied during power-on, the power supply is provided from the pins and the resulting
supply voltage may not be sufficient to operate the power-on result.
• Care must be taken not to leave the +B input pin open.
• Note that analog system input/output pins other than the A/D input pins (LCD drive pins, comparator input
pins, etc.) cannnot accept +B signal input.
• Sample recommended circuits :
Input/Output Equivalent circuits
Protective diode
VCC
Limiting
resistance
P-ch
N-ch
B input (0 V to 16 V)
R
WARNING: Semiconductor devices can be permanently damaged by application of stress (voltage, current,
temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings.
2. Recommended Operating Conditions
(AVSS = VSS = 0.0 V)
Value
Symbol
Unit
Remarks
Parameter
Min
Max
Operation assurance
range
2.2*
5.5
V
V
V
MB89485
Operation assurance
range
3.5*
2.7*
5.5
5.5
MB89P485
MB89PV480
Operation assurance
range
VCC
AVCC
Power supply voltage
MB89485,
MB89P485,
MB89PV480
Retains the RAM state in
stop mode
1.5
5.5
V
Operation assurance
range
2.2*
1.5
3.6
3.6
V
V
MB89485L,
MB89P485L
Retains the RAM state in
stop mode
LCD power supply voltage
Operating temperature
V0 to V3
TA
Vss
–40
Vcc
+85
V
°C
27
MB89480/480L Series
* : These values depend on the operating conditions and the analog assurance range. See Figure 1, 2, 3 and
“5. A/D Converter Electrical Characteristics.”
Operating
voltage (V)
5.5
Analog accuracy
assurance range :
Vcc = AVcc =4.5V~5.5V
5.0
4.5
4.0
3.5
3.0
2.7
2.2
2.0
Main clock
operating freq. (MHz)
11.0 12.0 12.5
1.0
4.0
2.0
3.0
4.0
1.0
5.0
0.8
6.0
7.0
8.0
9.0 10.0
Min execution
2.0 1.33
0.66 0.57 0.50 0.44 0.4 0.36 0.33
0.32
time (inst. cycle) (µs)
Note : The shaded area is not assured for MB89P485
Figure 1 Operating Voltage vs. Main Clock Operating Frequency (MB89P485/485)
Operating
voltage (V)
3.6
Analog accuracy
assurance range :
Vcc = AVcc = 2.7V~3.6V
3.0
2.7
2.2
2.0
Main clock
operating freq. (MHz)
11.0 12.0 12.5
1.0
4.0
2.0
3.0
4.0
1.0
5.0
0.8
6.0
7.0
8.0
9.0 10.0
Min execution
2.0 1.33
0.66 0.57 0.50 0.44 0.4 0.36 0.33
0.32
time (inst. cycle) (µs)
Note : The shaded area is not assured for MB89P485L
Figure 2 Operating Voltage vs. Main Clock Operating Frequency (MB89P485L/485L)
28
MB89480/480L Series
Operating
voltage (V)
5.5
Analog accuracy
assurance range :
Vcc = AVcc = 4.5V~5.5V
5.0
4.5
4.0
3.5
3.0
2.7
Main clock
operating Freq. (MHz)
11.0 12.0 12.5
1.0
4.0
2.0
3.0
4.0
1.0
5.0
0.8
6.0
7.0
8.0
9.0 10.0
Min execution
2.0 1.33
0.66 0.57 0.50 0.44 0.4 0.36 0.33
0.32
time (inst. cycle) (µs)
Figure 3 Operating Voltage vs. Main Clock Operating Frequency (MB89PV480)
Figure 1, 2 and 3 indicate the operating frequency of the external oscillator at an instruction cycle of 4/FCH.
Since the operating voltage range is dependent on the instruction cycle, see minimum execution time if the
operating speed is switched using a gear.
WARNING: The recommended operating conditions are required in order to ensure the normal operation of the
semiconductor device. All of the device’s electrical characteristics are warranted when the device is
operated within these ranges.
Always use semiconductor devices within their recommended operating condition ranges. Operation
outside these ranges may adversely affect reliability and could result in device failure.
No warranty is made with respect to uses, operating conditions, or combinations not represented on
the data sheet. Users considering application outside the listed conditions are advised to contact their
FUJITSU representatives beforehand.
29
MB89480/480L Series
3. DC Characteristics
(AVCC = VCC = 5.0 V for MB89PV480, MB89P485, MB89485, AVSS = VSS = 0.0 V, TA = –40°C to +85°C)
AVCC = VCC = 3.0 V for MB89P485L, MB89485L, AVSS = VSS = 0.0 V, TA = –40°C to +85°C)
Value
Parameter Symbol
Pin
Condition
Unit
Remarks
Min
Typ
Max
P00 to P07,
P10 to P17,
P20 to P27,
P40 to P47,
P50 to P57
VIH
—
0.7 VCC
—
VCC + 0.3
V
“H” level
input voltage
RST, MODE, EC1,
EC2, PWC, SCK,
SI, INT10 to INT13,
INT20 to INT27
VIHS
—
—
—
—
0.8 VCC
VSS − 0.3
VSS − 0.3
VSS − 0.3
—
—
—
—
VCC + 0.3
0.3 VCC
0.2 VCC
V
V
V
V
P00 to P07,
P10 to P17,
P20 to P27,
P40 to P47,
P50 to P57
VIL
“L” level
input voltage
RST, MODE, EC1,
EC2, PWC, SCK,
SI, INT10 to INT13,
INT20 to INT27
VILS
P10 to P17,
P24 to P27,
P30 to P31,
P40 to P47,
P50 to P56
Product with-
out booster
Open-drain
output pin
application
voltage
VCC + 0.3
V3
VD
Product with
booster
MB89PV480,
MB89P485,
MB89485
4.0
2.2
—
—
—
—
V
V
“H” level
output
voltage
P00 to P07,
P20 to P23
VOH
IOH = –2.0 mA
MB89P485L,
MB89485L
P00 to P07,
P10 to P17,
P20 to P27,
P30 to P31,
P40 to P47,
P50 to P56, RST
MB89PV480,
MB89P485,
MB89485
—
—
0.4
V
IOL = 4.0 mA
“L” level
output
voltage
VOL
P00 to P07,
P20 to P23, RST
MB89P485L,
MB89485L
—
—
—
—
0.4
0.4
V
V
P10 to P17,
P24 to P27,
P30 to P31,
P40 to P47,
P50 to P56
MB89P485L,
MB89485L
IOL = 2.0 mA
(Continued)
30
MB89480/480L Series
(Continued)
(AVCC = VCC = 5.0 V for MB89PV480, MB89P485, MB89485, AVSS = VSS = 0.0 V, TA = –40°C to +85°C)
AVCC = VCC = 3.0 V for MB89P485L, MB89485L, AVSS = VSS = 0.0 V, TA = –40°C to +85°C)
Value
Parameter Symbol
Pin
Condition
Unit
Remarks
Min
Typ
Max
P00 to P07,
P10 to P17,
P20 to P27,
P40 to P47,
P50 to P57
Input
leakage
current
Without
µA pull-up
ILI
0.45 V < VI < VCC
−5
—
+5
resistor
P10 to P17,
P24 to P27,
P30 to P31,
P40 to P47,
P50 to P56
Open-drain
output
leakage
current
ILOD
0.45 V < VI < VCC
−5
—
+5
µA
Except
kΩ MB89P485,
MB89P485L
Pull-down
resistance
RDOWN MODE
VI = VCC
25
25
50
50
100
100
When pull-up
resistor is
selected
(except RST)
P00 to P07,
Pull-up
resistance
RPULL
P20 to P23,
RST
VI = 0.0 V
kΩ
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
6
3
13
7
MB89485
FCH = 10 MHz,
tinst = 0.4 µs,
Main clock run
mode
MB89485L
mA
ICC1
5
10
8
MB89P485
4
MB89P485L
MB89485
0.9
0.4
0.9
0.5
2
3
FCH = 10 MHz,
tinst = 6.4 µs,
Main clock run
mode
1.5
3
MB89485L
mA
ICC2
ICCS1
ICCS2
ICCL
MB89P485
2
MB89P485L
MB89485
5
FCH = 10 MHz,
tinst = 0.4 µs,
Main clock sleep
mode
Power
supply
current
1
2.5
5
MB89485L
mA
VCC
2.5
1.2
0.7
0.3
0.9
0.4
40
22
400
25
MB89P485
2.5
2
MB89P485L
MB89485
FCH = 10 MHz,
tinst = 6.4 µs,
Main clock sleep
mode
1
MB89485L
mA
2
MB89P485
1
MB89P485L
MB89485
85
50
800
50
FCL = 32.768 kHz,
TA = +250C,
Sub-clock run
mode
MB89485L
µA
MB89P485
MB89P485L
(Continued)
31
MB89480/480L Series
(AVCC = VCC = 5.0 V for MB89PV480, MB89P485, MB89485, AVSS = VSS = 0.0 V, TA = –40°C to +85°C)
AVCC = VCC = 3.0 V for MB89P485L, MB89485L, AVSS = VSS = 0.0 V, TA = –40°C to +85°C)
Value
Parameter Symbol
Pin
Condition
Unit
Remarks
Min
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Typ
15
7
Max
30
15
30
15
10
5
MB89485
FCL = 32.768 kHz,
TA = +250C,
Sub-clock sleep mode
MB89485L
MB89P485
MB89P485L
MB89485
ICCLS
µA
12
7
2
TA = +250C,
Watch mode,
Main clock stop mode
1
MB89485L
MB89P485
MB89P485L
MB89485
ICCT
VCC
µA
µA
mA
µA
kΩ
5
15
5
1
1
5
Power
TA = +250C,
Sub-clock stop mode
0.8
3
4
MB89485L
MB89P485
MB89P485L
MB89485
supply
current
ICCH
10
4
0.8
1.3
1
6
3
MB89485L
MB89P485
MB89P485L
MB89485
IA
A/D conversion active
1.3
1
6
3
AVcc
1
5
TA = +250C,
A/D conversion stop
0.8
1
4
MB89485L
MB89P485
MB89P485L
IAH
5
0.8
4
MB89P485L,
MB89485L
V1 to V3 = +3.0 V
V1 to V3 = +5.0 V
V1 to V3 = +3.0 V
V1 to V3 = +5.0 V
Common
output
COM0 to
COM3
RVCOM
—
—
2.5
MB89PV480,
MB89P485,
MB89485
impedance
MB89P485L,
MB89485L
Segment
output
SEG0 to
SEG30
RVSEG
—
—
15
kΩ
kΩ
MB89PV480,
MB89P485,
MB89485
impedance
LCD
divided
resistance
RLCD
—
Between VCC and VSS
300
500
750
(Continued)
32
MB89480/480L Series
(Continued)
(AVCC = VCC = 5.0 V for MB89PV480, MB89P485, MB89485, AVSS = VSS = 0.0 V, TA = –40°C to +85°C)
AVCC = VCC = 3.0 V for MB89P485L, MB89485L, AVSS = VSS = 0.0 V, TA = –40°C to +85°C)
Value
Parameter Symbol
LCD
Pin
Condition
Unit
Remarks
Min
Typ
Max
V0 to V3,
COM0 to
COM3,
controller/
driver
ILCDL
—
—
—
±1
µA
leakage
current
SEG0 to
SEG30
Booster for
LCD driving
output
VV3
VV2
V3
V1 = 1.5 V
4.3
2.9
4.5
3.0
4.7
3.1
V
V
V2
V1 = 1.5 V
voltage
Reference
inputvoltage
for LCD
Products
with booster
only
VV1
V1
V1
IIN = 0.0 µA
1.4
1.5
1.7
V
driving
Reference
voltageinput
impedance
RRIN
—
8.5
—
9.8
5
11
15
kΩ
Other than
VCC, VSS,
AVCC, AVSS
Input
capacitance
CIN
f = 1 MHz
pF
33
MB89480/480L Series
4. AC Characteristics
(1) Reset Timing
(AVCC = VCC = 5.0 V for MB89PV480, MB89P485, MB89485, AVSS = VSS = 0.0 V, TA = –40°C to +85°C)
AVCC = VCC = 3.0 V for MB89P485L, MB89485L, AVSS = VSS = 0.0 V, TA = –40°C to +85°C)
Value
Symbol
Condition
Unit
Remarks
Parameter
Min
Max
RST “L” pulse width
tZLZH
—
48 tHCYL
—
ns
Note : tHCYL is the oscillation cycle (1/FCH) to input to the X0 pin.
The MCU operation is not guaranteed when the "L" pulse width is shorter than tZLZH.
t
ZLZH
RST
0.2 VCC
0.2 VCC
(2) Power-on Reset
(AVSS = VSS = 0.0 V, TA = –40°C to +85°C)
Value
Min
Symbol Condition
Unit
Remarks
Parameter
Max
50
Power supply rising time
Power supply cut-off time
tR
—
1
ms
ms
—
tOFF
—
Due to repeated operations
Note : Make sure that power supply rises within the selected oscillation stabilization time.
Rapid changes in power supply voltage may cause a power-on reset. If power supply voltage needs to be
varied in the course of operation, a smooth voltage rise is recommended.
t
OFF
t
R
Vth
0.2 V
0.2 V
0.2 V
VCC
Vth = 3.5 V for MB89PV480, MB89P485 and MB89485
Vth = 1.8 V for MB89P485L and MB89485L
34
MB89480/480L Series
(3) Clock Timing
(AVSS = VSS = 0.0 V, TA = –40°C to +85°C)
Value
Symbol
Pin
Unit
Remarks
Parameter
Clock frequency
Clock cycle time
Min
1
Typ
—
Max
FCH
FCL
X0, X1
X0A, X1A
X0, X1
12.5 MHz
—
80
—
32.768
—
—
1000
—
kHz
ns
tHCYL
tLCYL
X0A, X1A
30.5
µs
PWH
PWL
X0
X0A
20
—
—
—
15.2
—
—
—
10
ns
µs
ns
Input clock pulse width
PWHL
PWLL
External clock
tCR
tCF
Input clock rising/falling time
X0, X0A
X0 and X1 Timing and Conditions
t
HCYL
PWH
P
WL
t
CR
t
CF
0.8 VCC
0.8 VCC
X 0
0.2 VCC
0.2 VCC
0.2 VCC
Main Clock Conditions
When a crystal
or
ceramic reasonator is used
When an external clock is used
X0
X1
X0
X1
Open
F
CH
FCH
C1
C2
35
MB89480/480L Series
Sub-clock Timing and Conditions
t
LCYL
0.8 VCC
0.2 VCC
X0A
PWHL
PWLL
t
CR
t
CF
Sub-clock Conditions
When a crystal
or
ceramic oscillator is used
When an external clock is used
When subclock is not used
X0A
X1A
X0A
X1A
X0A
X1A
FCL
Rd
Open
Open
FCL
C0
C1
(4) Instruction Cycle
Symbol
Value
Unit
Remarks
Parameter
(4/FCH)tinst = 0.32 µs when operating
at FCH = 12.5 MHz
4/FCH, 8/FCH, 16/FCH, 64/FCH
2/FCL
µs
Instruction cycle
(minimum execution time)
tinst
tinst = 61.036 µs when operating at
FCL = 32.768 kHz
µs
36
MB89480/480L Series
(5) Serial I/O Timing
(AVCC = VCC = 5.0 V for MB89PV480, MB89P485, MB89485,
AVCC = VCC = 3.0 V for MB89P485L, MB89485L
AVSS = VSS= 0.0 V, TA = –40°C to +85°C)
Value
Symbol
Pin
Condition
Unit
Parameter
Min
2 tinst*
–200
Max
—
Serial clock cycle time
SCK ↓ → SO time
tSCYC
tSLOV
tIVSH
tSHIX
tSHSL
tSLSH
tSLOV
tIVSH
tSHIX
SCK
µs
ns
µs
µs
µs
µs
ns
µs
µs
Internal
shift clock
mode
SCK, SO
SI, SCK
SCK, SI
200
—
Valid SI → SCK ↑
1/2 tinst*
1/2 tinst*
1 tinst*
1 tinst*
0
SCK ↑ → valid SI hold time
Serial clock “H” pulse width
Serial clock “L” pulse width
SCK ↓ → SO time
—
—
SCK
—
External
shift clock
mode
SCK, SO
SI, SCK
SCK, SI
200
—
Valid SI → SCK ↑
1/2 tinst*
1/2 tinst*
SCK ↑ → valid SI hold time
—
* : For information on tinst, see “(4) Instruction Cycle.”
37
MB89480/480L Series
Internal Clock Operation
tSCYC
SCK
2.4 V
0.8 V
0.8 V
tSLOV
SO
2.4 V
0.8 V
tIVSH
tSHIX
SI
0.8 VCC
0.2 VCC
0.8 VCC
0.2 VCC
External Clock Operation
tSLSH
tSHSL
SCK
0.8 VCC
0.8 VCC
0.2 VCC
0.2 VCC
tSLOV
SO
SI
2.4 V
0.8 V
tIVSH
0.8 VCC
0.2 VCC
tSHIX
0.8 VCC
0.2 VCC
38
MB89480/480L Series
(6) Peripheral Input Timing
(AVCC = VCC = 5.0 V for MB89PV480, MB89P485, MB89485
AVCC = VCC = 3.0 V for MB89P485L, MB89485L
AVSS = VSS = 0.0 V, TA = –40°C to +85°C)
Value
Symbol
Pin
Unit
Remarks
Parameter
Min
Max
Peripheral input “H” pulse width 1
Peripheral input “L” pulse width 1
tILIH1
tIHIL1
INT10 to INT13,
INT20 to INT27, EC1,
EC2, PWC
2 tinst*
—
µs
µs
2 tinst*
—
* : For information on tinst, see “(4) Instruction Cycle.”
t
IHIL1
t
ILIH1
INT10 to 13,
INT20 to INT27,
EC1, EC2,
PWC
0.8 VCC
0.8 VCC
0.2 VCC
0.2 VCC
39
MB89480/480L Series
5. A/D Converter Electrical Characteristics
(1) A/D Converter Electrical Characteristics
( AVCC = VCC = 4.5 V to 5.5 V for MB89PV480, MB89P485, MB89485,
AVCC = VCC = 2.7 V to 3.6 V for MB89P485L, MB89485L,
AVSS = VSS = 0.0 V, TA = –40°C to +85°C)
Value
Parameter
Resolution
Symbol
Pin
Unit Remarks
Min
—
Typ
10
—
Max
—
bit
Total error
—
±4.0
±2.5
±1.9
LSB
LSB
LSB
—
Linearity error
—
—
Differential linearity error
—
—
—
AVSS – 1.5
LSB
AVSS + 0.5
LSB
AVSS + 2.5
LSB
Zero transition voltage
VOT
mV
mV
Full-scale transition
voltage
AVCC – 4.5
LSB
AVCC – 2.5
LSB
AVCC - 0.5
LSB
VFST
A/D mode conversion time
Analog port input current
Analog input voltage
—
IAIN
—
—
—
—
—
60 tinst*
10
µs
µA
V
AN0 to
AN3
VAIN
AVSS
AVCC
* : For information on tinst, see "(4) Instruction Cycle" in "4. AC Characteristics".
(2) A/D Converter Glossary
• Resolution
Analog changes that are identifiable with the A/D converter.
When the number of bits is 10, analog voltage can be divided into 210 = 1024.
• Linearity error (unit: LSB)
The deviation of the straight line connecting the zero transition point ("00 0000 0000" ↔ "00 0000 0001")
with the full-scale transition point ("11 1111 1111" ↔ "11 1111 1110") from actual conversion characteristics.
• Differential linearity error (unit: LSB)
The deviation of input voltage needed to change the output code by 1 LSB from the theoretical value.
• Total error (unit: LSB)
The difference between theoretical and actual conversion values.
40
MB89480/480L Series
Theoretical I/O characteristics
Total error
3FF
3FE
3FD
3FF
3FE
3FD
V
FST
Actual conversion
value
1.5 LSB
{1 LSB × N + VOT
}
004
003
002
001
004
003
002
001
V
NT
V
OT
Actual conversion
value
1 LSB
Theoretical value
0.5 LSB
AVCC
AVCC
AVSS
AVSS
Analog input
Analog input
V
NT – {1 LSB × N + 0.5 LSB}
1 LSB
V
FST – VOT
1022
Total error =
1 LSB =
(V)
Zero transition error
Full-scale transition error
Theoretical value
004
003
002
001
Actual conversion
value
3FF
3FE
3FD
3FC
Actual conversion
value
V
(Actual
measurement)
FST
Actual conversion
value
Actual conversion value
VOT (Actual measurement)
AVCC
AVSS
Analog input
Analog input
Differential linearity error
Theoretical value
Linearity error
3FF
3FE
3FD
Actual conversion
value
N + 1
Actual conversion
value
{1 LSB × N + VOT
}
V
(N + 1)T
V
(Actual
FST
N
VNT
measurement)
004
003
002
001
N – 1
N – 2
V
NT
Actual conversion value
Actual conversion value
Theoretical value
V
OT (Actual measurement)
AVCC
AVSS
AVCC
AVSS
Analog input
Analog input
VNT – {1 LSB × N + VOT}
1 LSB
V
(N + 1)T – VNT
1 LSB
Linearity error =
– 1
Differential linearity error =
41
MB89480/480L Series
(3) Notes on Using A/D Converter
• Input impedance of the analog input pins
The A/D converter used for the MB89480 series contains a sample and hold circuit as illustrated below to
fetch analog input voltage into the sample and hold capacitor for 16 instruction cycles after activation A/D
conversion.
For this reason, if the output impedance of the external circuit for the analog input is high, analog input
voltage might not stabilize within the analog input sampling period. Therefore, it is recommended to keep
the output impedance of the external circuit low.
Note that if the impedance cannot be kept low, it is recommended to connect an external capacitor of about
0.1 µF for the analog input pin.
Sample hold circuit
Analog input pin
Comparator
If the analog input
impedance is higher
than 10 kΩ, it is
recommended to
connect an external
capacitor of approx.
0.1 µF.
R
C
Close for 16 instruction cycles after
activating A/D conversion.
Analog channel selector
MB89485
MB89PV480
MB89485L
MB89P485
MB89P485L
R: analog input equivalent resistance
C: analog input equivalent capacitance
2.2 kΩ
2.8 kΩ
2.6 kΩ
7.1 kΩ
45 pF
46 pF
28 pF
48.3 pF
42
MB89480/480L Series
■ EXAMPLE CHARACTERISTICS
(1) "L" level output voltage
VOL vs. IOL (MB89485)
VOL vs. IOL (MB89485L)
VOL [V]
0.8
VOL [V]
VCC 2.5 V
1.2
1.0
0.8
0.6
0.4
0.2
0.0
VCC 3.0 V
TA
25 C
TA
25 C
VCC 2.0 V
VCC 3.5 V
VCC 4.0 V
VCC 4.5 V
VCC 5.0 V
VCC 5.5 V
VCC 6.0 V
VCC 3.0 V
VCC 3.5 V
0.6
0.4
0.2
0.0
VCC 4.0 V
IOL [mA]
IOL [mA]
10
0
2
4
6
8
10
0
2
4
6
8
(2) "H" level output voltage
VCC-VOH vs. IOH (MB89485)
VCC-VOH vs. IOH (MB89485L)
VCC-VOH [V]
VCC-VOH [V]
VCC 3.0 V VCC 3.5 V
VCC 2.0 V
VCC 2.5 V
2.0
1.6
1.2
0.8
0.4
2.0
1.6
1.2
0.8
0.4
TA
25 C
TA
25 C
VCC 4.0 V
VCC 4.5 V
VCC 3.0 V
VCC 5.0 V
VCC 5.5 V
VCC 6.0 V
VCC 3.5 V
VCC 4.0 V
IOH [mA]
IOH [mA]
0.0
0.0
0
0
2
4
6
8
10
2
4
6
8
10
43
MB89480/480L Series
(3) "H" level input voltage/"L" level input voltage
CMOS input (MB89485)
CMOS hysteresis input (MB89485)
VIN [V]
4.0
VIN [V]
4.0
TA= +25oC
3.5
TA= +25oC
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
3.0
2.5
2.0
1.5
1.0
0.5
0.0
VIHS
VILS
1
2
3
4
5
6
7
1
2
3
4
5
6
7
Vcc[V]
Vcc [V]
VIHS : Threshold when input voltage in hysteresis
characteristics is set to “H” level.
VILS : Threshold when input voltage in hysteresis
characteristics is set to “L” level.
44
MB89480/480L Series
(4) Power supply current (External clock)
ICC1 vs. VCC (MB89485)
ICC2 vs. VCC (MB89485)
ICC1 [mA]
10.0
ICC2 [mA]
1.6
TA
25 C
TA
25 C
FCH 12.5 MHz
FCH 10.0 MHz
FCH 8.0 MHz
FCH 12.5 MHz
FCH 10.0 MHz
FCH 8.0 MHz
1.4
8.0
6.0
1.2
1.0
0.8
0.6
FCH 4.0 MHz
4.0
2.0
0.0
FCH 4.0 MHz
FCH 2.0 MHz
FCH 1.0 MHz
0.4
FCH 2.0 MHz
FCH 1.0 MHz
0.2
0.0
1
2
3
4
5
6
7
1
2
3
4
5
6
7
VCC [V]
VCC [V]
ICCS1 vs. VCC (MB89485)
ICCS2 vs. VCC (MB89485)
25 C
ICCS1 [mA]
TA
ICCS2 [mA]
1.2
3.5
3.0
2.5
2.0
1.5
1.0
0.5
FCH 12.5 MHz
25 C
TA
FCH 12.5 MHz
FCH 10.0 MHz
FCH 8.0 MHz
1.0
0.8
0.6
0.4
FCH 10.0 MHz
FCH 8.0 MHz
FCH 4.0 MHz
FCH 4.0 MHz
FCH 2.0 MHz
FCH 1.0 MHz
FCH 2.0 MHz
FCH 1.0 MHz
0.2
0.0
0.0
1
2
3
4
5
6
7
1
2
3
4
5
6
7
VCC [V]
VCC [V]
(Continued)
45
MB89480/480L Series
(Continued)
I
CC1 vs. VCC (MB89485L)
25 C
I
CC2 vs. VCC (MB89485L)
25 C
I
CC1 [mA]
I
CC2 [mA]
7.0
1.0
0.8
0.6
0.4
0.2
0.0
T
A
T
A
F
CH 12.5 MHz
6.0
5.0
F
CH 12.5 MHz
F
F
CH 10.0 MHz
CH 8.0 MHz
F
F
CH 10.0 MHz
CH 8.0 MHz
4.0
3.0
F
CH 4.0 MHz
2.0
1.0
F
CH 4.0 MHz
F
F
CH 2.0 MHz
CH 1.0 MHz
F
F
CH 2.0 MHz
CH 1.0 MHz
0.0
1
2
3
5
1
2
3
4
5
4
V
CC [V]
VCC [V]
I
CCS1 vs. VCC (MB89485L)
ICCS2 vs. VCC (MB89485L)
I
CCS1 [mA]
I
CCS2 [mA]
0.7
2.4
2.0
1.6
1.2
0.8
0.4
0.0
T
A
25 C
T
A
25 C
F
CH 12.5 MHz
0.6
0.5
0.4
0.3
0.2
0.1
0.0
F
CH 12.5 MHz
F
F
CH 10.0 MHz
CH 8.0 MHz
F
F
CH 10.0 MHz
CH 8.0 MHz
F
CH 4.0 MHz
F
CH 4.0 MHz
F
F
CH 2.0 MHz
CH 1.0 MHz
F
F
CH 2.0 MHz
CH 1.0 MHz
1
2
3
5
1
2
3
4
5
4
VCC [V]
VCC [V]
46
MB89480/480L Series
(Continued)
ICCL vs. VCC (MB89485)
25 C
ICCT vs. VCC (MB89485)
ICCT [ A]
ICCL [ A]
2.8
60
50
40
30
20
10
0
TA
25 C
TA
FCL 32.768 kHz
2.4
2.0
1.6
1.2
0.8
0.4
0.0
FCL 32.768 kHz
1
2
3
4
5
6
7
1
2
3
4
5
6
7
VCC [V]
VCC [V]
ICCLS vs. VCC (MB89485)
ICCLS [ A]
16
14
12
10
8
TA
25 C
FCL 32.768 kHz
6
4
2
0
1
2
3
4
5
6
7
VCC [V]
47
MB89480/480L Series
(5) Pull-up resistance
RPULL vs. VCC (MB89485)
RPULL vs. VCC (MB89485L)
RPULL [k ]
RPULL [k ]
200
160
120
80
320
280
240
200
160
120
80
40
T
T
T
A
A
A
85 C
25 C
40 C
40
T
T
T
A
A
A
85 C
25 C
40 C
0
0
1
2
3
4
5
6
7
1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
V
CC [V]
VCC [V]
48
MB89480/480L Series
■ MASK OPTIONS
Part number
MB89485 MB89485L MB89P485 MB89P485L
MB89PV480
No.
Specify when
ordering mask
Specifying procedure
Setting not possible
Setting not possible
Booster selection (KSV)
101/103 : Internal resistor 101 : Internal resistor
• Internal resistor ladder
• Booster
1
2
Selectable
ladder
102/104: Booster
ladder
102: Booster
Selection of OTPROM
content protection feature
• No protection feature
• With protection feature
101/102 : No protection
103/104 : With protection
—
—
Selection of oscillation
stabilization time (OSC)
214/FCH (approx.1.3 ms)
217/FCH (approx.10.5 ms)
218/FCH (approx.21.0 ms)
3
4
Selectable OSC
218/FCH (approx.21.0 ms)
218/FCH (approx.21.0 ms)
Selection of power-on
stabilization time
• Nil
• 217/FCH
Selectable Fixed to nil
217/FCH
Fixed to nil
Fixed to nil
49
MB89480/480L Series
■ ORDERING INFORMATION
Part number
MB89485PFM
Package
Remarks
MB89P485-101PFM
MB89P485-102PFM
MB89P485-103PFM
MB89P485-104PFM
MB89485LPFM
64-pin Plastic QFP
(FPT-64P-M09)
MB89P485L-101PFM
MB89P485L-102PFM
MB89P485L-103PFM
MB89P485L-104PFM
101: With internal resistor ladder,
without content protection
102: With booster, without content
protection
103: With internal resistor ladder,
with content protection
104: With booster, with content protection
MB89485P-SH
MB89P485-101P-SH
MB89P485-102P-SH
MB89P485-103P-SH
MB89P485-104P-SH
MB89485LP-SH
64-pin Plastic SH-DIP
(DIP-64P-M01)
MB89P485L-101P-SH
MB89P485L-102P-SH
MB89P485L-103P-SH
MB89P485L-104P-SH
MB89PV480-101C-SH
MB89PV480-102C-SH
64-pin Ceramic MDIP
(MDP-64C-P02)
MB89PV480-101CF
MB89PV480-102CF
64-pin Ceramic MQFP
(MQP-64C-P01)
50
MB89480/480L Series
■ PACKAGE DIMENSIONS
64-pin Plastic SH-DIP
(DIP-64P-M01)
Note: Pins width and pins thickness include plating thickness.
58.00 +–00..5252 2.283 –+..002029
INDEX-1
INDEX-2
17.00±0.25
(.669±.010)
4.95 –+00..2700
.195 +–..000288
0.70 –+00..1590
.028 +–..000270
0.27±0.10
(.011±.004)
3.30 +–00..3200
19.05(.750)
.130 –+..001028
1.378 +–00..2400
.0543 +–..000186
0.47±0.10
(.019±.004)
1.00 +–00.50
1.778(.0700)
0~15
M
0.25(.010)
.039 –+..0020
C
2001 FUJITSU LIMITED D64001S-c-4-5
Dimensions in mm (inches)
Note : The values in parenthese are reference values.
(Continued)
51
MB89480/480L Series
Note 1) * : These dimensions do not include resin protrusion.
Note 2) Pins width and pins thickness include plating thickness.
Note 3) Pins width do not include tie bar remainder.
64-pin Plastic LQFP
(FPT-64P-M09)
14.00±0.20(.551±.008)SQ
*12.00±0.10(.472±.004)SQ
0.145±0.055
(.0057±.0022)
48
33
49
32
0.10(.004)
Details of "A" part
1.50 –+00..1200
(Mounting height)
.059 +–..000048
0.25(.010)
INDEX
0~8˚
64
17
0.50±0.20
(.020±.008)
0.10±0.10
(.004±.004)
(Stand off)
"A"
1
16
0.60±0.15
(.024±.006)
0.65(.026)
0.32±0.05
(.013±.002)
M
0.13(.005)
C
2003 FUJITSU LIMITED F64018S-c-3-5
Dimensions in mm (inches)
Note : The values in parentheses are reference values.
(Continued)
52
MB89480/480L Series
64-pin Ceramic MDIP
(MDP-64C-P02)
0˚~9˚
56.90±0.64
(2.240±.025)
15.24(.600)
TYP
18.75±0.30
(.738±.012)
19.05±0.30
(.750±.012)
INDEX AREA
2.54±0.25
(.100±.010)
0.25±0.05
(.010±.002)
33.02(1.300)REF
1.27±0.25
(.050±.010)
10.16(.400)MAX
0.46+–00..0183
0.90±0.13
(.035±.005)
3.43±0.38
(.135±.015)
1.778±0.25
(.070±.010)
.018 +–..000035
55.12(2.170)REF
C
1994 FUJITSU LIMITED M64002SC-1-4
Dimensions in mm (inches)
Note : The values in parentheses are reference values.
(Continued)
53
MB89480/480L Series
(Continued)
64-pin Ceramic MQFP
(MQP-64C-P01)
18.70(.736)TYP
16.30±0.33
(.642±.013)
12.00(.472)TYP
INDEX AREA
15.58±0.20
(.613±.008)
1.00±0.25
(.039±.010)
1.20 –+00..2400
.047 –+..000186
1.00±0.25
(.039±.010)
1.27±0.13
(.050±.005)
18.12±0.20
(.713±.008)
22.30±0.33
(.878±.013)
12.02(.473)
TYP
18.00(.709)
TYP
10.16(.400)
14.22(.560)
TYP
0.30(.012)
TYP
24.70(.972)
TYP
TYP
0.40±0.10
(.016±.004)
1.27±0.13
(.050±.005)
0.30(.012)TYP
7.62(.300)TYP
9.48(.373)TYP
11.68(.460)TYP
0.40±0.10
(.016±.004)
1.20 –+00..2400
.047 –+..000186
10.82(.426)
MAX
0.15±0.05
0.50(.020)TYP
(.006±.002)
C
1994 FUJITSU LIMITED M64004SC-1-3
Dimensions in mm (inches)
Note : The values in parentheses are referent value.
54
MB89480/480L Series
FUJITSU LIMITED
All Rights Reserved.
The contents of this document are subject to change without notice.
Customers are advised to consult with FUJITSU sales
representatives before ordering.
The information, such as descriptions of function and application
circuit examples, in this document are presented solely for the
purpose of reference to show examples of operations and uses of
Fujitsu semiconductor device; Fujitsu does not warrant proper
operation of the device with respect to use based on such
information. When you develop equipment incorporating the
device based on such information, you must assume any
responsibility arising out of such use of the information. Fujitsu
assumes no liability for any damages whatsoever arising out of
the use of the information.
Any information in this document, including descriptions of
function and schematic diagrams, shall not be construed as license
of the use or exercise of any intellectual property right, such as
patent right or copyright, or any other right of Fujitsu or any third
party or does Fujitsu warrant non-infringement of any third-party’s
intellectual property right or other right by using such information.
Fujitsu assumes no liability for any infringement of the intellectual
property rights or other rights of third parties which would result
from the use of information contained herein.
The products described in this document are designed, developed
and manufactured as contemplated for general use, including
without limitation, ordinary industrial use, general office use,
personal use, and household use, but are not designed, developed
and manufactured as contemplated (1) for use accompanying fatal
risks or dangers that, unless extremely high safety is secured, could
have a serious effect to the public, and could lead directly to death,
personal injury, severe physical damage or other loss (i.e., nuclear
reaction control in nuclear facility, aircraft flight control, air traffic
control, mass transport control, medical life support system, missile
launch control in weapon system), or (2) for use requiring
extremely high reliability (i.e., submersible repeater and artificial
satellite).
Please note that Fujitsu will not be liable against you and/or any
third party for any claims or damages arising in connection with
above-mentioned uses of the products.
Any semiconductor devices have an inherent chance of failure. You
must protect against injury, damage or loss from such failures by
incorporating safety design measures into your facility and
equipment such as redundancy, fire protection, and prevention of
over-current levels and other abnormal operating conditions.
If any products described in this document represent goods or
technologies subject to certain restrictions on export under the
Foreign Exchange and Foreign Trade Law of Japan, the prior
authorization by Japanese government will be required for export
of those products from Japan.
F0312
FUJITSU LIMITED Printed in Japan
相关型号：
MB89485PMC
Microcontroller, 8-Bit, MROM, F2MC-8L CPU, 12.5MHz, CMOS, PQFP64, 12 X 12 MM, 1.70 MM HEIGHT, 0.65 MM PITCH, PLASTIC, LQFP-64
FUJITSU
MB89498PF
Microcontroller, 8-Bit, MROM, 12.5MHz, CMOS, PQFP100, 14 X 20 MM, 3.35 MM HEIGHT, 0.65 MM PITCH, PLASTIC, QFP-100
SPANSION
MB89498PMC
Microcontroller, 8-Bit, MROM, F2MC-8L CPU, 12.5MHz, CMOS, PQFP100, 14 X 14 MM, 1.70 MM HEIGHT, 0.50 MM PITCH, PLASTIC, LQFP-100
FUJITSU
©2020 ICPDF网 联系我们和版权申明