FA5500AN [FUJI]
Switching Controller, Current-mode, 1A, CMOS, PDSO8, SO-8;
| 型号： | FA5500AN |
| 厂家： | 
FUJI ELECTRIC |
| 描述： | Switching Controller, Current-mode, 1A, CMOS, PDSO8, SO-8 开关 光电二极管 |
| 文件： | 总26页 (文件大小：221K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
FA5500AP/AN, FA5501AP/AN
Quality is our message
FUJI Power Supply Control IC
Power Factor Correction
FA5500AP/AN
FA5501AP/AN
November `02
Fuji Electric Co., Ltd.
Matsumoto Factory
1
FA5500AP/AN, FA5501AP/AN
Quality is our message
WARNING
1.This Data Book contains the product specifications, characteristics, data, materials, and structures
as of November 2002. The contents are subject to change without notice for specification changes
or other reasons. When using a product listed in this Data Book, be sure to obtain the latest
specifications.
2. All applications described in this Data Book exemplify the use of Fuji's products for your reference
only. No right or license, either express or implied, under any patent, copyright, trade secret or other
intellectual property right owned by Fuji Electric Co., Ltd. is (or shall be deemed) granted. Fuji
makes no representation or warranty, whether express or implied, relating to the infringement or
alleged infringement of other's intellectual property rights which may arise from the use of the
applications described herein.
3. Although Fuji Electric is enhancing product quality and reliability, a small percentage of
semiconductor products may become faulty. When using Fuji Electric semiconductor products in
your equipment, you are requested to take adequate safety measures to prevent the equipment
from causing a physical injury, fire, or other problem if any of the products become faulty. It is
recommended to make your design fail-safe, flame retardant, and free of malfunction.
4.The products introduced in this Data Book are intended for use in the following electronic and
electrical equipment which has normal reliability requirements.
• Computers • OA equipment • Communications equipment (terminal devices)
• Measurement equipment
• Machine tools • Audiovisual equipment • Electrical home
appliances • Personal equipment • Industrial robots etc.
5.If you need to use a product in this Data Book for equipment requiring higher reliability than normal,
such as for the equipment listed below, it is imperative to contact Fuji Electric to obtain prior
approval. When using these products for such equipment, take adequate measures such as a
backup system to prevent the equipment from malfunctioning even if a Fuji's product incorporated in
the equipment becomes faulty.
• Transportation equipment (mounted on cars and ships)
• Traffic-signal control equipment • Gas leakage detectors with an auto-shut-off feature
• Emergency equipment for responding to disasters and anti-burglary devices • Safety devices
• Trunk communications equipment
6. Do not use products in this Data Book for the equipment requiring strict reliability such as (without
limitation)
• Space equipment
• Aeronautic equipment
• Atomic control equipment
• Submarine repeater equipment
• Medical equipment
7. Copyright © 1995 by Fuji Electric Co., Ltd. All rights reserved. No part of this Data Book may be
reproduced in any form or by any means without the express permission of Fuji Electric.
8. If you have any question about any portion in this Data Book, ask Fuji Electric or its sales agents
before using the product. Neither Fuji nor its agents shall be liable for any injury caused by any use
of the products not in accordance with instructions set forth herein.
2
FA5500AP/AN, FA5501AP/AN
Quality is our message
CONTENTS
Pages
4
1.
Description
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2.
Features
4
3.
Outline
4
4.
Types of FA5500A/01A
Block diagram
4
5.
5
6.
Pin assignment
5
7.
Ratings and characteristics
Characteristic curves
Description of PFC converter
Description of each circuit
Design advice
6 – 8
9 – 12
13 – 14
15 – 18
19 –25
26
8.
9.
10.
11.
12.
Example of application circuit
Note
• Parts tolerance and characteristics are not defined in all application described in this Data book. When design an
actual circuit for a product, you must determine parts tolerances and characteristics for safe and economical
operation.
3
FA5500AP/AN, FA5501AP/AN
1. Description
Quality is our message
FA5500A/FA5501A are control ICs for a power factor correction converter using critical conduction mode of operation.
This IC uses a CMOS device with high dielectric strength (30V) to implement low power consumption. These ICs contain
compensated current sense comparator for light load and open/short protection at feedback (FB) pin. Compensated current
sense comparator for light load keeps output voltage constant from no-load to full-load. Open/short protection at FB pin
stops output pulses when voltage divider to detect output voltage becomes fault.
2.Features
•
Low current consumption by CMOS process
Start-up : 20µA(max.), Operating : 1mA(typ.)
Drive circuit for connecting a power MOSFET directly
Output peak current, source : 500mA, sink : 1000mA
Compensated current sense comparator for light load
Open/short protection at feedback (FB) pin
Undervoltage Lockout
•
•
•
•
•
FA5500A: 11.5V ON / 9V OFF FA5501A:13V ON / 9V OFF
Overvoltage protection
Restart timer
•
•
•
Package: DIP-8 / SOP-8
3.Outline
SOP-8
DIP-8
0.18 ±0.08
8
5
8
5
1
4
9.3
1.0 ±0.3
1.5 ±0.3
1
4
4.9
0.20
0o − 8o
0.46 ±0.1
2.54
2.54×3=7.62
0o −15o
1.27
0.4 ±0.1
7.62
4.Types of FA5500A/01A
Type
Startup Threshold
Package
FA5500AP
FA5500AN
FA5501AP
FA5501AN
11.5V(typ.)
11.5V(typ.)
13V(typ.)
13V(typ.)
DIP-8
SOP-8
DIP-8
SOP-8
4
FA5500AP/AN, FA5501AP/AN
5.Block diagram
Quality is our message
MUL
VCC
3
8
VREF(2.5V)
VDD(5.0V)
VREF(2.5V)
VOVP(1.09VREF)
VZCD(1.5V/1.33V)
VOS(2.0V)
UVLO
+
REF
ERRAMP
MUL
AOC
VSP(0.3V)
1
2
-
FB
COMP
VOS(2.0V)
+
-
+
2.5µA
-
VSP(0.3V)
SP
7
R
S
OUT
-
OVP
SP
Q
+
VOVP
(1.09VREF)
+
+
-
OVP
R TIMER
-
R
6
GND
VZCD(1.5V/1.33V)
4
5
IS ZCD
6.Pin assignment
VCC OUT GND ZCD
8
7
6
5
1
2
3
4
FB COMP MUL
IS
Pin No.
Pin
Function
Description
symbol
1
2
3
FB
Voltage Feedback Input
Compensation
Input for monitoring PFC output voltage
Output of error amplifier
COMP
MUL
Multiplier Input
Input of multiplier for monitoring sinusoidal
waveform
4
5
IS
Current Sense Input
Input for sensing MOSFET current signal
Input for detecting that the inductor current
reaches zero
ZCD
Zero Current Detect Input
6
7
8
GND
OUT
VCC
Ground
Ground
Output
Output for direct driving a power MOSFET
Power supply for IC
Power Supply
5
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7.Ratings and characteristics
The contents are subject to change without notice. When using a product, be sure to obtain the latest specifications.
(1)Absolute Maximum Ratings
Item
Symbol
Icc+Iz
Ratings
30
Unit
mA
Total Power Supply and Zener Current
Supply
Voltage
Zener Clamp (Icc+Iz<30mA)
Vcc
Self Limiting
V
Output Current
Sink
Source
+1000
-500
mA
mA
Io
Input voltage(IS,MUL,FB)
Zero Current Detect Input
High State Forward Current
Low State Reverse Current
Power dissipation
Vin
-0.3 to 5
V
Iin
-50
10
800
400
-30 to +105
+150
-55 to +150
mA
DIP-8
SOP-8
Pd1
Pd2
Ta
Tj
Tstg
mW
mW
°C
°C
°C
Operating Ambient Temperature
Operating Junction Temperature
Storage Temperature
Maximum dissipation curve
400mW(SOP)
800mW(DIP)
-30
25
105
150
Ambience temperature Ta(°C)
(2)Recommended Operating Conditions
Item
Supply Voltage
ZCD pin current
Symbol
Vcc
Izcd
Min
Typ
Max
Unit
10
12
28
±3
V
mA
6
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(3)Electrical Characteristics (Unless otherwise specified, Ta=25°C and Vcc=12V)
ERROR AMPLIFIER(FB,COMP Pin)
Item
Feedback
Symbol
Condition
Ta=25°C
Min
2.465
Typ
2.500
Max
2.535
Unit
Voltage
Threshold
Input
Vfb
V
Vcc=12V to 28V
Ta=25°C
Line Regulation
Regline
-50
-20
-
mV
Temperature stability
Transconductance
VdT
Gm
Ta=-30°C to +105°C
Ta=25°C
Source(Vfb=2.3V)
Sink(Vfb=2.7V)
±0.5
90
10
mV/°C
µmho
70
-
-
120
-
-
Output Current
Io
µA
10
OVERVOLTAGE COMPARATER (FB Pin)
Item
Input Threshold
Symbol
Vthovp
Condition
Condition
Min
1.075Vfb
Typ
1.09Vfb
Max
1.105Vfb
Unit
V
FB SHORT COMPARATOR(FB Pin)
Item
Input Threshold
Pulldown Current
Symbol
Vthsht
Ifb
Min
0.1
Typ
0.3
Max
Unit
V
µA
0.5
5
0.5
2.5
MULTIPLIER(COMP,MUL Pin)
Item
Input Threshold
Pin2(COMP)
Symbol
Condition
Min
Typ
Max
-
Unit
V
Vthcomp
1.79
2.04
Dynamic Input Voltage Range
Pin3(MUL)
Pin2(COMP)
Vpin3
Vpin2
0 to 2.5
Vthcomp to Vthcomp to
0 to 3.5
-
V
Vthcomp
+1.0
Vthcomp
+1.5
Vpin3=0.5V
Vpin2=Vthcomp
+1.0V
Gain
K
0.53
0.75
0.97
1/V
K=Pin4Threshold/{Vpin3(Vpin2-Vthcomp)}
ZERO CURRENT DETECTOR (ZCD Pin)
Item
Symbol
Condition
Min
Typ
Max
Unit
Input Threshold Voltage
Hysteresis
Vthzcd
Vh
Vin increasing
Vin decreasing
1.33
100
1.50
170
1.87
300
V
mV
Input Clamp Voltage
“H” state
“L” state
Vih
Vil
Idet=+3.0mA
Idet=-3.0mA
7.0
0.3
7.6
0.6
-
V
1.0
CURRENT SENSE COMPARATOR (IS Pin)
Item
Symbol
Condition
Vpin1=1.0V
Vpin3=3.0V
Min
Typ
1.5
Max
1.8
Unit
V
Maximum Current Sense
Input Threshold
Delay to Output
Vthis
1.3
-
Tphl
170
400
ns
7
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DRIVE OUTPUT (OUT Pin)
Item
Symbol
Condition
Vcc=12V
Isink=200mA
Vcc=12V
Isouce=200mA
CL=1.0nF
CL=1.0nF
Min
Typ
Max
Unit
Output Voltage Low State
Vol
-
1.2
8.4
3.3
V
Output Voltage High State
Voh
7.8
V
Output Voltage Rise Time
Output Voltage Fall Time
Tr
Tf
-
-
50
25
120
100
ns
ns
RESTART TIMER
Item
Restart Time Delay
Symbol
Tdly
Condition
Min
Min
Typ
Typ
Max
Max
Unit
µs
100
200
-
UNDERVOLTAGE LOCKOUT (VCC Pin)
Item
Symbol
Condition
FA5500A
FA5501A
Unit
V
V
10
11.5
13
13
Startup Threshold
Von
11.5
14.5
Minimum Operating Voltage
After Turn-On
Voff
8
9
10
V
FA5500A
FA5501A
1.8
3.3
2.5
4
3.2
4.7
V
V
Hysteresis
Vhysvcc
TOTAL DEVICE (VCC Pin)
Item
Power Supply Zener Voltage
Symbol
Vz
Condition
Icc=25mA
Vcc=8.0V
Min
Typ
Max
Unit
V
µA
30
-
33
-
36
20
Startup Power Supply Current Istart
Operating
Current
Dynamic Operating Power
Supply Current
Power
Supply
Icc
Iop
Vcc=12V
1.0
2.0
2.0
4.0
mA
mA
50kHz,CL=1.0nF
8
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8. Characteristics curves
(Unless otherwise specified, Ta=25°C and Vcc=12V)
Error amplifier voltage feedback input
threshold(Vfb) vs. supply voltage(Vcc)
Error amplifier voltage feedback input
threshold(Vfb) vs. junction temperature(Tj)
2.55
2.54
2.53
2.52
2.51
2.50
2.49
2.48
2.47
2.46
2.45
2.55
2.54
2.53
2.52
2.51
2.50
2.49
2.48
2.47
2.46
2.45
-50
0
50
100
150
10
15
20
25
30
Vcc(V)
Tj(°C)
Overvoltage comparator input threshold
(Vthovp) vs. supply voltage(Vcc)
Overvoltage comparator input threshold
(Vthovp) vs. junction temperature (Tj)
1.100
1.095
1.090
1.085
1.080
1.100
1.095
1.090
1.085
1.080
-50
0
50
Tj(°C)
100
150
10
15
20
Vcc(V)
25
30
Error amplifier transconductance(Gm) and
phase vs. frequency(f)
ZCD input hreshold voltage(Vthzcd) vs.
junction temperature(Tj)
120
100
80
60
40
20
0
180
1.55
1.50
1.45
1.40
1.35
1.30
RL=100k
CL=10pF
Ω
150
120
90
60
30
0
Phase
Upper threshold
(Vin, increasing)
Gm
Lower threshold
(Vin, decreasing)
-50
0
50
100
150
1
10
100
f(kHz)
1000
10000
Tj(°C)
9
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FB short compraor input threshold(Vthsht) vs.
junction temperature(Tj)
0.40
FB short comparator pulldown current(Ifb) vs.
junction temperature(Tj)
2.65
2.60
2.55
2.50
2.45
2.40
0.35
0.30
0.25
0.20
-50
0
50
100
150
-50
0
50
100
150
Tj(°C)
Tj(°C)
Current sense comparator thershold(VIS) vs.
MUL input voltage(Vmul)
Vcomp=3V
Current sense comparator thershold(VIS) vs.
MUL input voltage(Vmul) (enlarged)
Vcomp=4V
1600
Vcomp=2.5V
Vcomp=3.25V
75
50
Vcomp=3V
Vcomp=2.25
1400
1200
1000
800
600
400
200
0
Vcomp=2.75V
Vcomp=3.5
Vcomp=4
Vcomp=2.1
25
Vcomp=2.5
Vcomp=2
0
Vcomp=1.8
Vcomp=1.7
Vcomp=1.5
Vcomp=2.25
Vcomp=2.1V
-25
-50
-75
-100
Vcomp=1.3
Vcomp=2V
Vcomp=1
Vcomp=0.5
Vcomp=0
-200
Vcomp=0V Vcomp=1V
0.0
0.1
0.2
Vmul(V)
0.3
0.4
0.0
1.0
2.0
3.0
4.0
Vmul(V)
Multiplier gain(K) vs.
junction temperature(Tj)
Restart timer deley time(Tdly) vs.
junction temperature(Tj)
220
215
210
205
200
195
190
185
180
1.0
0.9
0.8
0.7
0.6
0.5
0.4
-50
0
50
100
150
-50
0
50
100
150
Tj(°C)
Tj(°C)
10
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Current sense comparator maximum
threshold(Vthis) vs. supply voltage(Vcc)
Current sense comparator maximum
threshold(Vthis) vs. junction temperature(Tj)
1.510
1.505
1.500
1.495
1.490
1.525
1.520
1.515
1.510
1.505
1.500
1.495
10
15
20
25
30
-50
0
50
100
150
Vcc(V)
Tj(°C)
UVLO startup threshold(Von) vs.
junction temperature(Tj)
UVLO startup threshold(Von) vs.
junction temperature(Tj)
FA5501A
FA5500A
14.0
13.5
13.0
12.5
12.0
11.5
11.0
13.0
12.5
12.0
11.5
11.0
10.5
10.0
-50
0
50
100
150
-50
0
50
100
150
Tj(°C)
Tj(°C)
UVLO minimum operating voltage(Voff) vs.
junction temperature(Tj)
10.0
9.5
9.0
8.5
8.0
-50
0
50
100
150
Tj(°C)
11
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OUT pin high state voltage(VOH) vs.
OUTpin low state voltage(VOL) vs.
output current(Io)
output current(Io)
1.8
1.6
1.4
1.2
1
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
0.8
0.6
0.4
0.2
0
0
100
200
300
0
100
200
300
Io(mA)
Io(mA)
Dynamic operating power supply current(Iop)
vs. supply voltage(Vcc)
Dynamic operating power supply current(Iop)
vs. supply voltage(Vcc) (enlarged)
30
2.5
50kHz
50kHz
CL=1nF
FA5500A FA5501A
CL=1nF
25
20
15
10
5
2.0
1.5
1.0
0.5
0.0
0
0
10
20
Vcc(V)
30
40
5
7
9
11
13
15
Vcc(V)
Operating power supply current(Icc) vs.
junction temperature(Tj)
Dynamic operating power supply current(Iop)
vs. junction temperature(Tj)
1.2
1.0
0.8
0.6
0.4
0.2
0.0
2.2
2.0
1.8
1.6
1.4
1.2
1.0
50kHz
CL=1nF
-50
0
50
100
150
-50
0
50
100
150
Tj(°C)
Tj(°C)
12
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9. Description of PFC converter
FA5500A/FA5501A are control ICs for a power factor
correction converter using a boost type topology that
operates in critical conduction mode. The operations,
which are (1) Switching operation and (2) Power factor
correction operation, are described here with the circuit
shown in Fig. 1.
By repeating the steps from t1 to t4, the switching
operation continues in critical conduction mode.
In the PFC converter that operates in critical
conduction mode, the switching frequency always
changes according to the instantaneous AC line
voltage. In addition, the switching frequency also
changes when the AC line voltage or the load changes.
(1) Switching operation
This IC operates in critical conduction current mode
and does not use a fixed frequency oscillator for
switching operation. The waveform of each part in
switching operation in steady state is shown in Fig. 2.
The operation is described in detail below:
OUT
(Q1 gate)
Q1
Vds
t1. When Q1 turns on, the inductor current (IL1) rises
from zero.
I
I
L1
t2. When the inductor current reaches up to the
threshold of the current comparator (CUR.comp.)
set by the multiplier (MUL), CUR.comp. resets R-S
flip-flop and then Q1 turns off. When Q1 is off, the
voltage of L1 reverses polarity and the L1 current
(IL1) decreases supplying a current through D1 to
the output. During this period, the voltage of the
auxiliary winding (Vsub) also reverses polarity, then
the positive voltage occurs.
Q1
I
D1
Vsub
CUR.comp.
output
(reset)
t3. When IL1 reaches zero, the voltage of L1 drops
rapidly. At the same time, Vsub also drops rapidly.
ZCD.comp.
output
t4. When Vsub drops below 1.33V (the threshold of
ZCD. comp.), the output of zero current detector
(ZCD. comp.) turns to low and sets R-S flip-flop.
Then Q1 turns on, and the next switching cycle
starts. (Back to t1)
(set)
t1
t2
t3 t4
Fig.2 Timing chart of switching operation
Iin
I
L1
L1
D1
Vo
Q1
AC
C1
Vds
Rs
Vsub
OUT
ZCD
IS
4
5
7
R
S
Q
MUL
CUR.comp
3
MUL
ZCD.comp
1.5V/1.33V
1
FB
2.5V
ERRAMP
COMP
FA5500A/01A
2
C3
Fig.1 Outline of PFC converter circuit
13
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In an actual circuit, the internal multiplier (MUL)
controls the inductor peak current as sinusoidal
waveform.
(2)Power factor correction operation
As described in “(1) Switching operation”, inductor
current is repeated triangular waveform. The average
current (IL1(mean)) of this repeated triangular waveform
is one half of the peak current (IL1(peak)).
Then, the inductor peak current is controlled to be
sinusoidal and the high frequency content of inductor
current is filtered. As a result, it is possible to force the
AC input current into sinusoidal waveform.
The voltage of COMP pin, which is the output of error
amplifier (ERRAMP), is almost DC voltage in steady
state by C3. This voltage is input to the multiplier. The
other input of multiplier monitors the rectified waveform
of AC line voltage. As a result, the multiplier outputs the
sinusoidal waveform that is proportional to AC line
voltage as the product of two input voltages.
This sinusoidal voltage is input to the current
comparator (CUR. comp.) as the threshold of inductor
current.
IL1(peak)
As a result, the inductor current becomes repeated
triangular waveform of which peak current envelope is
sinusoidal. The switching ripple of inductor current is
then filtered by C1 and AC input current becomes
sinusoidal waveform.
IL1
IL1(mean)
=1/2×IL1(peak)
enlarged
2×Iin(peak)
I
t
IL1
L1
Q1
AC
C1
V
filtered the high
frequency content
by C1
Rs
t
IS
4
Iin(peak)
Iin
MUL
V
3
MUL
t
V
CUR.comp
sinusoidal
Fig.3 Outline of inductor and AC input current
t
sinusoidal
1
FB
ERRAMP
COMP
2
V
C3
t
Fig.4 Outline of waveform of each part
14
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10. Description of each circuit
which is set to 1.09 times of the reference voltage
(VREF).
(1)Error amplifier
The error amplifier controls the output voltage of PFC
In normal operation the FB pin voltage is
approximately 2.5 V, roughly the same as the reference
voltage VREF. If the PFC output voltage rises more
than normal voltage and then the FB pin voltage
reaches the threshold of OVP comparator, the output of
the comparator (OVP) turns to low and stops output
pulses.
converter to be constant. The amplifier is
transconductance type, which has controlled
voltage-to-current gain.
The non-inverting input is internally connected to the
reference voltage of 2.5 V (typ.) and the inverting input
is pinned out to FB pin. The output of PFC converter is
divided down by resistor and monitored by the FB pin.
In addition, 2.5µA of constant-current source is
internally connected to the FB pin for “Open/short
protection at FB pin”.
The output of error amplifier is connected to the
multiplier. According to the dynamic range of multiplier,
the output voltage of error amplifier ranges from 2.04 V
to 3.54 V (typ.) in normal operation. The lower output
voltage of error amplifier is limited by a diode
connected between the input and the output of error
amplifier, in order to prevent over drop in a transient
condition such as rapid change of the load.
The output voltage of PFC converter contains low
frequency ripple voltage associated with 2X the line
frequency. If too much ripples appear at error amplifier.
output, the PFC converter does not operate stable.
Therefore, a capacitor is connected between COMP
pin (the error amplifier output) and GND so that the
cutoff frequency is set to about 20Hz in order to
suppress the ripple voltage.
a
When the output voltage comes back to normal,
output pulses appear again.
(3)Open/short protection at FB pin circuit
In the circuit shown in Fig. 6, if FB pin cannot monitor
the PFC output voltage because of a short-circuit
failure in voltage dividing resistor R2 or an open failure
in R1, the PFC output voltage abnormally rises. The
overvoltage limiting circuit does not operate either in
this case, because the output voltage is not monitored.
To avoid these, this IC features a open/short
protection at FB pin circuit. This circuit consists of a
comparator (SP) with threshold voltage of 0.3V (typ.). If
the input voltage of FB pin drops below 0.3V due to a
short-circuit failure in R2 or an open failure in R1, the
output of comparator (SP) turns to low and stops the
output pulses.
In the PFC converter, because of a boost type
topology, the voltage rectified the AC line is supplied to
the PFC output even before the converter operates.
Therefore, if the PFC converter is normal, voltage is
always applied to FB pin and this protection circuit
does not operate.
SP
0.3V
OUT
If an open failure occurs between FB pin and the
voltage divider, the FB pin voltage is forced to lower by
the 2.5µA of constant current source internally
connected to FB pin. Then comparator (SP) stops the
output pulses in the same way.
7
OVP
Vo
If the FB pin voltage comes back to normal after this
protection circuit operates, output pulses appear again.
1.09VREF
R1
MUL
1
FB
Vo
R2
OUT
7
ERRAMP
2.5µA
VREF
=2.5V(typ.)
SP
shutdown
R1
0.3V
open
short
2
FB
COMP
detect
1
C3
R2
VFB=0V
2.5µA
Fig.5 Error amplifier circuit
Fig.6 Open/short protection at FB pin
(2)Overvoltage limiting circuit
This circuit prevents the PFC output voltage
exceeding the programmed voltage. The output voltage
may exceed the voltage programmed by error amplifier
when the converter starts up or the load changes
rappidly. This circuit limits rise of the output voltage in
such cases.
As shown in Fig. 5, the overvoltage limiting circuit
consists of a comparator (OVP) with threshold voltage,
15
FA5500AP/AN, FA5501AP/AN
(4)Multiplier
The multiplier is a circuit to control input current into
sinusoidal waveform.
One of the inputs is connected to MUL pin. The
rectified AC line voltage is divided down by resistor and
monitored by MUL pin. The other input is internally
connected to the output of error amplifier. Typically, the
output of error amplifier is almost DC over a given AC
line cycle. Therefore, the multiplier outputs the
sinusoidal voltage of which amplitude changes in
proportion to the output of error amplifier. This output
becomes the threshold of current comparator and the
AC input current is controlled into sinusoidal waveform.
Based on the dynamic range of multiplier, the peak
voltage applied to MUL pin should be within 2.5 V in
normal operation.
Quality is our message
D1
L1
C1
Q1
C2
Rs
R6
C4
IS
4
CUR.comp
Output
R Q
circuit
S
The rectified AC line voltage contains much
switching noises from Q1. To avoid the influence of the
noises, a capacitor (C6) is connected for a filter.
MUL
1.8V
(max)
ZCD.comp
Fig.8 Current sense comparator circuit
D1
L1
(6)Zero current detector
C2
AC
C1
This IC operates in critical conduction current mode
without a fixed frequency oscillator. The zero current
detector circuit (ZCD) detects the inductor current
reaches zero to turn the MOSFET on at the next
switching cycle.
The voltage of auxiliary winding (sub) is monitored by
ZCD pin as shown in Fig. 9. During OFF period of
MOSFET, positive voltage occurs in the auxiliary
winding. When the inductor current reaches zero, the
voltage of auxiliary winding falls rapidly. ZCD.comp.
detects it and sets the RS flip-flop to turn the MOSFET
on at the next switching cycle.
Q1
R3
CUR.comp
MUL
3
MUL
ERRAMP
C6 R4
The voltage of auxiliary winding varies significantly
according to input and output voltage. To protect the IC
against the various voltages, a clamp circuit is built in
with the upper limit of 7.6V(typ.) and the lower limit of
0.6V(typ.).
Fig.7 Multiplier circuit
(5)Current sense comparator
L1
D1
One of the inputs is internally connected to the
output of multiplier as the threshold. The other input is
connected to IS pin to monitor the MOSFET source
current converted to voltage by current sense resistor
(Rs). In each switching cycle, when MOSFET current
reaches up to the threshold determined by the
multiplier, the output of current comparator turns high
and reset the RS flip-flop. As a result, MOSFET turns
off, and the on cycle of MOSFET is over.
The threshold voltage of current comparator is
internally clamped to 1.8V (max.). Therefore, when
PFC starts up or load and input voltage changes rapidly,
the maximum current of MOSFET is limited at the value
calculated with the following equation:
Q1
C1
sub
Rs
R5
ZCD
5
Clamp circuit
Clamp
ZCD.comp
R Q
S
1.8
Id(max.) =
Rs
1.33/1.5V
To prevent malfunction by noises, RC filter is typically
connected between IS pin and the current sense
resistor Rs.
Fig.9 ZCD circuit
A resistor for current limit is typically connected
between the ZCD pin and the auxiliary winding
because of rating current of ZCD pin.
16
FA5500AP/AN, FA5501AP/AN
Quality is our message
A current out of or into the ZCD pin should be
within 3mA so that the IC will operate normally.
On the other hand, if the current out of or into the
ZCD pin is too small, unstable operation may occur.
Therefore, current limiting resistor of R5 should be
below 47kΩ.
(7)Compensation circuit for light load
If the output of multiplier, which determines the
threshold of current comparator, does not have offset
voltage, the input current to the converter is
approximately zero under condition that the PFC
converter operates in no load. But an actual multiplier
may have offset voltage. If the offset voltage is positive,
the input current, which corresponds to the offset
voltage, flows into the converter even when the PFC
converter operates in no load. In this case, the PFC
output voltage rises abnormally because of too much
input current.
While MOSFET is on, negative voltage is generated
in the auxiliary winding. A current flows out of the
clamp circuit and the ZCD pin voltage is clamped to
0.6V (typ.). While MOSFET is off, positive voltage is
generated in the auxiliary winding. A current flows into
the clamp circuit and the ZCD pin voltage is clamped to
7.6V (typ.).
To avoid these, this IC has an automatic offset
correction circuit (AOC) for light load. The output
voltage of error amplifier is approximately 2V or higher
in normal operation. When the output voltage of error
amplifier drops below 2V, AOC circuit operates.
Q1 : ON
If the output of multiplier has a positive offset, the
output voltage of error amplifier falls below 2V in the
case that the PFC converter operates in no load or light
load. Then, the offset voltage is corrected in the current
comparator by AOC circuit. Because of this operation,
even in the no load or light load condition, the PFC
output voltage does not rise abnormally, but is always
kept constant. The amount of correction changes
linearly according to the output of error amplifier so that
the operation can be made stable.
Clamp
ZCD.comp
Clamp circuit
current
5
ZCD
R5
sub
0.6V
Fig.10 Clamp circuit of ZCD pin(1)
Q1 : OFF
Clamp circuit
Clamp
current
ZCD.comp
5
ZCD
R5
sub
7.6V
Fig.11 Clamp circuit of ZCD pin(2)
17
FA5500AP/AN, FA5501AP/AN
Input current
Quality is our message
(8)Restart timer
In steady state, set signals from the ZCD circuit turns
MOSFET on at each switching cycles. But a trigger
signal is needed when starting up or stabilizing
operation in the light load condition. This IC includes a
restart timer. If off period of output pulse continues
200µs or more, it automatically generates a trigger
signal.
without compensation
full load
no load
(9)Undervoltage lockout circuit
offset currnt
0
These IC contain an undervoltage lockout circuit to
prevent malfunction when the supply voltage drops.
When the supply voltage rises from 0V, FA5500A starts
operation at 11.5V(typ.) and FA5501A starts operation
at 13V(typ.). If the supply voltage drops after the IC
starts up, both IC stops operation at 9V(typ.). When IC
stops operation by undervoltage lock out circuit, OUT
pin voltage is kept in low state and the current
consumption of IC decreases below 20µA.
t
1/2 of line frequency
with compensation
full load
(10)Output circuit
This IC contains a push-pull output stage and can
directly drive the MOSFET. The peak current of output
stage is sink: 1.0A (max.), source: 0.5A (max.)
result of compensattion
no load
0
t
1/2 of line frequency
Output voltage
without compensation
with compensation
0
PFC output power
Fig.12 Outline of operation when multiplier has a
positive offset
18
FA5500AP/AN, FA5501AP/AN
Quality is our message
11. Design advice
(1)Designing a PFC converter
The following description is a sample of designing of
a PFC converter with FA5500A/FA5501A using a circuit
shown in Fig. 13. However, this is just a sample of
calculating. If you want to use the components or
circuits calculated in this process, be sure to test and
determine in actual circuit. In addition, be sure to
consider and check the characteristics, the tolerance
and the rating of each component including this IC.
It is recommended to set fsw(min) between
20kHz-100kHz. Assume that the efficiency
approximately 90% in calculating.
η
is
Supplement: Inductance and switching frequencies
On and off period of each switching cycle can be
calculated with the following equation.
2×Lp×Po
Ton =
(1-1) Specification of PFC converter
Vac2× η
To begin designing, the following specification of PFC
converter is determined.
2×Lp× Po
Toff =
Vo
Vac2× η ×
−1
Input voltage range (Vrms): Vac(min.) to Vac(max.)
Output voltage (V): Vo (> 2 ×Vac (max.) )
Maximum Output power(W): Po
2 × Vac× sinωt
where,
ω=2×π×fac
fac: AC line frequency (Hz)
Output voltage (Vo) should be set higher than the
peak value of input voltage (= 2 ×Vac (max.)) because
the PFC converter is a boost type topology.
In theory, according to the equation above, if
input-output conditions are constant, Ton is also
constant. On the other hand, Toff changes
corresponding to each instantaneous voltage of AC line,
maximum at ωt =90°, minimum at ωt =0°. Then,
switching frequencies can be calculated with the
following equation according to the relationships
described above:
(1-2) Designing inductance of L1
The switching frequencies are determined with
input-output conditions and the value of inductor
because PFC converter operates in critical conduction
mode (see Supplement). Therefore, the value of
inductor L1 (Lp) can be determined with input-output
conditions and the minimum operating frequency.
When efficiency of PFC is η and the minimum
operating frequency is fsw (min.), Lp is calculated by
following equation.
Vac2×
Vo− 2 × Vac× sinωt
× η
fsw =
The
2× Lp×Po× Vo
switching
frequencies
always
change
corresponding to each instantaneous voltage of AC line.
Vac(min.)2× (Vo− 2 × Vac(min.) )× η
Lp=
2× fsw(min.)× Po× Vo
L1
Np
Ns
D1
Vo
Po
R1
R2
Vac
C1
Q1
Rs
C2
R3
R6
R5
R8
R7
D2
FA5500A/01A
VCC
FB
COMP OUT
MUL GND
C5
IS
ZCD
C3 C6 R4
C4
Fig.13 Typical application circuit
19
FA5500AP/AN, FA5501AP/AN
Quality is our message
“Power dissipation” must not exceed the absolute
maximum rating value.
(1-3) Designing auxiliary winding of L1
The auxiliary winding typically has two functions:
-Detecting that inductor current reaches zero
-Supplying Vcc voltage of IC
To achieve these functions, you have to determine a
proper ratio of it to the main winding.
using internal ZD
VCC
D2
R11
8
internal
ZD
sub
C5
The voltage of auxiliary winding always changes
according to each instantaneous voltage of AC line. The
outline of the auxiliary winding voltage is shown in Fig.
14.
using external ZD
auxilliary winding
VCC
8
envelope
voltage
D2
R11
Ns
Vo×
external
ZD
sub
C5
Np
Ns
(Vo − 2 × Vac)×
Np
0
Fig.15 Vcc clamp circuit
(1-4) ZCD pin circuit
Ns
Np
2 × Vac ×
1/2 of line frequency
Fig.14 Auxiliary winding voltage
The auxiliary winding voltage is monitored by ZCD
pin in order to detect that the inductor current reaches
zero. A resistor for current limit (R5) is connected
between ZCD pin and the auxiliary winding because of
rating current of ZCD pin. The most appropriate value of
R5 is determined by evaluating in the actual circuit.
The following conditions should be satisfied based on
this various voltage.
However, a current out of or into the ZCD pin
should be within 3mA as shown in the recommended
operating conditions so that the IC will operate
normally. Therefore, the following conditions should
be satisfied.
ZCD Threshold Voltage
The threshold voltage of ZCD comparator is
1.87V(max.) when ZCD pin voltage rises. It is
necessary for the minimum voltage of auxiliary winding
to exceed this threshold voltage. Therefore, the
following condition must be satisfied.
For lower clamp
1.87
Ns/Np >
Ns
(
Vo− 2 × Vac
)
(max.
)
1.0 + 2 × Vac(max.)×
Np
R5 >
Vcc voltage
3 ×10−3
For upper clamp
Ns
The following condition must be satisfied, so that Vcc
voltage will be set between 12V and 28V according to
the recommended condition.
12
Vo
28
Vo
Vo×
− 7.0
< Ns/Np <
Np
3 ×10−3
R5 >
The turns ratio Ns/Np must satisfy both two condition.
On the other hand, if the current out of or into the
ZCD pin is too small, unstable operation may occur.
Therefore, current limiting resistor of R5 should be
below 47kΩ.
If the boost voltage ratio of PFC (the ratio of Vo to
Vac) is too small, the turns ratio can not satisfy both
condition. This problem can be solved with following
methods.
R5 < 47kΩ
L1
D1
-Attach two auxiliary windings for both ZCD and Vcc
respectively.
Q1
Rs
-Set ZCD condition preceding Vcc condition. In this
case, there is possibility for Vcc to exceed the
recommended conditions. Therefore, clamp the Vcc
with internal ZD or additional ZD (Fig. 15). In this
case, a resistance for current limit (R11) is needed
between the auxiliary winding and Vcc pin. In
addition, especially when using internal ZD, mind
that “Total power supply and zener current” and
R5
5
ZCD
Fig.16 ZCD pin circuit
20
FA5500AP/AN, FA5501AP/AN
Quality is our message
In actual circuit, the value of R5 also influences
MOSFET switching.
L1
MOSFET(Q1) turns on when the current of inductor
L1 reaches zero. Just before turning on, the drain
voltage of MOSFET (Vds) begins sinusoidal oscillation
because of resonance of L1 and the parasitic capacitor.
If the value of R5 is set properly, MOSFET can be
turned on at the bottom of the voltage oscillation. This
can minimize the switching loss and surge current at
turn on. If the value of R5 is too small, MOSFET turns
on too early and if it is too large MOSFET turns on too
late. The adequate value of R5 depends on each
circuits or input and output conditions. Therefore,
determine the most appropriate value by evaluating the
operation in the actual circuit.
R7
C1
D2
VCC
C5
8
Fig.19 Vcc pin circuit
In steady state, Vcc is supplied from the auxiliary
winding of inductor. When the IC is just starting up,
however, it takes time for the voltage from auxiliary
winding to rise enough. The value of capacitor C5
connected to Vcc pin should be determined to prevent
Vcc from falling below the UVLO threshold voltage
during the this period. The capacity of C5 should be
tested and determined in the actual circuit because the
time lag is different in each circuit.
Vds
Vcc
0
t
UVLO
ON
Fig.17 Vds waveform at turn on
(with adequate R5)
UVLO
OFF
Vcc must not drop
below UVLO OFF.
Vds
Vds
Auxiliary winding voltage
Time t
Fig.20 Vcc voltage at startup
0
0
t
t
R5 is too small.
R5 is too large.
Even after PFC starts up, Vcc may fall due to rapidly
changes of the load or inputs. To prevent the IC from
stopping in those cases, the circuit shown in Fig.21 is
effective to prolong the hold time of the Vcc voltage.
After the PFC converter starts up, Vcc is supplied
through C7. Therefore, you can prolong the hold time of
Vcc by using a large capacity for C7.
Fig.18 Vds waveform at turn on
(with inadequate R5)
(1-5) Vcc Pin circuit
The startup resistor R7 should satisfy the following
formula in order to supply with at least 20µA of IC
startup current.
R7
D2
D3
C7
VCC
2 × Vac(min.) − Von(max.)
R7 <
20 ×10−6
sub
C5
Where,
Von(max.): maximum voltage of startup threshold of
UVLO
FA5500A: Von(max.)=13V
FA5501A: Von(max.)=14.5V
Fig.21 Vcc pin circuit (2)
This formula is, however, just the minimum condition
to start the IC. The startup time required for PFC
converter must also be decided on. The value of R7
should be tested and determined in actual circuit for
appropriate startup time.
In some case, the Vcc voltage cannot be supplied
enough in light load condition. In this case, the circuit
shown in Fig.22 may be effective to improve the Vcc. In
this circuit, R10 suppress the surge current of MOSFET
at turn on to prevent the malfunctions. (See (1-7) IS pin
21
FA5500AP/AN, FA5501AP/AN
Quality is our message
circuit ) The appropriate value of C8 and R10 should be
tested and determined in actual circuit because they
depend on each circuit.
characteristics of multiplier and the input voltage range.
VthIS−p(min)
R7
= K(min)
×
(
VMUL−P(min)
×
((Vthcomp + 1)− Vthcomp ))
D2
C8 R10
D4
= 0.53 × VMUL−P(min) ×1
VCC
Where,
sub
VMUL-P(min): MUL pin peak voltage at minimum AC
line voltage
C5
K(min.): multiplier gain
Note:
Fig.22 Vcc pin circuit (3)
When VthIS-P(min) >1.3V, use VthIS-P(min) =1.3V.
Set the current sense resistance Rs in order to flow
necessary current even when clamp voltage is
VthIS-P(min). The maximum of the inductor peak current
(ILP(max.)) is approximately expressed with the following
equation.
(1-6) MUL Pin circuit
The input voltage of MUL pin is related to IS pin
threshold voltage range. To prevent the distortion of AC
input current, the value of resistor divider R3 and R4
should be determined so that the maximum peak
voltage of MUL pin (VMUL-P(max)) is below 2.5V when
the AC line voltage is maximum.
2× 2 × Po
ILP (max.) =
η × Vac(min.)
Therefore, the value of Rs can be calculated with the
following equation.
R 4
VMUL−P(max)
= 2 × Vac(max)×
R3 + R 4
< 2.5[V]
VthIS−p(min)
Rs =
ILP (max.)
C1
When MOSFET turns on, surge current caused by
driving MOSFET or discharging of parasitic capacitor
flows to Rs. This IC controls the peak current of
MOSFET. Therefore if this surge current is too large,
the AC input current can be distorted by malfunctions.
In addition, depending on the magnitude or timing of
surge current, irregular narrow pulses may appear on
the output pulses when OUT pin goes high. Therefore,
a RC filter R6 and C4 is typically connected. In order
not to influence normal operation, it is necessary to set
the cutoff frequency of RC filter higher than the
switching frequency. In this calculation, the cutoff
frequency is assumed about 1 or 2 MHz.
R3
R4
MUL
3
C6
Fig.23 MUL pin circuit
In an actual circuit, the rectified voltage contains
many noises from switching. To avoid this influence, a
capacitor C6 is typically connected between MUL pin
and GND pin. If the capacity of C6 is too small, the
filtering is not effective. If the capacity is too large, the
input voltage of MUL pin is distorted and then AC input
current is also distorted. In calculating, the cutoff
frequencies determined with C6 and R3, R4 should be
set to about 1 or 2kHz.
1
≈ 1or 2[MHz]
2× π × C4× R6
D1
L1
1
≈ 1or 2[kHz]
2× π × C6 × (R3 //R 4)
C1
Q1
C2
Where;
R3//R4 represents the resistance of parallel
connection of R3 and R4.
Rs
R6
(1-7) IS Pin circuit
C4
The input current becomes the greatest when AC line
voltage is minimum (Vac(min.)). Even in this case, it is
necessary to set the current detector resistance Rs so
that required input current can be supplied.
IS
4
After setting a voltage divider connected to MUL pin,
the threshold voltage range of IS pin is calculated as
follows.
Fig.24 IS pin circuit
When AC line voltage is minimum, the minimum
clamp voltage of IS pin threshold voltage
(VthIS-P(min)) can be calculated according to the
22
FA5500AP/AN, FA5501AP/AN
Quality is our message
If the effect of RC filter is not enough, connect OUT
pin and MOSFET as shown in Fig. 25 in order to reduce
driving current to turn the MOSFET on. In this circuit,
drive currents to turn the MOSFET on and off can be
set independently.
(1-9) Input/output capacitor
The input capacitor C1 rejects the switching ripples of
inductor current and prevents it from flowing to AC line.
Therefore, the larger C1 is, the smaller the switching
ripples contained in AC input current are. But larger C1
may causes of lowering power factor.
In calculation, capacity of C1 is assumed as 1µF per
1A of maximum AC input current. The most appropriate
capacity should be determined by evaluating power
factor and AC line noises in the actual circuit.
OUT
R8
R9
7
Rs
switching
ripple current
L1
D1
OUT
R8
7
C1
C2
Q1
Rs
Fig.27 Input capacitor circuit
or
R9
Rs
Fig.25 Gate drive circuit
PFC output contains ripple voltage of twice the line
frequency. The output capacitor C2 suppresses this
ripple voltage.
The ripple voltage appearing on the output voltage
can be expressed by the following equation.
The inductor current reaches zero just before the
MOSFET turns on and MOSFET current rises from
around zero when MOSFET is on. Therefore, even if
the driving current to turn on is set small and the
switching speed becomes a little slow, the loss of
MOSFET does not increase extremely.
Io
Vripple(0−p)
≈
2× ω × C2
(1-8) Input/output of error amplifier
where,
PFC output voltage Vo is divided down and input to
FB pin. Vo is controlled so that the FB pin voltage is
equal to the internal reference. This IC has a current
source (IFB) of 2.5µA(typ.) connected FB pin internally.
Therefore, the relationship between Vo and the voltage
divider resistor can be expressed with the following
equation.
ω = 2× π × fac
fac: AC line frequency [Hz]
If the output voltage including ripple voltage reaches
up to the overvoltage threshold, the IC cannot operate
properly. Therefore, C2 should be selected satisfying
the following equation.
IFB
R1+ R2
Vo =
× Vref +
+ R1×IFB
Vripple(0-p)<0.075×Vo
R2
Gm
where, Gm : Transconduc tance of error amplifier
Vripple(0-p)
PFC output voltage contains ripple voltage
associated with twice the line frequency. If this ripple
voltage appears at the output of error amplifier, PFC
does not operate stably. To avoid this, a capacitor
should be inserted between COMP pin and GND so
that the bandwidth is set to about 20Hz. The bandwidth
can be expressed with the following equation.
Vo
2×fac
Fig.28 Output ripple voltage
Gm
BW =
2× π × C3
Vo
R1
MUL
1
FB
R2
ERRAMP
Vref
I
FB
=2.5µA
(typ)
=2.5V(typ)
2
COMP
C3
Fig.26 Input/output of error amplifier circuit
23
FA5500AP/AN, FA5501AP/AN
Quality is our message
(2)Improving operation around
zero-crossing
(3)Prevent malfunction caused by negative
voltage applied to a pin
The dead time of AC input current may appear
around zero crossing. A high value resistor R12
(several 100k or several MegΩ) connected between
MUL pin and Vcc pin may reduce the dead time. But too
much correction, which means connecting too small
resistance, causes distortion of AC input current or
overvoltage at light load. Be careful when R12 is
connected.
When large negative voltage is applied to each IC pin,
a parasitic element in the IC may operate and cause
malfunction. Be careful not to allow the voltage applied
to each pin to drop below -0.3V. Especially for the OUT
pin, voltage oscillation caused after the MOSFET turns
off may be applied to the OUT pin via the parasitic
capacitance of the MOSFET, causing the negative
voltage to be applied to the OUT pin. If the voltage falls
below -0.3V, add a Schottky diode between the OUT
pin and the ground. The forward voltage of the Schottky
diode can suppress the voltage applied to the OUT pin.
Use the low forward voltage of the Schottky diode.
Iin
0
t
OUT
7
R8
Fig.29 Input current including dead time
SBD
Rs
C1
R3
R12
3
Fig.33 Protection circuit of OUT pin against the
negative voltage
8
VCC
Similarly, be careful not to cause the voltages at other
pins to fall below -0.3V.
R4
C6
MUL
Fig.30 Compensation circuit of dead time
(4)Prevent malfunction caused by noise
On the other hand, surge current may appear around
zero crossing in some application.
This surge current can influence harmonic currents. In
this case, a high value resistor R13 (several 100k or
several MegΩ) connected between IS pin and Vcc pin
may suppress this surge current.
Noise applied to each pin may causes malfunction of
IC. Capacitor of RC filter for IS pin and MUL pin should
be connected as close as possible to suppress noise
effectively.
Noise applied to COMP pin may also cause
malfunction. The capacitor between COMP and GND
pin should be connected as close as possible, too.
(5)Open/short protection at FB pin
0
This IC has Open/short protection at FB pin circuit,
which shuts off output, if complete open circuit or short
circuit failures may occur on voltage divider for
monitoring PFC output voltage. But, if voltage divider
resistance varies because of degradation, this circuit
may not protect enough. Therefore, be sure to consider
and evaluate your set, component characteristics and
the like sufficiently, and then design an additional
protection circuit if needed.
Fig.31 Input current including surge current
D1
L1
C1
Q1
C2
8
4
Rs
R13
R6
VCC
IS
C4
Fig.32 Compensation circuit of surge current
24
FA5500AP/AN, FA5501AP/AN
Quality is our message
(6)ON/OFF operation by external signal
The following methods make it possible to turn on or
off the PFC by external signal.
(i) Shut down supply voltage to Vcc pin
To shut down supply voltage to Vcc pin by external
signals leads IC’s shut down.
(ii) Lower COMP pin voltage below Vthcomp
It can stop the output pulses to lower COMP pin
voltage below Vthcomp. In this case, lower COMP pin
voltage
below
1V,
considering
temperature
characteristic and so on. An example circuit is shown
in Fig. 34.
COMP
2
R17
R16
C3
ON/OFF
signal
Q3
Fig.34 ON/OFF control circuit (1)
If the discharging current of capacitor C3 should be
limited, connect a resistor R19 as shown in Fig. 35.
The value of R19 should be selected 1kΩ or smaller.
In addition, check that COMP pin voltage is lowered
below 1V.
COMP
2
R19
R17
R16
C3
ON/OFF
signal
Q3
Fig.35 ON/OFF control circuit (2)
When lowering COMP pin voltage, in addition to the
output current of error amplifier, current, which flows
voltage divider connected FB pin, appears at COMP
pin through diode connected between input and output
of error amplifier. When designing and evaluating the
circuit, consider this current sufficiently, too. (See 10.
Description of Each Circuit (1) Error amplifier)
Do not use “Open/short protection at FB pin” as
ON/OFF control by lowering FB pin voltage. In this case,
there is a possibility of an abnormal rise of PFC output
voltage at the turning on and off.
25
FA5500AP/AN, FA5501AP/AN
Quality is our message
12. Example of application circuit
410V
390µH
ERC25-06
100W
600V4A
80 to 264Vac
680k
2200pF 5D11
2SK3520
0.1
470k
470k
3A
0.47µF
100µF
47k
0.22µF
0.22µF 2200pF
10k
ERA91-02
680k
680k
100k
220
47k
33
22
100k
5.6
FB
VCC
0.1µF
COMP OUT
MUL
IS
GND
ZCD
FA5501A
2200pF
100µF
ERA91-02
9.1k
0.01µF
0.47µF
Note
This application circuit exemplifies the use of IC for your reference only. Parts tolerance, parts characteristics,
influence of noise, etc. are not defined in this application circuit. When design an actual circuit for a product, you must
determine parts tolerance, parts characteristics, influence of noise, etc. for safe and economical operation. Neither Fuji
nor its agents shall be liable for any injury caused by any use of this circuit.
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