GPC3002A-C [GENERALPLUS]
3-Channel Sound Controller;
| 型号： | GPC3002A-C |
| 厂家： | 
Generalplus Technology Inc. |
| 描述： | 3-Channel Sound Controller |
| 文件： | 总19页 (文件大小：541K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
GPC3002A
3-Channel Sound Controller
Feb. 16, 2012
Version 1.0
GENERALPLUS TECHNOLOGY INC. reserves the right to change this documentation without prior notice. Information provided by GENERALPLUS
TECHNOLOGY INC. is believed to be accurate and reliable. However, GENERALPLUS TECHNOLOGY INC. makes no warranty for any errors which may
appear in this document. Contact GENERALPLUS TECHNOLOGY INC. to obtain the latest version of device specifications before placing your order. No
responsibility is assumed by GENERALPLUS TECHNOLOGY INC. for any infringement of patent or other rights of third parties which may result from its use.
In addition, GENERALPLUS products are not authorized for use as critical components in life support devices/systems or aviation devices/systems, where a
malfunction or failure of the product may reasonably be expected to result in significant injury to the user, without the express written approval of Generalplus.
GPC3002A
Table of Contents
PAGE
TABLE OF CONTENTS .......................................................................................................................................................................................... 2
3-CHANNEL SOUND CONTROLLER.............................................................................................................................................................. 3
1. GENERAL DESCRIPTION......................................................................................................................................................................... 3
2. BLOCK DIAGRAM..................................................................................................................................................................................... 3
3. FEATURES................................................................................................................................................................................................. 3
4. APPLICATION FIELD ................................................................................................................................................................................ 3
5. SIGNAL DESCRIPTIONS .......................................................................................................................................................................... 4
5.1. PAD ASSIGNMENT ................................................................................................................................................................................. 6
5.2. PIN MAP ............................................................................................................................................................................................... 7
6. FUNCTIONAL DESCRIPTIONS................................................................................................................................................................. 8
6.1. CPU ..................................................................................................................................................................................................... 8
6.2. RAM AREA............................................................................................................................................................................................ 8
6.3. EXTERNAL MEMORY AREA ...................................................................................................................................................................... 8
6.4. MAP OF MEMORY AND I/OS .................................................................................................................................................................... 8
6.5. I/O PORT............................................................................................................................................................................................... 8
6.6. POWER SAVING MODE ........................................................................................................................................................................... 8
6.7. RTC (REAL TIME CLOCK)....................................................................................................................................................................... 8
6.8. LOW VOLTAGE RESET ............................................................................................................................................................................ 9
6.9. TIMER/COUNTER ................................................................................................................................................................................... 9
6.10.SPEECH AND MELODY............................................................................................................................................................................ 9
7. ELECTRICAL SPECIFICATIONS ............................................................................................................................................................ 10
7.1. ABSOLUTE MAXIMUM RATINGS............................................................................................................................................................... 10
7.2. DC CHARACTERISTICS (TA = 25℃)........................................................................................................................................................ 10
7.3. (3VOLT) EXTERNAL OSCILLATOR R RELATIVE FOSC TABLE (THE TABLE IS ONLY FOR REFERENCE)................................................................11
7.4. THE RELATIONSHIP BETWEEN THE ROSC AND THE FCPU ............................................................................................................................ 12
8. APPLICATION CIRCUITS........................................................................................................................................................................ 13
8.1. APPLICATION CIRCUITS WITH LOW LOADING.......................................................................................................................................... 13
8.2. APPLICATION CIRCUITS HEAVY LOADING (SUCH AS MOTOR, HIGH BRIGHTNESS LED) .............................................................................. 14
9. PCB LAYOUT GUIDE FOR HEAVY LOADING APPLICATION............................................................................................................... 15
10. PACKAGE/PAD LOCATIONS.................................................................................................................................................................. 16
10.1.ORDERING INFORMATION ..................................................................................................................................................................... 16
10.2.PACKAGE INFORMATION ....................................................................................................................................................................... 16
11. DISCLAIMER ........................................................................................................................................................................................... 18
12. REVISION HISTORY................................................................................................................................................................................ 19
© Generalplus Technology Inc.
Proprietary & Confidential
2
Feb. 16, 2012
Version: 1.0
GPC3002A
3-CHANNEL SOUND CONTROLLER
1. GENERAL DESCRIPTION
3. FEATURES
The GPC3002A is embedded with an 8-bit processor, a set of A/D
bus for external program/data memory (maximal 4M bytes
SRAM/Flash) and 256-byte working SRAM, three sets of 12-bit
timer/counters, 32 general I/Os, a 3-channel mixer, a pair of 12-bit
PWM outputs and a Real Time Clock(RTC). The microprocessor
can implement software based on audio processing, functional
Wide Operating Voltage: 2.0V * - 5.5V
* The lowest operating voltage depends on LVR (Low Voltage Reset)
level. Typical LVR voltage is 2.0V but with+/- 0.1V deviation possibility
Working Voltage with 6MHz system clock: 2.2V ** - 5.5V
Working Voltage with 8MHz system clock: 2.4V ** - 5.5V
** The system clock would start to slow down at lowest working voltage
(6MHz at 2.2V, 8MHz at 2.4V); please refer to the Frequency vs. VDD
curve on page 12
control and others.
For audio processing, melody and speech
can be mixed into one output. It operates over a wide voltage
range from 2.0V through 5.5V, and it includes Low Voltage Reset
to assure system operating appropriately under low voltage
condition. In addition, GPC3002A also features the sleep mode
External 4M bytes maximal memory (SRAM/Flash)
256-byte working SRAM
Generalplus ICE_CORE embedded
Built-in internal (8MHz or 6MHz) or external RC oscillator
Standby mode (Clock Stop mode) for power savings.
Max. 5.0uA @ 4.5V
for power saving.
With the high cost/performance ratio,
GPC3002A is one of the most suitable engines in the industry for
vocal applications.
32 general I/Os (including four high brightness LED driving I/Os)
Three 12-bit timer/counters
2. BLOCK DIAGRAM
8 IRQs & 1 NMI interrupts
Three wake-up sources
Feedback function
Low Voltage Reset (LVR) function
Watchdog function
IR function
RTC function
Four sets of 256 level PWMIO outputs
A 3-channel mixer with melody or ADPCM/PCM input
A pair of PWM outputs with volume control
4. APPLICATION FIELD
Talking instrument controller
General music synthesizer
High end toy controller
Intelligent education toys
And more
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Feb. 16, 2012
Version: 1.0
GPC3002A
5. SIGNAL DESCRIPTIONS
PIN Name
PIN No.
LQFP 128
Pin. No.
Type
Description
IO Port
IOA[7:0]
83-76
75-68
111-104
I/O IOA[7:0] is a bi-directional I/O port, which can be software programmed
as wake up I/O. 1Mohm || 100Kohm feedback pull low resistor
IOA7 shared pad with IR output
IOA1 shared pad with external clock input
IOA0 shared pad with external interrupt input
IOA[2:1 ]share pad with feedback function
IOB[7:0]
103-101, 92-88
I/O IOB[7:0] is a bi-directional I/O port, which can be software programmed
as wakeup I/O. 1Mohm || 100Kohm feedback pull low resistor
IOB5 shared pad with XTAL 32KHz input
IOB4 shared pad with XTAL 32KHz output
IOB[3:0] shared pad with 256-level PWM output, high sink current
I/O IOC[7:0] is a bi-directional I/O port, which can be software programmed
as wake up I/O. 1Mohm || 100Kohm feedback pull low resistor
I/O IOD[7:0] is a bi-directional I/O port, which can be software programmed
as wake up I/O. 1Mohm || 100Kohm feedback pull low resistor
IOC[7:0]
IOD[7:0]
65-58
57-50
85-78
77-70
Power & Ground PAD
VDD1、VDD2、VDD3
VSS1、VSS2
66,84,93
67,88
94
86, 112, 120
87,115
121
P
G
P
P
Power supply voltage input, VDD3 is for 3.3V regulator input.
Ground reference
VDD33
3.3V regulator output
VDD_MEM1、VDD_MEM2
26,37
40,51
External SRAM/Flash address & data bus power supply voltage input,
which can be lower than or equal to VDD1, VDD2, VDD3.
External SRAM/Flash address & data bus ground reference
PWM driver power; which can be higher than or equal to VDD1, VDD2,
VDD3
VSS_MEM1、VSS_MEM2
27,38
2
41,52
8
G
P
PVDD
PVSS
XROMCEB
XROMOEB
XROMWEB
XBKA[21:20]B
XBKA[21:14]
XA[13:0]
4
10
G
PWM driver ground reference
External memory Address & Data bus Interface
11
17
O
O
O
O
O
O
External SRAM/Flash chip select enable (low active). VDD_MEM
power domain
10
9
16
External SRAM/Flash output enable (low active). VDD_MEM power
domain
15
External SRAM/Flash write enable (low active). VDD_MEM power
domain
20-21
26-27
37-39, 42-46
Complementation of XBKA[21:19], for extend external SRAM/Flash,
VDD_MEM power domain
23-25,28-32
External SRAM/Flash bank selection address. VDD_MEM power
domain
33-36,39-47 47-50, 53-61, 69
,49
External SRAM/Flash address bus. VDD_MEM power domain
XD[7:0]
19-12
25-18
I/O External SRAM/Flash data bus. VDD_MEM power domain
ICE related
ICE_EN
ICE_CLK
ICE_SDA
95
96
97
122
123
124
I
I
ICE enable, high active (with pull low)
ICE clock (with pull low)
I/O ICE serial data bus
4
© Generalplus Technology Inc.
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Feb. 16, 2012
Version: 1.0
GPC3002A
PIN Name
PIN No.
LQFP 128
Pin. No.
Type
Description
Others
NC[4:0]
48,90-89,87
-
-
N/A
-86
91
92
1,3
5
RESB
TEST
118
119
7,9
11
I
I
System reset input, low active (with pull high)
Test pin, high active (with pull low)
PWM output
AUDN, AUDP
HMCUEN
XSLEEP
DFI
O
I
Hard macro CPU enable, high active, tied to VDD_MEM.
System sleep status output, high active. VDD_MEM power domain
Disconnect external SRAM/Flash interface, high active (with pull low).
VDD_MEM power domain
6
12
O
I
7
13
ICE_ID
OSC
8
14
113
36
I
I
I
ICE identify signal (with pull low). VDD_MEM power domain
R-oscillator input, connect resistor to VDD
85
22
IOSC_PEN
Oscillator select signal When ICE mode (input floating). VDD_MEM
power domain
Total: 97 Pins
Legend: I = Input, O = Output, P = Power, G = Ground
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GPC3002A
5.1. PAD Assignment
The IC substrate should be connected to VSS or floated
Note1: To ensure that the IC functions properly, please bond all of VDD and VSS pins.
Note2: VDD_MEM can be lower than or equal to VDD.
Note3: PVDD can be higher than or equal to VDD.
Note4: Please DON’T bond TEST pin.
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GPC3002A
5.2. PIN Map
1
NC
NC
NC
NC
NC
NC
NC
96
95
94
93
92
91
90
89
88
87
86
85
84
83
82
81
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
2
NC
3
NC
NC
4
5
IOB4
IOB3
IOB2
IOB1
IOB0
VSS1
VDD1
IOC7
IOC6
IOC5
IOC4
IOC3
IOC2
IOC1
IOC0
IOD7
IOD6
IOD5
IOD4
IOD3
IOD2
IOD1
IOD0
XA0
6
7
AUDN
PVDD
8
9
AUDP
PVSS
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
HMCUEN
XSLEEP
DFI
ICE_ID
GPC3002A
LQFP 128
XROMWEB
XROMOEB
XROMCEB
XD0
XD1
XD2
XD3
XD4
XD5
XD6
XD7
XBKA21B
XBKA20B
NC
NC
NC
NC
NC
NC
NC
NC
NC
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GPC3002A
6. FUNCTIONAL DESCRIPTIONS
6.1. CPU
impedance retained to save DC power.
IOA7 can be
programmed as an IR transmitter. IOA1 can be programmed as
an external clock source. IOA0 can be programmed as an
external interrupt source. IOA[2:1] can also be programmed as
feedback function with IOA2 connecting to the input of inverter and
IOA1 connecting to the output of inverter. With feedback function,
RC or Xtal oscillation can be implemented. For mode flexible
application, IO wakeup and ECK as timerA clock source are also
The microprocessor inside the GPC3002A is an 8-bit high
performance processor equipped with Accumulator, Program
Counter, X and Y Register, Stack pointer and Processor Status
Register (the same as the 6502 instruction structure). The
maximum CPU speed of 8.0MHz is capable of generating clearer
speech, pleasant music as well as achieving the best
performance.
available when feedback function enable.
Refer the
programming guide for more information about feedback function.
IOB5 and IOB4 can be programmed as a 32KHz crystal clock
6.2. RAM Area
The total RAM size is 128-byte or 256-byte (including Stack),
128-byte RAM start from address $0080 through $00FF ($0080 -
$00FF mapping to $0180 - $01FF), and 256-byte RAM start from
address $0080 through $017F ($0100 - $017F mapping to $0180 -
$01FF).
generator by adding external components.
high current to drive high brightness LED.
IO port configuration:
IOB[3:0] can sink
Input/Output port : IOA[7:0], IOB[7:0],IOC[7:0], IOD[7:0]
Buffer(R)
6.3. External memory Area
Port_Data(W)
The GPC3002A provides external 4M-byte maximal memory that
can be defined as the program area, audio data area, or both. To
access memory, users should program the BANK SELECT
Register; choose bank, and access address to fetch data.
Register
Port_Buffer(W)
Pin pad
Control
logic
Port_DIR(R/W)
1M ohm
pull low
100K ohm
pull low
6.4. Map of Memory and I/Os
Data(R)
CPU View
$0000-$007F
$0080-$00FF
$0100-$017F
I/O &Reg.
RAM1
RAM2
6.6. Power Saving Mode
Same as
$80-$FF
$0180-$01FF
The GPC3002A includes a power saving mode (standby mode) for
those applications that require low standby current. To enter
standby mode, the Wake-up Register must be enabled and then
stop the CPU clock by writing the STOP CLOCK Register to enter
standby mode. In such mode, RAM and I/Os will remain in their
previous states until being awakened. All 32 IOs, RTC (8Hz/2Hz),
and external interrupt (IOA0) are wake-up sources in the
GPC3002A. After the GPC3002A is awakened, the internal CPU
will continue to execute the program.
or $0100-$017F
$0200-$07DF
$07E0-$07F5
$07F6-$07F9
$07FA-$07FF
$0800-$0819
$081A-$081F
$0820-$0835
$0836-$083F
Test ROM
Test IRQ
ROM View
$00000 - $03FFF
$04000 - $07FFF
$08000 - $0BFFF
$0C000 - $0FFFF
$10000 - $13FFF
$14000 - $17FFF
Bank0
Bank1
Bank2
Bank3
Reserved
Test Vector
Reserved
Normal Vector
Normal IRQ
Reserved
Bank4
Bank5
Program ROM
Bank0
$0840-$3FFF
$4000-$7FFF
. . .
Program ROM
Bank1
$3F8000 - $3FBFFF
$3FC000 - $3FFFFF
Bank254
Bank255
Program ROM
Bank2
$8000-$BFFF
$C000-$FFFF
6.7. RTC (Real Time Clock)
Program ROM
Bank register to
assign bank
ROM address= $C000-$FFFF
GPC3002A provides two RTC (real time clock) sources: 2Hz, 8Hz.
The RTC sources can be used for time counting or system
awaking. Each RTC occurs, the system wakes up and users can
Use Bank register to mapping address
6.5. I/O Port
use this signal for time counting.
In addition, GPC3002A
There are 32 IOs (IODA[7:0], IODB[7:0], IOC[7:0] and IOD[7:0]) in
the GPC3002A, which are bit-controlled IOs. They can be
programmed as input (pure input or pull-low) or output buffer. As
pull-low input, they keep a less impedance to get better noise
supports 32768Hz OSC in auto mode, the first one second runs at
strong mode (consumes the highest power) and then switch to
weak mode automatically to save power.
immunity.
While pressing the key (IOs to VDD), a large
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Version: 1.0
GPC3002A
6.8. Low Voltage Reset
Suppose TMB is specified as a counter, users can reset it by
loading #0 into the counter. After the counter is activated, the
counter value can also be read at the same time. The read
instruction will not affect the counter value nor reset it.
The GPC3002A has a Low Voltage Reset (LVR) function. In
general, the CPU becomes unstable and malfunctions under low
voltage condition. With the unique design of Low Voltage Reset
in GPC3002A, it is able to reset all functions to the initial
operational (stable) state if the power voltage drops below certain
operation voltage.
6.10. Speech and Melody
In speech synthesis, the GPC3002A can use NMI for accurate
sampling frequency. User can store the speech data in external
memory and play it back with realistic sound quality. Several
algorithms are recommended for high fidelity and compression of
sound: PCM, ADPCM, SACMA3400 and A3400Pro.
6.9. Timer/Counter
The GPC3002A has three 12-bit timer/counters: TMA, TMB, and
TMC respectively. In the timer mode, TMA, TMB, and TMC are
re-loadable up-counters. When timer overflows from $0FFF to
$0000, the carry (overflow) signal will make the user’s pre-set
value to be loaded into timer automatically and count up again.
At the same time, the carry signal will generate an INT signal if the
corresponding bit in the INT ENABLE Register is enabled.
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GPC3002A
7. ELECTRICAL SPECIFICATIONS
7.1. Absolute Maximum Ratings
Characteristics
Symbol
Ratings
DC Supply Voltage
V+
VIN
TA
< 7.0V
Input Voltage Range
Operating Temperature
Storage Temperature
(VSS-0.3V) to (V+ + 0.3V)
0℃ to +70℃
-65℃ to +150℃
TSTO
Note: Stresses beyond those given in the Absolute Maximum Rating table may cause operational errors or damage to the device. For normal operational
conditions see AC/DC Electrical Characteristics.
7.2. DC Characteristics (TA = 25℃)
Limit
Characteristics
Symbol
Unit
Test Condition
Min.
1.9
-
Typ.
2.0
-
Max.
2.1
Min. Operating Voltage
Max. Operating Voltage
Low Voltage Reset Level
VDD, min
VDD, max
VLVR
V
V
V
5.5
1.9
2.0
2.1
FCPU
output off
FCPU
output off
=
6MHz
@
@
3.0V, PWM
4.5V, PWM
-
-
2
4
-
-
mA
mA
Operating Current
IOP
=
6MHz
-
-
-
-
5
5
uA
uA
VDD = 3.0V
VDD = 4.5V
Standby Current
ISTBY
VIH
VIL
GPIO Input High Level
(IOA, IOB, IOC, IOD)
GPIO Input Low Level
(IOA, IOB, IOC, IOD)
Output High Current
(IOA, IOB, IOC, IOD)
0.7VDD
-
-
-
-
V
V
VDD = 4.5V
VDD = 4.5V
0.3VDD
-
-
-
-
-
-
-
-
-
-
-
-
5
10
-
-
-
-
-
-
-
-
-
-
-
-
mA
mA
VDD = 3.0V, VOH = 0.7*VDD
VDD = 4.5V, VOH = 0.7*VDD
VDD = 3.0V, VOL = 0.3*VDD
VDD = 4.5V, VOL = 0.3*VDD
VDD = 3.0V, VOL = 0.3*VDD
VDD =4.5V, VOL = 0.3*VDD
VDD = 3.0V, IO = 0V
IOH
Output Low Current
10
mA
IOL
(IOA, IOB[7:4], IOC, IOD)
20
mA
Output Low Current
(IOB[3:0])
20
mA
IOL
40
mA
Input Pull Low Resistor
(IOA, IOB, IOC, IOD)
200
100
2000
1000
180
280
Kohm
Kohm
Kohm
Kohm
mA
RL
VDD = 4.5V, IO = 0V
Input Pull Low Resistor
(IOA, IOB, IOC, IOD)
VDD = 3.0V, IO = 3.0V
RL
VDD = 4.5V, IO = 4.5V
VDD = 3.0V, 8 Ohms load
PWM Driver Current
IPWM
mA
VDD = 4.5V, 8 Ohms load
Fosc(4.5v)−Fosc(2.4v)
Frequency deviation by
voltage drop
Fosc(4.5V)
△F/F
-
-
-
2
2
-
-
-
%
%
%
External ROSC
Fosc(3.0v)−Fosc(2.4v)
Fosc(3.0v)
FCPU = 6MHz, Internal ROSC
Fosc(3.0v)−Fosc(2.4v)
Fosc(3.0v)
2
FCPU = 8MHz, Internal ROSC
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GPC3002A
Limit
Typ.
Characteristics
Symbol
Unit
Test Condition
Min.
Max.
Fosc(4.5v)−Fosc(3.0v)
Fosc(4.5v)
-
2
2
-
%
FCPU = 6MHz, Internal ROSC
Fosc(4.5v)−Fosc(3.0v)
Fosc(4.5v)
-
-
%
%
FCPU = 8MHz, Internal ROSC
Fosc(3.0v)− 6MHz
6MHz
-7
-
-
-
-
-
-
7
FCPU
=
6MHz
@
3.0V,
ROSC=51Kohm, External ROSC
Fosc(4.5v)− 6MHz
6MHz
-7
-3
-3
-3
-3
7
3
3
3
3
%
%
%
%
%
FCPU
=
6MHz
@
4.5V,
ROSC=51Kohm, External ROSC
Fosc(3.0v)− 6MHz
6MHz
FCPU
=
6MHz
@
@
@
@
3.0V,
3.0V,
4.5V,
4.5V,
△F/F
Frequency lot deviation
Internal ROSC
Fosc(3.0v)− 8MHz
8MHz
FCPU
=
8MHz
Internal ROSC
Fosc(4.5v)− 6MHz
6MHz
FCPU
=
6MHz
Internal ROSC
Fosc(4.5v)− 8MHz
8MHz
FCPU
=
8MHz
Internal ROSC
Note: VDD, min may have +/-0.1V variation due to process issue.
7.3. (3volt) External Oscillator R Relative FOSC Table (the table is only for reference)
R(Kohm)
39
51
75
FOSC (MHz)
8
6
4
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GPC3002A
7.4. The Relationship between the ROSC and the FCPU
7.4.1. Frequency vs. VDD (built-in 6MHz ROSC
)
7.4.3. Operating Current vs. VDD (PWM output off)
7
6
7
6
5
4
3
2
5
Fosc=8M
4
3
Fosc=6M
2
1
0
2
2.5
3
3.5
4
4.5
5
5.5
6
1
VDD(V)
2.2
1
2
3
4
5
6
VDD(V)
7.4.2. Frequency vs. VDD (built-in 8MHz ROSC
)
9
8
7
6
5
4
3
2
1
2.4
1
2
3
4
5
6
VDD(V)
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GPC3002A
8. APPLICATION CIRCUITS
8.1. Application Circuits with Low Loading
PCB Layout Guidelines:
1. VDD, VDD_MEM and PVDD must be connected to power input port directly, not the branch of each other.
2. VDD_MEM can be lower than or equal to VDD.
3. PVDD can be higher than or equal to VDD.
4. VSS, VSS_MEM, PVSS must be connected to ground input directly, not the branch of each other.
5. Capacitor (used for XTAL32K) is proposed to be 12~20 pF.
6. When using 2 batteries, C1 is suggested 0.1uF~4.7uF, and should be increased in high volume application.
7. R1 can be removed when using internal oscillator.
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8.2. Application Circuits Heavy Loading (such as motor, high brightness LED)
PCB Layout Guidelines:
1. VDD, VDD_MEM and PVDD must be connected to power input port directly, not the branch of each other.
2. VDD_MEM can be lower than or equal to VDD.
3. PVDD can be higher than or equal to VDD.
4. VSS, VSS_MEM and PVSS must be connected to ground input directly, not the branch of each other.
5. Capacitor (used for XTAL32K) is proposed to be 12~20 pF.
6. The typical value of C2 is 47uF, and should be modified in different loading.
7. R1 can be removed when using internal oscillator.
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GPC3002A
9. PCB LAYOUT GUIDE FOR HEAVY LOADING APPLICATION
To avoid the unexpected noises that may end up with abnormal CPU operations, the following cares must be exercised while designing the
PCB layout:
Bond all VDD and VSS pins out.
The 0.1uF capacitor placed between VDD and VSS must be as close as possible to IC itself.
Power lines are as independent as possible,
The PCB layout examples are given as follows:
The PCB layout method (Power line connects in series) as below is not recommended.
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10. PACKAGE/PAD LOCATIONS
10.1. Ordering Information
Product Number
Package Type
GPC3002A - C
Chip form
GPC3002A - QL09x
Halogen Free Package
10.2. Package Information
LQFP 128
Millimeter
Nom.
Symbol
Min.
Max.
A
A1
A2
D
-
-
-
1.60
0.15
1.45
0.05
1.35
1.40
16.00 BSC.
14.00 BSC.
16.00 BSC.
14.00 BSC.
D1
E
E1
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Millimeter
Nom.
Symbol
Min.
Max.
e
θ
0.40 BSC.
3.5°
0°
7°
b
0.13
0.09
0.45
0.16
0.23
0.20
0.75
c
-
L
0.60
L1
1.00 REF
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11. DISCLAIMER
The information appearing in this publication is believed to be accurate.
Integrated circuits sold by Generalplus Technology are covered by the warranty and patent indemnification provisions stipulated in the
terms of sale only. GENERALPLUS makes no warranty, express, statutory implied or by description regarding the information in this
publication or regarding the freedom of the described chip(s) from patent infringement. FURTHERMORE, GENERALPLUS MAKES NO
WARRANTY OF MERCHANTABILITY OR FITNESS FOR ANY PURPOSE. GENERALPLUS reserves the right to halt production or alter
the specifications and prices at any time without notice. Accordingly, the reader is cautioned to verify that the data sheets and other
information in this publication are current before placing orders. Products described herein are intended for use in normal commercial
applications. Applications involving unusual environmental or reliability requirements, e.g. military equipment or medical life support
equipment, are specifically not recommended without additional processing by GENERALPLUS for such applications. Please note that
application circuits illustrated in this document are for reference purposes only.
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12. REVISION HISTORY
Date
Revision #
Description
Page
Feb. 16, 2012
1.0
Original
19
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