GPL81201A [GENERALPLUS]
Low Power 84 Dots LCD Controller with 8KB ROM;
| 型号： | GPL81201A |
| 厂家： | 
Generalplus Technology Inc. |
| 描述： | Low Power 84 Dots LCD Controller with 8KB ROM CD |
| 文件： | 总14页 (文件大小：473K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
GPL81201A
Low Power 84 Dots LCD Controller
with 8KB ROM
Oct. 01, 2014
Version 1.0
GENERALPLUS TECHNOLOGY INC. reserves the right to change this documentation without prior notice. Information provided by GENERALPLUS
TECHNOLOGY INC. is believed to be accurate and reliable. However, GENERALPLUS TECHNOLOGY INC. makes no warranty for any errors which may
appear in this document. Contact GENERALPLUS TECHNOLOGY INC. to obtain the latest version of device specifications before placing your order. No
responsibility is assumed by GENERALPLUS TECHNOLOGY INC. for any infringement of patent or other rights of third parties which may result from its use.
In addition, GENERALPLUS products are not authorized for use as critical components in life support devices/systems or aviation devices/systems, where a
malfunction or failure of the product may reasonably be expected to result in significant injury to the user, without the express written approval of Generalplus.
GPL81201A
Table of Contents
PAGE
TABLE OF CONTENTS .......................................................................................................................................................................................... 2
1. GENERAL DESCRIPTION.......................................................................................................................................................................... 3
2. FEATURES.................................................................................................................................................................................................. 3
3. BLOCK DIAGRAM ...................................................................................................................................................................................... 4
4. SIGNAL DESCRIPTIONS............................................................................................................................................................................ 5
4.1. PIN DESCRIPTION .................................................................................................................................................................................. 5
4.2. PIN ASSIGNMENT (TOP VIEW) ................................................................................................................................................................ 6
4.2.1. LQFP48 Package for GPL81201A............................................................................................................................................ 6
5. FUNCTION DESCRIPTIONS....................................................................................................................................................................... 7
5.1. CPU ..................................................................................................................................................................................................... 7
5.2. CLOCK SOURCE..................................................................................................................................................................................... 7
5.3. ROM/RAM AREA .................................................................................................................................................................................. 7
5.4. STOP CLOCK MODE ............................................................................................................................................................................... 7
5.5. I/O PORTS............................................................................................................................................................................................. 7
5.6. LCD CONTROLLER ................................................................................................................................................................................ 7
5.7. MAP OF MEMORY................................................................................................................................................................................... 8
6. ELECTRICAL SPECIFICATIONS ............................................................................................................................................................... 9
6.1. ABSOLUTE MAXIMUM RATINGS ............................................................................................................................................................... 9
6.2. AC CHARACTERISTICS........................................................................................................................................................................... 9
6.3. DC CHARACTERISTICS (VDD = 3.0V, TA = 25℃) .................................................................................................................................... 9
7. APPLICATION CIRCUITS......................................................................................................................................................................... 10
8. PACKAGE/PAD LOCATIONS ................................................................................................................................................................... 11
8.1. ORDERING INFORMATION ......................................................................................................................................................................11
8.2. PACKAGE INFORMATION ........................................................................................................................................................................11
8.2.1. LQFP 48L outline dimensions..................................................................................................................................................11
9. DISCLAIMER............................................................................................................................................................................................. 13
10.REVISION HISTORY ................................................................................................................................................................................. 14
© Generalplus Technology Inc.
Proprietary & Confidential
2
Oct. 01, 2014
Version: 1.0
GPL81201A
LOW POWER 84 DOTS LCD CONTROLLER WITH 16KB OTP ROM
1. GENERAL DESCRIPTION
share pads with SEGMENT[23:16]
- Port C[1:0]: with programmable pull high / pull low / floating,
share pads with SEGMENT[25:24].
- Port D[7],D[1:0]: with programmable pull high / pull low /
floating.
The GPL81201A, a chip designed for LCD display embedded with
128 bytes SRAM and 8K bytes ROM, features four timers and up
to 15 software selectable general I/Os. It operates over a wide
voltage range of 1.8 - 3.6V@4/8MHz and has a sleep mode for
power saving mode, which retains the contents of RAM, but stops
the oscillator and causes all other chip functions to be inoperative.
Sleep mode can be released by using external wakeup sources or
time base wakeup source. This device is applicable for many
applications such as low power watch and other LCD-based
products.
- Port D[3:2]: with programmable pull high / pull low / floating,
share pads with X32O, X32I.
LCD configurations: 4 coms x 21 segs (MAX)
- Frame rate is 85Hz.
- LCD 1/3 bias; 1/3, 1/4 duty; VLCD = VDD
Four timers
- Basic timer provides Fosc/4194304 watch dog source;
- Timer0 is a general purpose 8-bit timer with input clock
selectable;
2. FEATURES
- Timer1 is a general purpose 12-bit timer with input clock
selectable
Built-in 8-bit processor
128-byte SRAM
- 32K timer is a time base wakeup source with frequency
selectable
8K-byte ROM
128 bit DPRAM
8 interrupt sources
Built-in 4M/8MHz Crystal or IOSC for system operation
- internal oscillator with ±5% precision .
Built-in 32KHz IOSC or 32768Hz Crystal oscillator circuit for
timebase.
-
TM0O, TM1O, CPUDiv1K, CPUDiv4K, CPUDiv32K,
CPUDiv2M, TBHF, TBLF.
Wakeup source
- Key (Port C/D) change wakeup
- 32K time base wakeup(TBHF/TBLF)
LVD (Low voltage detect)
Operating voltage:
- 4.0MHz@1.8V~3.6V or 8.0MHz@1.8V~3.6V
Built-in Standby mode (Clock Stop mode) & Halt mode(with
LCD and 32K timer on) for power saving
- Low standby current, ISTBY < 1u @3.6V, 25℃
- Low halt mode current, Ihalt < 8u @3.6V, 25℃
Up to 15 bi-directional tri-state I/O ports
- Port A[7:0]: with programmable pull high / pull low / floating,
- Sense VDD voltage@ 2.1V / 2.4V (register option)
Note1: TBHF: 128Hz, 256Hz, 512Hz or 1KHz
Note2: TBLF: 2Hz, 4Hz, 8Hz or 16Hz
© Generalplus Technology Inc.
Proprietary & Confidential
3
Oct. 01, 2014
Version: 1.0
GPL81201A
3. BLOCK DIAGRAM
Base timer
Timer 0/1
8K ROM
CLK
EFUSE
Reset
VFSOURCE
8-bit
micro-processor
IOSC4/8M
VSS
128B
INT control
POR
SRAM
VSSA
VDD
LVR
WDOG
16B
DP SRAM
CLK
X32O/ PD3
X32I / PD2
LCD Bias
LCD Driver
XTAL32K
IOSC32K
COM [3:0]
SEG [10:0]
13 PINSfor I/O
PD[7],
PD[1:0]
PA[7:0]
SEG[23:16]
PC[1:0]
SEG[25:24]
© Generalplus Technology Inc.
Proprietary & Confidential
4
Oct. 01, 2014
Version: 1.0
GPL81201A
4. SIGNAL DESCRIPTIONS
4.1. Pin Description
Type: I = Input, O = Output, S = Supply
Pin Name
Dice Pin No. PKG Pin No.
Type
Main Function
Alternate Function
SEG[0:10]
PA0/SEG16
PA1/SEG17
PA2/SEG18
PA3/SEG19
PA4/SEG20
PA5/SEG21
PA6/SEG22
PA7/SEG23
1~11
12
5~15
21
O
LCD driver segment output
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
PortA[7:0]: Bi-directional programmable Input / Output port. It can be
configured as pull_high resistor, pull_low resistor, floating input or
CMOS output.
13
22
14
23
SEG[23:16]: LCD driver segment output
15
24
16
25
17
26
18
27
19
28
PortC[1:0]: Bi-directional programmable Input/Output port. It can be
configured as pull_high resistor, pull_low resistor, floating input or
CMOS output.
PC0/SEG24
20
29
I/O
Normal wakeup; if a key is changed, the chip can be wakened from
sleep mode.
SEG[25:24]: LCD driver segment output
PC1/SEG25
COM[3:0]
21
30
I/O
O
22~25
31~36
LCD driver common output
PortD[7]: Bi-directional programmable Input/Output port. It can be
configured as pull_high resistor, pull_low resistor, floating input or
CMOS output.
PD7
26
37
I/O
Normal wakeup; if a key is changed, the chip can be wakened from
sleep mode.
VSSA
VSS
27
28
29
30
38
38
S
S
S
S
Ground
Ground
VFSOURCE
VDD
NC
40
Test pin. Keep it at floating state.
power supply
PortD[3]: Bi-directional programmable Input/Output port. It can be
configured as pull_high resistor, pull_low resistor, floating input or
CMOS output.
X32O/PD3
31
42
I/O
Normal wakeup; if a key is changed, the chip can be wakened from
sleep mode.
Crystal Output: It is connected with external crystal for 32K crystal
oscillation circuitry in crystal mode.
PortD[2]: Bi-directional programmable Input/Output port. It can be
configured as pull_high resistor, pull_low resistor, floating input or
CMOS output.
X32I/PD2
32
43
I/O
Normal wakeup; if a key is changed, the chip can be wakened from
sleep mode.
Crystal Input: It is connected with external crystal for 32K crystal
oscillation circuitry in crystal mode.
© Generalplus Technology Inc.
Proprietary & Confidential
5
Oct. 01, 2014
Version: 1.0
GPL81201A
Pin Name
Dice Pin No. PKG Pin No.
Type
Main Function
Alternate Function
PortD[1]: Bi-directional programmable Input/Output port. It can be
configured as pull_high resistor, pull_low resistor, floating input or
CMOS output.
PD1
33
34
44
45
I/O
Normal wakeup; if a key is changed, the chip can be awakened from
sleep mode.
PortD[0]: Bi-directional programmable Input/Output port. It can be
configured as pull_high resistor, pull_low resistor, floating input or
CMOS output.
PD0
I/O
Normal wakeup; if a key is changed, the chip can be awakened from
sleep mode.
4.2. PIN Assignment (Top View)
4.2.1. LQFP48 Package for GPL81201A
© Generalplus Technology Inc.
Proprietary & Confidential
6
Oct. 01, 2014
Version: 1.0
GPL81201A
5. FUNCTION DESCRIPTIONS
5.1. CPU
5.4. Stop Clock Mode
The 8-bit microprocessor in GPL81201A is a high performance
The GPL81201A equips
a
power saving mode for those
processor equipped with Accumulator, Program Counter,
X
applications requiring very low standby current. Users can simply
enable the wakeup sources to stop CPU clock by writing the
STOP CLOCK Register. By doing that, CPU will enter standby
mode and the RAM and I/Os remain at their previous states until
being awakened. There are two types of wakeup sources in the
GPL81201A, I/O PAD data transient (PortC/D Key change) and
Register, Y Register, Stack pointer and Processor Status Register
(the same as the 6502 instruction structure).
5.2. Clock Source
The GPL81201A equips two types of clock sources:
(1) High speed frequency to support the whole system operation.
There are two frequency options: 4MHz/8MHz and can be
selected by register based on various user’s application
needs. It comes from IOSC8M
32K timer base wakeup source(TBHF/TBLF).
After the
GPL81202A wakes up, CPU will go to the next state of where
CPU enters sleep mode. Wake-up action will not influence RAM
and I/Os.
Note1: TBHF: 128Hz, 256Hz, 512Hz or 1KHz
Note2: TBLF: 2Hz, 4Hz, 8Hz or 16Hz
(2) Low speed frequency to control LCD frame rate and time
base timer. It is derived from IOSC32K or XTAL32K.
5.5. I/O Ports
5.3. ROM/RAM Area
The GPL81201A has three IO ports: PortA, PortC and PortD.
These port pins may be multiplexed with an alternate function for
the peripheral features on the device. In general, when an initial
reset state occurs, all ports are used as a general purpose input
port. There are three parts in IO structure: data, direction and
attribution registers. Each corresponding bit in these ports
should be given a value.
The GPL81201A features 8K-byte ROM that can be defined as the
program area, address located from $E000H to $FFFFH. Its
RAM consists of 128 bytes (including Stack) at locations
$80H~$FFH mapping to $180H~$1FFH.
[Table] 5-1 I/O configurations
Attribution (P_IOX_ATT) Direction (P_IOX_DIR)
Data (P_IOX_DAT)
Function
Floating
Description
Input with float
Input with pull-low
Output Data
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
Pull low
Driving low
Driving High
Floating
Output Data
Input with float
Input with pull-high
Output Data
Pull high
Driving High
Driving low
Output Data
5.6. LCD Controller
GPL81201A contains a LCD controller/driver that provides the capability to drive 4 commons and 21 segments LCD. To reduce CPU
overhead, a display buffer is designed for LCD mappings. A LCD dot/pattern is set ON or OFF by programming the corresponding bit in
the display buffer. In addition, the LCD can be programmed as 1/3duty with 1/3bias or 1/4duty with 1/3bias. The VLCD level is equal
VDD. The LCD driver can also operate during sleep by keeping 32KHz oscillator running.
© Generalplus Technology Inc.
Proprietary & Confidential
7
Apr. 28, 2012
Preliminary Version: 0.1
GPL81201A
5.7. Map of Memory
GPL81201A MEMORY MAPPING : 8KB ROM, 128B SRAM.
CPU view
$0000~$007F
IO&Reg
RAM
$0080~$00FF
$0100~$017F
$0180~$01FF
Reserved
RAM
RAM
$0000~$007F
$0200~$2FFF
$3000~$33FF
Reserved
Test Code
Reserved
$6000~$6FFF
$7000~$73FF
$7400~7FFF
ROM
Reserved
ROM I
ROM view
ROM
Test Code
ROM I
$0000~$0FFF
$1000~$13FF
$1400~$1FFF
$8000~$DFFF
Reserved
ROM
Reserved
ROM I
$E000~$EFFF
$F000~$F3FF
$F400~FFFF
© Generalplus Technology Inc.
Proprietary & Confidential
8
Oct. 01, 2014
Version: 1.0
GPL81201A
6. ELECTRICAL SPECIFICATIONS
6.1. Absolute Maximum Ratings
Characteristics
Symbol
Ratings
DC Supply Voltage
Input Voltage Range
Operating Temperature
Storage Temperature
VDD Total MAX Current
VSS Total MAX Current
V+
VIN
< 4.0V
-0.5V to V+ + 0.5V
0℃ to +70℃
-50℃ to +150℃
100mA
TA
TSTO
IVDDM
IVSSM
200mA
Note: Stresses beyond those given in the Absolute Maximum Rating table may cause permanent damage to the device. For normal operational conditions,
see AC/DC Electrical Characteristics.
6.2. AC Characteristics
Limit
Characteristics
Unit
Test Condition
Min.
Typ.
Max.
OSC Accuracy @ Freq=4MHz
OSC Variation
-3.0
-7.0
±1.5
±3.5
3.0
7.0
%
%
VDD = 1.8 - 3.6V, TEMP:0C~70C
VDD = 1.8 - 3.6V, TEMP:0C~70C
OSC Accuracy @ Freq=32768Hz
OSC Variation
6.3. DC Characteristics (VDD = 3.0V, TA = 25℃)
Limit
Characteristics
Symbol
Unit
Test Condition
Min.
Typ.
Max.
Operating Voltage
VDD
IOP
1.8
-
2.0
-
3.6
3.0
V
mA
uA
uA
uA
V
FCPU = 8.0MHz, For 2-battery
FCPU = 8.0MHz @ 3.6V, no load
VDD = 3.8V, all clock off.
VDD = 3.8V, LCD on, no load.
VDD = 3.8V, LCD on, no load.
VDD = 3.0V
Operating Current
Standby Current
Halt mode current
Green Mode current
Input High Level
Input Low Level
Output High Level
PA, PC, PD
-
ISTBY
Ihalt
Igreen
VIH
-
1.0
-
5.0
4.0
-
10.0
9.0
-
0.7VDD
-
-
VIL
-
0.3VDD
V
VDD = 3.0V
VDD = 3.0V
VOH
VOL
RH
0.8VDD
-
-
0.2VDD
70
V
I
OH = -6mA
Output Low Level
PA, PC, PD
VDD = 3.0V
IOL = 16mA
Pull High
-
-
V
Input Pull High Resistor
PA, PC, PD
30
30
50
50
Kohm
Kohm
VDD = 3.0V
Pull Low
Input Pull Low Resistor
PA, PC, PD
RL
70
VDD = 3.0V
© Generalplus Technology Inc.
Proprietary & Confidential
9
Oct. 01, 2014
Version: 1.0
GPL81201A
7. APPLICATION CIRCUITS
Note1: These capacitor values are for design guidance only. Different capacitor values may be required for different crystal/resonator used.
© Generalplus Technology Inc.
Proprietary & Confidential
10
Oct. 01, 2014
Version: 1.0
GPL81201A
8. PACKAGE/PAD LOCATIONS
8.1. Ordering Information
Product Number
Package Type
GPL81201A -NnnV - C
Chip form
GPL81201A -NnnV – QL23x
Halogen Free 48 pin LQFP Package
Note1: Code number (NnnV) is assigned for customer.
Note2: Code number (N = A-Z or 0-9, nn=00-99); version (V = A - Z)
Note3: Package form number (x = 0-9, serial number)
8.2. Package Information
8.2.1. LQFP 48L outline dimensions
Millimeter
Nom.
Symbol
Min.
Max.
A
A1
A2
D
-
-
-
1.60
0.15
1.45
0.05
1.35
1.40
9.00 BSC.
7.00 BSC.
9.00 BSC.
D1
E
© Generalplus Technology Inc.
Proprietary & Confidential
11
Oct. 01, 2014
Version: 1.0
GPL81201A
Millimeter
Nom.
Symbol
Min.
Max.
E1
e
7.00 BSC.
0.5 BSC.
0.22
b
0.17
0.09
0.45
0.27
0.16
0.75
C1
L
-
0.60
L1
1.00 REF
© Generalplus Technology Inc.
Proprietary & Confidential
12
Oct. 01, 2014
Version: 1.0
GPL81201A
9. DISCLAIMER
The information appearing in this publication is believed to be accurate.
Integrated circuits sold by Generalplus Technology are covered by the warranty and patent indemnification provisions stipulated in the
terms of sale only. GENERALPLUS makes no warranty, express, statutory implied or by description regarding the information in this
publication or regarding the freedom of the described chip(s) from patent infringement. FURTHERMORE, GENERALPLUS MAKES NO
WARRANTY OF MERCHANTABILITY OR FITNESS FOR ANY PURPOSE. GENERALPLUS reserves the right to halt production or alter
the specifications and prices at any time without notice. Accordingly, the reader is cautioned to verify that the data sheets and other
information in this publication are current before placing orders. Products described herein are intended for use in normal commercial
applications. Applications involving unusual environmental or reliability requirements, e.g. military equipment or medical life support
equipment, are specifically not recommended without additional processing by GENERALPLUS for such applications. Please note that
application circuits illustrated in this document are for reference purposes only.
© Generalplus Technology Inc.
Proprietary & Confidential
13
Oct. 01, 2014
Version: 1.0
GPL81201A
10. REVISION HISTORY
Date
Revision #
Description
Page
Oct. 01, 2012
1.0
Original
14
© Generalplus Technology Inc.
Proprietary & Confidential
14
Oct. 01, 2014
Version: 1.0
相关型号：
©2020 ICPDF网 联系我们和版权申明