GS72108AJ-12T [GSI]
Standard SRAM, 256KX8, 12ns, CMOS, PDSO36, 0.400 INCH, SOJ-36;
| 型号： | GS72108AJ-12T |
| 厂家： | 
GSI TECHNOLOGY |
| 描述： | Standard SRAM, 256KX8, 12ns, CMOS, PDSO36, 0.400 INCH, SOJ-36 静态存储器 光电二极管 内存集成电路 |
| 文件： | 总11页 (文件大小：312K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
GS72108ATP
7, 8, 10, 12 ns
TSOP
Commercial Temp
Industrial Temp
256K x 8
2Mb Asynchronous SRAM
3.3 V V
DD
Center V and V
DD
SS
Features
TSOP-II 256K x 8-Pin Configuration
• Fast access time: 7, 8, 10, 12 ns
• CMOS low power operation: 135/115/95/80 mA at minimum
cycle time
• Single 3.3 V power supply
• All inputs and outputs are TTL-compatible
• Fully static operation
NC
NC
A4
1
44
NC
NC
NC
A5
2
43
42
3
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
4
A3
5
A2
A6
6
A1
A7
• Industrial Temperature Option: –40° to 85°C
• Package line up
7
A0
A8
8
CE
OE
DQ8
DQ7
VSS
VDD
DQ6
DQ5
A9
TP: 400 mil, 44-pin TSOP Type II package
GP:RoHS-compliant 400 mil, 44-pin TSOP Type II
package
9
DQ1
DQ2
VDD
VSS
DQ3
DQ4
10
11
12
13
14
15
16
17
18
44-pin
400 mil TSOP II
Description
The GS72108A is a high speed CMOS Static RAM organized
as 262,144 words by 8 bits. Static design eliminates the need
for external clocks or timing strobes. The GS operates on a
single 3.3 V power supply and all inputs and outputs are TTL-
compatible. The GS72108A is available in 400 mil TSOP
Type-II packages.
WE
A17
A16
A10
A11
A12
NC
NC
A15
A14
19
20
21
22
A13
NC
NC
24
23
NC
NC
Pin Descriptions
Symbol
A0–A17
DQ1–DQ8
CE
Description
Address input
Data input/output
Chip enable input
Write enable input
Output enable input
+3.3 V power supply
WE
OE
V
DD
V
Ground
SS
NC
No connect
Rev: 1.07a 4/2009
1/11
© 2001, GSI Technology
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
GS72108ATP
Block Diagram
A0
Row
Decoder
Memory Array
Address
Input
Buffer
Column
Decoder
A17
CE
WE
OE
I/O Buffer
Control
DQ8
DQ1
Truth Table
CE
V
Current
OE
WE
DQ1 to DQ8
DD
H
L
L
L
X
L
X
H
L
Not Selected
Read
ISB1, ISB2
X
H
Write
IDD
H
High Z
Note:
X: “H” or “L”
Rev: 1.07a 4/2009
2/11
© 2001, GSI Technology
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
GS72108ATP
Absolute Maximum Ratings
Parameter
Symbol
Rating
Unit
Supply Voltage
VDD
–0.5 to +4.6
V
–0.5 to V +0.5
DD
Input Voltage
VIN
V
(4.6 V max.)
–0.5 to V +0.5
DD
Output Voltage
VOUT
V
(4.6 V max.)
Allowable power dissipation
Storage temperature
PD
0.7
W
o
TSTG
–55 to 150
C
Note:
Permanent device damage may occur if Absolute Maximum Ratings are exceeded. Functional operation shall be restricted to Recommended
Operating Conditions. Exposure to higher than recommended voltages for extended periods of time could affect device reliability.
Rev: 1.07a 4/2009
3/11
© 2001, GSI Technology
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
GS72108ATP
Recommended Operating Conditions
Parameter
Supply Voltage for -7/-8/-10/-12
Input High Voltage
Symbol
Min
3.0
Typ
3.3
—
Max
Unit
V
3.6
V
V
V
DD
V
+0.3
VIH
VIL
2.0
DD
Input Low Voltage
–0.3
—
0.8
Ambient Temperature,
Commercial Range
o
TAc
TAI
0
—
—
70
85
C
Ambient Temperature,
Industrial Range
o
–40
C
Notes:
1. Input overshoot voltage should be less than V +2 V and not exceed 20 ns.
DD
2. Input undershoot voltage should be greater than –2 V and not exceed 20 ns.
Capacitance
Parameter
Input Capacitance
Output Capacitance
Symbol
CIN
Test Condition
VIN = 0 V
Max
Unit
pF
5
7
COUT
VOUT = 0 V
pF
Notes:
1. Tested at TA = 25°C, f = 1 MHz
2. These parameters are sampled and are not 100% tested.
DC I/O Pin Characteristics
Parameter
Symbol
Test Conditions
Min
Max
Input Leakage
Current
VIN = 0 to V
DD
IIL
– 1 uA
–1 uA
1 uA
1 uA
Output High Z
Output Leakage
Current
ILO
VOUT = 0 to V
DD
Output High Voltage
Output Low Voltage
VOH
VOL
IOH = –4mA
ILO = +4mA
2.4
—
—
0.4 V
Rev: 1.07a 4/2009
4/11
© 2001, GSI Technology
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
GS72108ATP
Power Supply Currents
0 to 70°C
–40 to 85°C
8 ns 10 ns 12 ns
Parameter Symbol Test Conditions
7 ns
8 ns 10 ns 12 ns
7 ns
CE VIL
Operating
Supply
Current
All other inputs
VIH or VIL
Min. cycle time
IOUT = 0 mA
IDD (max)
135 mA 115 mA 95 mA 80 mA
140 mA 120 mA 100 mA 85 mA
CE VIH
Standby
Current
All other inputs
VIH or VIL
Min. cycle time
ISB1 (max)
ISB2 (max)
25 mA 20 mA 20 mA 15 mA
30 mA
25 mA
25 mA
20 mA
CE V - 0.2 V
DD
Standby
Current
All other inputs
5 mA
10 mA
V – 0.2 V or
DD
0.2 V
AC Test Conditions
Output Load 1
Parameter
Input high level
Input low level
Conditions
DQ
VIH = 2.4 V
VIL = 0.4 V
tr = 1 V/ns
tf = 1 V/ns
1.4 V
1
30pF
50
Input rise time
VT = 1.4 V
Input fall time
Input reference level
Output reference level
Output load
Output Load 2
1.4 V
3.3 V
Fig. 1& 2
589
434
DQ
Notes:
1
1. Include scope and jig capacitance.
5pF
2. Test conditions as specified with output loading as shown in Fig. 1
unless otherwise noted.
3. Output load 2 for tLZ, tHZ, tOLZ and tOHZ
Rev: 1.07a 4/2009
5/11
© 2001, GSI Technology
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
GS72108ATP
AC Characteristics
Read Cycle
-7
-8
-10
-12
Parameter
Symbol
Unit
Min
7
Max
—
7
Min
8
Max
—
8
Min
10
—
—
—
—
3
Max
—
10
10
4
Min
12
—
—
—
—
3
Max
—
12
12
5
Read cycle time
tRC
tAA
tAC
tAB
tOE
tOH
ns
ns
ns
ns
ns
ns
ns
Address access time
—
—
—
—
3
—
—
—
—
3
Chip enable access time (CE)
Byte enable access time (UB, LB)
Output enable to output valid (OE)
Output hold from address change
Chip enable to output in low Z (CE)
7
8
3
3.5
3.5
—
—
3
4
5
—
—
—
—
—
—
*
3
3
3
3
tLZ
*
Output enable to output in low Z (OE)
Byte enable to output in low Z (UB, LB)
Chip disable to output in High Z (CE)
Output disable to output in High Z (OE)
0
0
—
—
3.5
3
0
0
—
—
4
0
0
—
—
5
0
0
—
—
6
ns
ns
ns
ns
tOLZ
*
tBLZ
*
—
—
—
—
—
—
—
—
tHZ
*
3.5
4
5
tOHZ
* These parameters are sampled and are not 100% tested.
Read Cycle 1: CE = OE = V , WE = V
IL
IH
tRC
Address
Data Out
tAA
tOH
Previous Data
Data valid
Rev: 1.07a 4/2009
6/11
© 2001, GSI Technology
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
GS72108ATP
Read Cycle 2: WE = V
IH
tRC
Address
CE
tAA
tAC
tHZ
tLZ
OE
tOE
tOHZ
tOLZ
DATA VALID
Data Out
High impedance
Write Cycle
-7
-8
-10
-12
Parameter
Symbol
Unit
Min
7
Max
—
—
—
—
—
—
—
—
—
—
Min
8
Max
Min
Max
—
—
—
—
—
—
—
—
—
—
Min
12
8
Max
—
—
—
—
—
—
—
—
—
—
Write cycle time
tWC
tAW
tCW
tDW
tDH
—
—
—
—
—
—
—
—
—
—
10
7
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Address valid to end of write
Chip enable to end of write
Data set up time
5
5.5
5.5
4
5
7
8
3.5
0
5
6
Data hold time
0
0
0
Write pulse width
tWP
tAS
5
5.5
0
7
8
Address set up time
0
0
0
Write recovery time (WE)
Write recovery time (CE)
Output Low Z from end of write
tWR
tWR1
0
0
0
0
0
0
0
0
*
3
3
3
3
tWLZ
*
Write to output in High Z
—
3
—
3.5
—
4
—
5
ns
tWHZ
* These parameters are sampled and are not 100% tested.
Rev: 1.07a 4/2009
7/11
© 2001, GSI Technology
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
GS72108ATP
Write Cycle 1: WE control
tWC
Address
OE
tAW
tWR
tCW
CE
tAS
tWP
WE
tDW
tDH
DATA VALID
Data In
tWHZ
tWLZ
Data Out
HIGH IMPEDANCE
Write Cycle 2: CE control
tWC
Address
tAW
tWR1
OE
CE
tAS
tCW
tWP
WE
tDW
tDH
DATA VALID
Data In
Data Out
HIGH IMPEDANCE
Rev: 1.07a 4/2009
8/11
© 2001, GSI Technology
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
GS72108ATP
44-Pin, 400 mil TSOP-II
D
Dimension in inch
Dimension in mm
c
44
23
22
Symbol
min
—
nom max
min
nom max
A
A1
A2
B
—
—
0.047
—
—
—
1.20
—
0.002
—
0.05
A
0.037 0.039 0.041 0.95
0.01 0.014 0.018 0.25
1.00
0.35
0.15
1.05
0.45
—
c
—
0.006
—
—
1
D
0.721 0.725 0.729 18.31 18.41 18.51
0.396 0.400 0.404 10.06 10.16 10.26
e
B
E
e
—
0.031
—
—
0.80
—
HE
L
0.455 0.463 0.471 11.56 11.76 11.96
y
0.016 0.020 0.024 0.40
0.50
0.80
—
0.60
—
L1
y
—
—
0.031
—
—
—
—
0.004
0.10
Q
Detail A
o
o
o
o
Q
—
—
0
5
0
5
Notes:
1. Dimension D& E do not include interlead flash.
2. Dimension B does not include dambar protrusion/intrusion.
3. Controlling dimension: mm
Rev: 1.07a 4/2009
9/11
© 2001, GSI Technology
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
GS72108ATP
Ordering Information
*
Package
Access Time
Temp. Range
Part Number
GS72108ATP-7
GS72108ATP-8
GS72108ATP-10
GS72108ATP-12
GS72108ATP78I
GS72108ATP-8I
GS72108ATP-10I
GS72108ATP-12I
GS72108AGP-7
GS72108AGP-8
GS72108AGP-10
GS72108AGP-12
GS72108AGP78I
GS72108AGTP-8I
GS72108AGP-10I
400 mil TSOP-II
400 mil TSOP-II
7 ns
8 ns
Commercial
Commercial
Commercial
Commercial
Industrial
400 mil TSOP-II
10 ns
12 ns
7 ns
400 mil TSOP-II
400 mil TSOP-II
400 mil TSOP-II
8 ns
Industrial
400 mil TSOP-II
10 ns
12 ns
7 ns
Industrial
400 mil TSOP-II
Industrial
RoHS-compliant 400 mil TSOP-II
RoHS-compliant 400 mil TSOP-II
RoHS-compliant 400 mil TSOP-II
RoHS-compliant 400 mil TSOP-II
RoHS-compliant 400 mil TSOP-II
RoHS-compliant 400 mil TSOP-II
RoHS-compliant 400 mil TSOP-II
RoHS-compliant 400 mil TSOP-II
Commercial
Commercial
Commercial
Commercial
Industrial
8 ns
10 ns
12 ns
7 ns
8 ns
Industrial
10 ns
12 ns
Industrial
GS72108AGP-12I
Industrial
Notes:
1. Customers requiring delivery in Tape and Reel should add the character “T” to the end of the part number. For example: GS72108TP-8T.
Rev: 1.07a 4/2009
10/11
© 2001, GSI Technology
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
GS72108ATP
2Mb Asynchronous Datasheet Revision History
Rev. Code: Old;
New
Types of Changes
Format or Content
Revisions/Reason
• Creation of new datasheet
• Added 6 ns speed bin
72108A_r1
72108A_r1; 72108A_r1_01
Content
• Updated all power numbers
• Updated Recommended Operating Conditions table on page 4
• Changed FPBGA package from 6 x 10 to 6 x 8 (package U)
72108A_r1_01; 72108A_r1_02
72108A_r1_02; 72108A_r1_03
72108A_r1_03; 72108A_r1_04
Content
Content
Content
• Removed all references to “U” package
• Removed 6 ns speed bin from entire document
• Added 7 ns speed bin to entire document
• Updated format
• Added RoHS-compliant information for TSOP-II package
72108A_r1_04; 72108A_r1_05
72108A_r1_05; 72108A_r1_06
Content
Content
• Added RoHS-compliant 400 mil SOJ
• Updated to MP in ordering information table
72108A_r1_06; 72108A_r1_07
Content
• Rev. 1.07a: Removed SOJ package references, removed Status Column
from Ordering Information table
Rev: 1.07a 4/2009
11/11
© 2001, GSI Technology
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
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