GS74104AGX-6I [GSI]
Standard SRAM, 1MX4, 6ns, CMOS, PBGA48, 6 X 10 MM, FBGA-48;
| 型号： | GS74104AGX-6I |
| 厂家： | 
GSI TECHNOLOGY |
| 描述： | Standard SRAM, 1MX4, 6ns, CMOS, PBGA48, 6 X 10 MM, FBGA-48 静态存储器 |
| 文件： | 总15页 (文件大小：434K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
GS74104ATP/J/X
SOJ, TSOP, FP-BGA
Commercial Temp
Industrial Temp
6, 7, 8, 10, 12 ns
3.3 V VDD
Center VDD and VSS
1M x 4
4Mb Asynchronous SRAM
SOJ 1M x 4-Pin Configuraton
Features
• Fast access time: 6, 7, 8, 10, 12 ns
• CMOS low power operation: 155/135/120/95/85 mA at
minimum cycle time
32
A5
1
A4
31
2
A3
A6
30
A7
3
A2
• Single 3.3 V power supply
29
4
A1
A8
• All inputs and outputs are TTL-compatible
• Fully static operation
• Industrial Temperature Option: –40° to 85°C
• Package line up
28
A9
5
A0
27
6
CE
OE
32-pin
26
7
DQ1
VDD
VSS
DQ2
WE
A19
A18
A17
A16
A15
DQ4
25
8
VSS
VDD
DQ3
A10
A11
A12
A13
A14
NC
400 mil SOJ
24
23
22
21
20
19
18
17
9
J: 400 mil, 32-pin SOJ package
TP: 400 mil, 44-pin TSOP Type II package
X: 6 mm x 10 mm Fine Pitch Ball Grid Array
package
10
11
12
13
14
15
16
Description
The GS74104A is a high speed CMOS Static RAM organized
as 1,048,576 words by 4 bits. Static design eliminates the need
for external clocks or timing strobes. The GS operates on a
single 3.3 V power supply and all inputs and outputs are TTL-
compatible. The GS74104A is available in 400 mil SOJ, 400
mil TSOP Type-II, and 6 mm x 10 mm FP-BGA packages.
FP-BGA 256K x 16 Bump Configuration (Package X)
1
2
3
4
5
6
A
B
C
D
E
F
LB
OE
A0
A3
A1
A4
A6
A7
A2
NC
DQ16 UB
CE DQ1
DQ2 DQ3
DQ4 VDD
Pin Descriptions
DQ14 DQ15 A5
VSS DQ13 A17
VDD DQ12 NC
DQ11 DQ10 A8
Symbol
A0–A19
DQ1–DQ4
CE
Description
Address input
Data input/output
Chip enable input
Write enable input
Output enable input
+3.3 V power supply
A16 DQ5 VSS
A9
DQ7 DQ6
WE DQ8
WE
G
H
DQ9 NC
NC A12
A10
A13
A11
A14
OE
V
A15
NC
DD
V
Ground
SS
NC
No connect
6 x 10 mm Bump Pitch
Rev: 1.02 3/2002
1/15
© 2001, Giga Semiconductor, Inc.
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
GS74104ATP/J/X
TSOP-II 1M x 4-Pin Configuration
NC
NC
NC
A4
1
44
NC
NC
NC
A5
2
43
42
3
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
4
5
A3
A6
6
A2
A7
7
A1
A8
8
A0
A9
9
CE
DQ1
VDD
VSS
DQ2
WE
A19
A18
A17
A16
OE
DQ4
VSS
VDD
DQ3
A10
A11
A12
A13
A14
NC
NC
10
11
12
13
14
15
16
17
18
44-pin
400 mil TSOP II
A15
NC
19
20
21
22
24
23
NC
NC
NC
NC
Block Diagram
A0
Row
Decoder
Memory Array
Address
Input
Buffer
Column
Decoder
A19
CE
WE
OE
I/O Buffer
Control
DQ4
DQ1
Rev: 1.02 3/2002
2/15
© 2001, Giga Semiconductor, Inc.
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
GS74104ATP/J/X
Truth Table
CE
V
Current
OE
WE
DQ1 to DQ8
DD
H
L
L
L
X
L
X
H
L
Not Selected
Read
ISB1, ISB2
X
H
Write
IDD
H
High Z
Note: X: “H” or “L”
Absolute Maximum Ratings
Parameter
Symbol
Rating
Unit
Supply Voltage
VDD
–0.5 to +4.6
V
–0.5 to V +0.5
DD
Input Voltage
VIN
V
(≤ 4.6 V max.)
–0.5 to V +0.5
DD
Output Voltage
VOUT
V
(≤ 4.6 V max.)
Allowable power dissipation
Storage temperature
PD
0.7
W
o
TSTG
–55 to 150
C
Note:
Permanent device damage may occur if Absolute Maximum Ratings are exceeded. Functional operation shall be restricted to Rec-
ommended Operating Conditions. Exposure to higher than recommended voltages for extended periods of time could affect device
reliability.
Rev: 1.02 3/2002
3/15
© 2001, Giga Semiconductor, Inc.
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
GS74104ATP/J/X
Recommended Operating Conditions
Parameter
Supply Voltage for -7/-8/-10/-12
Supply Voltage for -6
Input High Voltage
Symbol
Min
3.0
Typ
3.3
3.3
—
Max
3.6
Unit
V
V
V
V
V
DD
V
3.135
2.0
3.6
DD
V
+0.3
VIH
VIL
DD
Input Low Voltage
–0.3
—
0.8
Ambient Temperature,
Commercial Range
o
TAc
TAI
0
—
—
70
85
C
Ambient Temperature,
Industrial Range
o
–40
C
Notes:
1. Input overshoot voltage should be less than V +2 V and not exceed 20 ns.
DD
2. Input undershoot voltage should be greater than –2 V and not exceed 20 ns.
Capacitance
Parameter
Input Capacitance
Output Capacitance
Symbol
CIN
Test Condition
VIN = 0 V
Max
Unit
pF
5
7
COUT
VOUT = 0 V
pF
Notes:
1. Tested at TA = 25°C, f = 1 MHz
2. These parameters are sampled and are not 100% tested.
DC I/O Pin Characteristics
Parameter
Symbol
Test Conditions
Min
Max
Input Leakage
Current
VIN = 0 to V
DD
IIL
– 1 uA
–1 uA
1 uA
1 uA
Output High Z
Output Leakage
Current
ILO
VOUT = 0 to V
DD
Output High Voltage
Output Low Voltage
VOH
VOL
IOH = –4mA
ILO = +4mA
2.4
—
—
0.4 V
Rev: 1.02 3/2002
4/15
© 2001, Giga Semiconductor, Inc.
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
GS74104ATP/J/X
Power Supply Currents
0 to 70°C
8 ns
–40 to 85°C
8 ns
Parameter Symbol Test Conditions
6 ns
7 ns
10 ns
12 ns
6 ns
7 ns
10 ns
12 ns
CE ≤ VIL
Operating
Supply
Current
All other inputs
≥ VIH or ≤ VIL
Min. cycle time
IOUT = 0 mA
IDD
155 mA 135 mA 120 mA 95 mA 85 mA 165 mA 145 mA 130 mA 105 mA 95 mA
CE ≥ VIH
Standby
Current
All other inputs
≥ VIH or ≤VIL
Min. cycle time
ISB1
40 mA 35 mA 30 mA 25 mA 22 mA 50 mA 45 mA 40 mA 35 mA 32 mA
CE ≥ VDD - 0.2V
All other inputs
≥ VDD - 0.2V or ≤
0.2V
Standby
Current
ISB2
10 mA
20 mA
AC Test Conditions
Output Load 1
Parameter
Input high level
Input low level
Conditions
VIH = 2.4 V
VIL = 0.4 V
tr = 1 V/ns
tf = 1 V/ns
1.4 V
DQ
1
30pF
50Ω
Input rise time
VT = 1.4 V
Input fall time
Input reference level
Output reference level
Output load
Output Load 2
1.4 V
3.3 V
Fig. 1& 2
589Ω
434Ω
DQ
Notes:
1
1. Include scope and jig capacitance.
5pF
2. Test conditions as specified with output loading as shown in Fig. 1
unless otherwise noted.
3. Output load 2 for tLZ, tHZ, tOLZ and tOHZ
Rev: 1.02 3/2002
5/15
© 2001, Giga Semiconductor, Inc.
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
GS74104ATP/J/X
AC Characteristics
Read Cycle
-6
-7
-8
-10
-12
Parameter
Symbol
Unit
Min Max Min Max Min
Max
—
8
Min
10
—
—
—
3
Max
—
Min
12
—
—
—
3
Max
—
Read cycle time
tRC
tAA
tAC
tOE
tOH
6
—
—
—
3
—
6
7
—
—
—
3
—
7
8
—
—
—
3
ns
ns
ns
ns
ns
ns
Address access time
10
10
4
12
12
5
Chip enable access time (CE)
Output enable to output valid (OE)
Output hold from address change
Chip enable to output in low Z (CE)
6
7
8
3
3
3.5
—
—
—
—
—
—
—
—
*
3
3
3
3
—
3
—
tLZ
*
Output enable to output in low Z (OE)
Chip disable to output in High Z (CE)
Output disable to output in High Z (OE)
0
—
3
0
—
3.5
3
0
—
4
0
—
5
0
—
6
ns
ns
ns
tOLZ
*
—
—
—
—
—
—
—
—
—
—
tHZ
*
3
3.5
4
5
tOHZ
* These parameters are sampled and are not 100% tested.
Read Cycle 1: CE = OE = V , WE = V
IL
IH
tRC
Address
Data Out
tAA
tOH
Previous Data
Data valid
Rev: 1.02 3/2002
6/15
© 2001, Giga Semiconductor, Inc.
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
GS74104ATP/J/X
Read Cycle 2: WE = V
IH
tRC
Address
CE
tAA
tAC
tHZ
tLZ
OE
tOE
tOHZ
tOLZ
DATA VALID
Data Out
High impedance
Write Cycle
-6
-7
-8
-10
-12
Parameter
Symbol
Unit
Min
6
Max
—
—
—
—
—
—
—
—
—
—
Min
7
Max
Min
8
Max
—
—
—
—
—
—
—
—
—
—
Min
10
7
Max
—
—
—
—
—
—
—
—
—
—
Min
12
8
Max
—
—
—
—
—
—
—
—
—
—
Write cycle time
tWC
tAW
tCW
tDW
tDH
—
—
—
—
—
—
—
—
—
—
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Address valid to end of write
Chip enable to end of write
Data set up time
5
5
5.5
5.5
4
5
5
7
8
3
3.5
0
5
6
Data hold time
0
0
0
0
Write pulse width
tWP
tAS
5
5
5.5
0
7
8
Address set up time
0
0
0
0
Write recovery time (WE)
Write recovery time (CE)
Output Low Z from end of write
tWR
tWR1
0
0
0
0
0
0
0
0
0
0
*
3
3
3
3
3
tWLZ
*
Write to output in High Z
—
3
—
3
—
3.5
—
4
—
5
ns
tWHZ
* These parameters are sampled and are not 100% tested.
Rev: 1.02 3/2002
7/15
© 2001, Giga Semiconductor, Inc.
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
GS74104ATP/J/X
Write Cycle 1: WE control
tWC
Address
tAW
tWR
OE
tCW
CE
tAS
tWP
WE
tDW
tDH
DATA VALID
Data In
Data Out
tWHZ
tWLZ
HIGH IMPEDANCE
Write Cycle 2: CE control
tWC
Address
tAW
tWR1
OE
CE
tAS
tCW
tWP
WE
tDW
tDH
DATA VALID
Data In
Data Out
HIGH IMPEDANCE
Rev: 1.02 3/2002
8/15
© 2001, Giga Semiconductor, Inc.
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
GS74104ATP/J/X
32-Pin SOJ, 400 mil
Dimension in inch
Dimension in mm
Symbol
min
nom
—
max
min
—
nom
—
max
3.70
—
L
A
—
0.146
—
D
c
A1
0.026
—
0.66
2.67
—
A2
0.105 0.110 0.115
2.80
0.43
0.71
0.20
2.92
0.53
0.81
0.30
B
0.013 0.017 0.021 0.33
0.024 0.028 0.032 0.61
0.006 0.008 0.012 0.15
B1
1
c
e
A
D
0.820 0.824 0.829 20.83 20.93 21.06
0.395 0.400 0.405 10.04 10.16 10.28
E
e
—
0.05
—
—
1.27
—
B
B1
y
HE
0.430 0.435 0.440 10.93 11.05 11.17
Q
GE
0.354 0.366 0.378 9.00
9.30
—
9.60
—
Detail A
L
y
0.082
—
—
—
—
—
2.08
—
0.004
—
0.10
o
o
o
o
Q
—
0
10
0
10
Notes:
1. Dimension D& E do not include interlead flash.
2. Dimension B1 does not include dambar protrusion/intrusion.
3. Controlling dimension: inches
Rev: 1.02 3/2002
9/15
© 2001, Giga Semiconductor, Inc.
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
GS74104ATP/J/X
44-Pin, 400 mil TSOP-II
Dimension in inch
Dimension in mm
Symbol
min
—
nom max
min
—
nom max
D
c
44
23
22
A
A1
A2
B
—
—
0.047
—
—
1.20
—
0.002
0.05
—
0.037 0.039 0.041 0.95
0.01 0.014 0.018 0.25
1.00
0.35
0.15
1.05
0.45
—
A
c
—
0.006
—
—
D
0.721 0.725 0.729 18.31 18.41 18.51
0.396 0.400 0.404 10.06 10.16 10.26
1
E
e
B
e
—
0.031
—
—
0.80
—
HE
L
0.455 0.463 0.471 11.56 11.76 11.96
0.016 0.020 0.024 0.40
0.50
0.80
—
0.60
—
y
L1
y
—
—
0.031
—
—
—
—
0.004
0.10
o
o
o
o
Q
—
—
0
5
0
5
Q
Detail A
Notes:
1. Dimension D& E do not include interlead flash.
2. Dimension B does not include dambar protrusion/intrusion.
3. Controlling dimension: mm
Rev: 1.02 3/2002
10/15
© 2001, Giga Semiconductor, Inc.
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
GS74104ATP/J/X
6 mm x 10 mm FP-BGA
Symbol
Unit: mm
D
A
1.10±0.10
0.20~0.30
f0.30~0.40
0.36(TYP)
10.0±0.05
5.25
A1
fb
c
E
D
Pin A1
D1
E
Index
6.0±0.05
3.75
E1
e
0.75(TYP)
0.10
Top View
aaa
A
c
Side View
A1
aaa
E1
Pin A1
A B C D E F G H
fb Solder Ball
Index
1
2
3
4
5
6
e
e
D1
Bottom View
Rev: 1.02 3/2002
11/15
© 2001, Giga Semiconductor, Inc.
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
GS74104ATP/J/X
Ordering Information
*
Package
Access Time
Temp. Range
Status
Part Number
GS74104ATP-6
GS74104ATP-7
GS74104ATP-8
GS74104ATP-10
GS74104ATP-12
GS74104ATP-6I
GS74104ATP-7I
GS74104ATP-8I
GS74104ATP-10I
GS74104ATP-12I
GS74104AJ-6
400 mil TSOP-II
400 mil TSOP-II
400 mil TSOP-II
400 mil TSOP-II
400 mil TSOP-II
400 mil TSOP-II
400 mil TSOP-II
400 mil TSOP-II
400 mil TSOP-II
400 mil TSOP-II
400 mil SOJ
6 ns
7 ns
Commercial
Commercial
Commercial
Commercial
Commercial
Industrial
8 ns
10 ns
12 ns
6 ns
7 ns
Industrial
8 ns
Industrial
10 ns
12 ns
6 ns
Industrial
Industrial
Commercial
Commercial
Commercial
Commercial
Commercial
Industrial
GS74104AJ-7
400 mil SOJ
7 ns
GS74104AJ-8
400 mil SOJ
8 ns
GS74104AJ-10
GS74104AJ-12
GS74104AJ-6I
GS74104AJ-7I
GS74104AJ-8I
GS74104AJ-10I
GS74104AJ-12I
GS74104AX-6
GS74104AX-7
400 mil SOJ
10 ns
12 ns
6 ns
400 mil SOJ
400 mil SOJ
400 mil SOJ
7 ns
Industrial
400 mil SOJ
8 ns
Industrial
400 mil SOJ
10 ns
12 ns
6 ns
Industrial
400 mil SOJ
Industrial
6 mm x 10 mm FP-BGA
6 mm x 10 mm FP-BGA
Commercial
Commercial
7 ns
Rev: 1.02 3/2002
12/15
© 2001, Giga Semiconductor, Inc.
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
GS74104ATP/J/X
Ordering Information
*
Package
Access Time
Temp. Range
Status
Part Number
GS74104AX-8
GS74104AX-10
GS74104AX-12
GS74104AX-6I
GS74104AX-7I
GS74104AX-8I
GS74104AX-10I
GS74104AX-12I
6 mm x 10 mm FP-BGA
6 mm x 10 mm FP-BGA
6 mm x 10 mm FP-BGA
6 mm x 10 mm FP-BGA
6 mm x 10 mm FP-BGA
6 mm x 10 mm FP-BGA
6 mm x 10 mm FP-BGA
6 mm x 10 mm FP-BGA
8 ns
10 ns
12 ns
6 ns
Commercial
Commercial
Commercial
Industrial
7 ns
Industrial
8 ns
Industrial
10 ns
12 ns
Industrial
Industrial
Rev: 1.02 3/2002
13/15
© 2001, Giga Semiconductor, Inc.
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
GS74104ATP/J/X
Ordering Information
*
Package
Access Time
Temp. Range
Status
Part Number
GS74104TP-8
GS74104TP-10
GS74104TP-12
GS74104TP-15
GS74104TP-8I
GS74104TP-10I
GS74104TP-12I
GS74104TP-15I
GS74104J-8
400 mil TSOP-II
400 mil TSOP-II
400 mil TSOP-II
400 mil TSOP-II
400 mil TSOP-II
400 mil TSOP-II
400 mil TSOP-II
400 mil TSOP-II
400 mil SOJ
8 ns
10 ns
12 ns
15 ns
8 ns
Commercial
Commercial
Commercial
Commercial
Industrial
10 ns
12 ns
15 ns
8 ns
Industrial
Industrial
Industrial
Commercial
Commercial
Commercial
Commercial
Industrial
GS74104J-10
GS74104J-12
GS74104J-15
GS74104J-8I
400 mil SOJ
10 ns
12 ns
15 ns
8 ns
400 mil SOJ
400 mil SOJ
400 mil SOJ
GS74104J-10I
GS74104J-12I
GS74104J-15I
400 mil SOJ
10 ns
12 ns
15 ns
Industrial
400 mil SOJ
Industrial
400 mil SOJ
Industrial
*
Customers requiring delivery in Tape and Reel should add the character “T” to the end of the part number. For example:
GS74104ATP-8T
Rev: 1.02 3/2002
14/15
© 2001, Giga Semiconductor, Inc.
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
GS74104ATP/J/X
4Mb Asynchronous Datasheet Revision History
Rev. Code: Old;
New
Types of Changes
Format or Content
Page #/Revisions/Reason
• Created new datasheet
74104A_r1
Content/Format
• Added 6 ns speed bin
• Updated all power numbers
74104A_r1; 74104A_r1_01
Content
• Updated Recommended Operating Currents on page 3
• Added 7 ns bin to entire document
• Add X package
74104A_r1_01; 74104A_r1_02
Content
Rev: 1.02 3/2002
15/15
© 2001, Giga Semiconductor, Inc.
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
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