DOM40K3R016_技术文档

HANBit

HFDOM40K3R

40Pin Flash Disk Module Min.16MB ~ Max.4GB, True IDE Interface

Mode, 3.3V / 5.0V Operating

1. PRODUCT OVERVIEW

GENERAL DESCRIPTION

The HFDOM40K3R series 40Pin Flash Disk Module is a flash technology based with True IDE interface flash memory

card. It is constructed with flash disk controller chip and NAND-type (Samsung) flash memory device. The HFDOM40K3R

series operates in both 3.3-Volt and 5.0-Volt power supplies. It comes in capacity of 16, 32, 64, 128, 192, 256, 512, 1G,

1.5G, 2G, 3G MB and up to 4GB MB formatted 40Pin type .

By optimizing flash memory management, the life of this HFDOM40K3R series can be extended to its maximum level.

Because the ECC function is included, the correctness of data transfer between the HFDOM40K3R series and a True IDE

compatible interface device can be guaranteed.

The HFDOM40K3R series is fully compatible with applications such as CPU card / board, set top box, industry / military

PC / Notebook, security equipment, measuring instrument and embedded systems.

FEATURES

-

ATA / True IDE compatible host interface

ATA command set compatible

Automatic sensing of PC Card ATA or true IDE host interface.

Very high performance, very low power consumption

Automatic error correction

Auto Standby to save power consumption.

Supports power down commands and sleep modes.

Integrated PCMCIA attribute memory of 256 bytes (CIS)

Support for 8 or 16 bit host transfers

3.3V/5.0V operation voltage

Host Interface bus width : 8/16 bit Access

Flash Interface bus width : 8 bit Access

Capacity : Min. 16MB ~ Max. 4GB

MTBF > 1,000,000 hours.

Shock : 2,000 G max.

Vibration : 15 G peak to peak max.

PRODUCT SPECIFICATIONS

Capacities :

16, 32, 48, 64, 96, 128, 192, 256, 512, 1G, 1.5G ,2G, 3G and up to 4GB (formatted)

System Compatibility :

Please refer to the compatibility list of index.

Performance :

Host Data Transfer Rates :

up to 16.6 MB/sec, PIO mode 4; 16.6MB/sec, Multi-word

DMA mode 4; 66MB/sec

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Operating Voltage : 3.3V / 5.0V

Power consumption : 3.3V ± 5%

10%

Read mode

Write mode

Stop mode

<90 mA (Max)

<5 mA

Environment conditions :

Operating temperature

Storage temperature

Relative humidity

0°C to + 65°C

-40 °C to + 125°C

8% to 95%, non-condensing

ELECTRICAL SPECIFICATIONS

Table 1.1 Absolute Maximum Ratings

Symbol

V_DD

Parameter

Power supply

Rating

-0.3 to 6.0

Units

V

V_IN

V_OUT

T_STG

Input voltage

Output voltage

Storage temperature

-0.3 to V_DD+0.3

-40 to 125

V

^oC

Table 1.2 Recommended Operating Conditions

Symbol

V_DD

V_IN

T_OPR

Parameter

Power supply

Input voltage

Min.

3.0

0

Max.

5.5

V_DD

65

Units

V

Operating temperature

0

^oC

Table 1.3 DC Characteristics

Sym.

Parameter

Min

0.7V_DD

Typ

Max

0.3V_DD

Units

V_IL

V_IH

V_IL

V_IH

V_OL

V_OH

R_I

Input low voltage

Input high voltage

Schmitt input low voltage

Schmitt input high voltage

Output low voltage

V

1.22

2.08

0.4

V

kΩ

Output high voltage

Input pull up/down resistance

2.3

1

75

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HFDOM40K3R

PHYSYCAL SPECIFICATION

55.50±0.1mm

< View from front side >

3

2

1

Jumper

Master Slave

1,2

2,3

Close

40

39

2

1

8.90mm±0.1mm

7.50mm

1.4mm±0.1mm

Figure 1.1 40 pin Type Flash Disk Module Dimensions

TOP Side

Bottom Side

3

2

1

40

39

2

1

2

39

40

TOP Side

Bottom Side

Top-Connector

Attach

Bottom-Connector

Attach

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INSTALLTION GUIDE

1) Setting Method

①

②

Make sure your computer is turned off before you open the case.

Plug the carefully into the 40pin IDE slot on your computer.

Caution: Make sure to align pin1 on host adapter interface connector with pin 1 on your Flash Disk Module. Pin 1

is indicated by a triangle on the Flash Disk Module connector.

③

④

The Flash Disk Module is used power connector cable of the computer.

Caution: If you need to remove your Flash Disk Module, use both hands to pull it out carefully.

Check all cable connections and then replace your computer cover.

2) BIOS setting Method

Before you format or partition your new drive, you must configure your computer's BIOS so that the computer can

recognize your new drive.

①

②

Turn your computer on. As your computer start up, watch the screen for a message describing how to run the

system setup program on the screen (sometimes called BIOS or CMOS setup). This is usually done by pressing a

special key, such as Delete, Esc or F1 during startup. See your computer manual for details. Press the appropriate

key to run the system setup program.

If your BIOS provides automatic drive detection (an "AUTO" drive type), select this option. ( We

recommend to use Normal / CHS mode to partition your Flash Disk Module to get the maximum formatted

capacity. )

This allows your computer to configure itself automatically for your new drive.

If your BIOS dose not provide “AUTO” drive detection, select "User-defined" drive setting and enter the

CHS values from the table. BIOS Settings (see specification) Capacity Cylinders Heads Sectors(unformatted)

Save the settings and exit the System Setup program. ( your computer will automatically reboot ) After you

configure your computer, you can use the standard DOS commands to partition and format your Flash Disk Module,

as described below.

③

3) Formatting Method

To partition your new Flash Disk Module with Microsoft DOS program :

①

②

Insert a bootable DOS diskette into your diskette drive and restart your computer.

Insert a DOS program diskette that contains the FDISK.EXE and FORMAT.COM

programs into your diskette drive. Use the same DOS version that is on your bootable diskette. At the A:\ > prompt,

type “FDISK” and press Enter.

③

④

Select “Create DOS partition or logical DOS drive” by pressing 1. Then press Enter.

Select “Create primary DOS partition” by pressing 1 again. Then press Enter.

Create your first drive partition. If you are creating a partition that will be used to boot your computer (drive C),

make sure that the partition is marked active.

⑤

⑥

⑦

⑧

Create an extended partition and additional logical drives as necessary, until all the space on your new hard drive

has been partitioned.

When the partitioning is complete, FDISK reboots your computer.

Caution: Make sure to use the correct drive letters so that you do not format a drive that already contains data.

At the A:\ > prompt, type “format c:/s”, where c is the letter of your first new partition, Repeat the format process

for all the new partitions you have created.

After you format your drive, it is ready to use.

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2. PIN INFORMATION

PIN ASSIGNMENTS AND PIN TYPE

Table 2.1 Pin Assignment and Pin type

Signal

Pin Type

Signal

Pin Type

1

/RESET

D07

I

I/O

DC

--

2

GND

D08

Ground

I/O

3

4

5

D06

6

D09

I/O

7

D05

8

D10

I/O

9

D04

10

12

14

16

18

20

22

24

26

28

30

32

34

36

38

40

D11

I/O

11

13

15

17

19

21

23

25

27

29

31

33

35

37

39

D03

D12

I/O

D02

D13

I/O

D01

D14

I/O

D00

D15

I/O

GND

INPACK

/IOW

/IOR

IORDY

REG

IRQ

Key Pin

GND

Reserved

GND

/IOIS16

/PDIAG

A02

--

Ground

--

I

O

--

Ground

O

A01

I

I/O

A00

I

/CS0

/DASP

I

/CS1

GND

I

I/O

Ground

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Signal Descriptions

Table 2.2 Signal Descriptions

Signal Name

A[2:0]

Dir.

Description

In True IDE Mode only A[2:0] are used to select the one of eight registers in

the Task File, the remaining address lines should be grounded by the host.

This input / output is the Pass Diagnostic signal in the Master / Slave

handshake protocol.

In the True IDE Mode, this input/output is the Disk Active/Slave

Present signal in the Master/Slave handshake protocol.

CS0 is the chip select for the task file registers while CS2 is used to select

the Alternate Status Register and the Device Control Register.

All Task File operations occur in byte mode on the low order bus D00-D07

while all data transfers are 16 bit using D00-D15.

I

33,35,36

34

-PDIAG

I/O

I

-DASP

39

-CS0, -CS1

37,38

3,4,5,6,

7,8,9,10,

11,12,13,

14,15,16,

17,18

D[15:00]

I/O

Ground.

2,19,22,

24,26,

GND

--

30,40,

-IOR

This is an I/O Read strobe generated by the host.

I

25

The I/O Write strobe pulse is used to clock I/O data on the Card Data bus

into the Storage Card controller registers when the Storage Card is

configured to use the I/O interface. The clocking will occur on the negative to

positive edge of the signal (trailing edge).

-IOW

23

IRQ

In True IDE Mode signal is the active high Interrupt Request to the host.

This input pin is the active low hardware reset from the host.

O

I

31

1

-RESET

IORDY

-IOIS16

This output signal may be used as IORDY.

O

27

32

This output signal is asserted low when this device is expecting a word data

transfer cycle.

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BLOCK DIAGRAM

PCMCIA

ATA

Interface

Buffer

Management

and Control

ECC

Circuit

HOST

Interface

ATA

Interface

8032

MICOM

NAND

FLASH

NAND

DEVICE

FLASH

DEVICE

Flash

Sequencer

and

NAND

FLASH

NAND

DEVICE

FLASH

Control

Logic

DEVICE

RAM

ROM Code

Figure 2.1 Block Diagram

3. INTERFACE BUS TIMING

ACCESS SPCIFICATIONS

1 System clock timing

Sym.

Tc

Tlpd

Description

Clock cycle time

Clock low pulse duration

Min.

45

0.4Tc

Typ.

50

Max.

100

0.6Tc

Unit

ns

Thpd Clock high pulse duration

ns

Tlpd

Thpd

Tc

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2 Host Read/Write timing

Sym.

Td

Description

HD bus asserted from HIOR# / HOE#

Min.

Typ.

Max.

10

Unit

ns

Th_(R)HD hold time after HIOR# / HOE#

Ts_(W)HD set up time of HIOW# / HWE#

Th_(W)HD hold time of HIOW# / HWE#

40

10

5

70

ns

CE[2:1]

HA

HA Valid

Th

Td

(R)

HIOR#/HOE#

Read HD Valid

HIOW#/

HWE#

Ts

Th

(W)

HD write

3 Flash Read/Write timing

Sym.

Tc_(F)

Description

Flash Read / Write cycle time

Min.

Typ.

100

Max.

Unit

ns

Ts_(FW)FD set up time of FWE#

Th_(FW)FD hold time of FWE#

Ts_(FR)FD set up time of FRD#

Th_(FR)FD hold time of FRD#

80

40

10

5

ns

(FW )

Ts

Th (FW )

FW E#

W rite FD

FRD#

Ts

Th

(FR)

Read FD

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REGISTERS

1) Data Register (Address – 1F0h[170h];Offset 0,8,9)

The Data Register is a 16-bit register, and it is used to transfer data blocks between the

CompactFlash Storage Card data buffer and the Host. This register overlaps the Error Register.The table below

describes the combinations of data register access and is provided to assist in understanding the overlapped Data

Register and Error/Feature Register rather than to attempt to define general PCMCIA word and byte access modes

and operations. See the PCMCIA PC Card Standard Release 2.0 for definitions of the Card Accessing Modes for

I/O and Memory cycles.

Note: Because of the overlapped registers, access to the 1F1h, 171h or offset 1 are not defined for word (-CE2 = 0

and -CE1 = 0) operations. These accesses are treated as accesses to the Word Data

Register. The duplicated registers at offsets 8, 9 and Dh have no restrictions on the operations that

can be performed by the socket.

Data Register Access

DATA Register

CE2-

CE1-

A0

Offset

Data Bus

D15-D0

D7-D0

Word Data Register

0

1

0

X

0

0,8,9

0,8

Even Data Register

Odd Data Register

1

0

1

0

1

0

1

0

1

X

1

9

8,9

1,Dh

1

D7-D0

D15-D8

D7-D0

Odd Data Register

Error/Feature Register

X

D15-D8

Dh

2) Error Register (Address – 1F1h[171h];Offset 1,0Dh Read Only)

This register contains additional information about the source of an error when an error is

indicated in bit 0 of the Status register. The bits are defined as follows:

D7

D6

D5

D4

D3

D2

D1

D0

BBK

UNC

0

IDNF

0

ABRT

0

AMNF

Error Register

This register is also accessed on data bits D15-D8 during a write operation to offset 0 with -CE2 low and -CE1 high.

Bit 7 (BBK): this bit is set when a Bad Block is detected.

Bit 6 (UNC): this bit is set when an Uncorrectable Error is encountered.

Bit 5: this bit is 0.

Bit 4 (IDNF): the requested sector ID is not valid error or cannot be found.

Bit 3: this bit is 0.

Bit 2 (Abort) This bit is set if the command has been aborted because of a CompactFlash

Storage Card status condition: (Not Ready, Write Fault, etc.) or when an invalid command

has been issued.

Bit 1 This bit is 0.

Bit 0 (AMNF) This bit is set in case of a general error happened.

3) Feature Register(Address – 1F1h[171h];Offset 1,0Dh Writer Only)

This register provides information regarding features of the CompactFlash Storage Card that the host can utilize.

This register is also accessed on data bits D15-D8 during a write operation to Offset 0 with -CE2 low and -CE1 high.

BIT DESCRIPTION-

7

6

5

4

3

2

1

0

Command specific

4) Sector Count Register(Address – 1F2h[172h];Offset 2)

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This register contains the numbers of sectors of data requested to be transferred on a read or

write operation between the host and the CompactFlash Storage Card. If the value in this register is zero, a count

of 256 sectors is specified. If the command was successful, this register is zero at command completion. If not

successfully completed, the register contains the number of sectors that need to be transferred in order to

complete the request.

BIT DESCRIPTION-

7

6

5

4

3

2

1

0

Sector Count

5) Sector Number (LBA 7-0) Register(Address–1F3h[173h];Offset 3)

This register contains the starting sector number or bits 7-0 of the Logical Block Address (LBA)

for any CompactFlash Storage Card data access for the subsequent command.

BIT DESCRIPTION - CHS

7

6

5

4

3

2

1

0

Sector (7: 0)

LBA

4

3

LBA (7 : 0)

6) Cylinder Low (LBA 15-8 )Register (Address–1F4h[174h];Offset 4)

This register contains the low order 8 bits of the starting cylinder address or bits 15-8 of the

Logical Block Address.

DIT DESCRIPTION-

CHS

7

6

5

4

3

2

1

0

Cylinder ( 7: 0 )

LBA

4

3

LBA ( 15 : 8 )

7) Cylinder High(LBA 23–16)Register(Address–1F5h[175h]; Offset 6)

This register contains the high order bits of the starting cylinder address or bits 23-16 of the

Logical Block Address.

BIT DESCRIPTION-

CHS

7

6

5

4

3

2

1

0

Cylinder ( 15 :8 )

LBA

4

3

LBA ( 23 : 16 )

8) Status/Alternate Status Register(Address 1F7h[177h]/3F6h[376h];Offset 7/ Eh)

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These registers return the CompactFlash Storage Card status when read by the host. Reading

the Status register does clear a pending interrupt, while reading the Alternate Status register does not. The status

bits are described as follows:

D7

D6

D5

D4

D3

D2

D1

D0

BUSY

RDY

DWF

DSC

DRQ

CORR

0

ERR

Status & Alternate Status Register

Bit 7 (BUSY): the busy bit is set when the CompactFlash Storage Card has access to the

command buffer and registers and the host is locked out from accessing the command

register and buffer. No other bits in this register are valid when this bit is set to a 1.

Bit 6 (DRDY): DRDY indicates whether the device is capable of performing CompactFlash Storage Card

operations. This bit is cleared at power up and remains cleared until the CompactFlash Storage Card is ready to

accept a command.

Bit 5 (DWF): This bit, if set, indicates a write fault has occurred.

Bit 4 (DSC): This bit is set when the CompactFlash Storage Card is ready.

Bit 3 (DRQ): The Data Request is set when the CompactFlash Storage Card requires the

information to be transferred either to or from the host through the Data register.

Bit 2 (CORR): This bit is set when a Correctable data error has been encountered and the data has been corrected.

This condition does not terminate a multi-sector read operation.

Bit 1 (IDX): This bit is always set to 0.

Bit 0 (ERR): This bit is set when the previous command has ended in some type of error. The bits in the Error

register contain additional information describing the error. It is recommended

that media access commands (such as Read Sectors and Write Sectors) that end with an

error condition should have the address of the first sector in error in the command block

registers.

9) Device Control Register( Address – 3F6h[376h]; Offset Eh)

This register is used to control the CompactFlash Storage Card interrupt request and to issue an ATA soft reset to

the card. This register can be written even if the device is BUSY. The bits are defined as follows:

D&

D6

D5

D4

D3

D2

D1

D0

X

1

SW Rst

-IEn

0

Device Control Register

Bit 7: this bit is an X (don’t care).

Bit 6: this bit is an X (don’t care).

Bit 5: this bit is an X (don’t care).

Bit 4: this bit is an X (don’t care).

Bit 3: this bit is ignored by the CompactFlash Storage Card.

Bit 2 (SW Rst): this bit is set to 1 in order to force the CompactFlash Storage Card to perform an AT Disk

controller Soft Reset operation. This does not change the PCMCIA Card

Configuration Registers (4.3.2 to 4.3.5) as a hardware Reset does. The Card remains in

Reset until this bit is reset to ‘0.’

Bit 1 (-IEn): the Interrupt Enable bit enables interrupts when the bit is 0. When the bit is 1,

The interrupts from the CompactFlash Storage Card are disabled. This bit also controls the Int bit in the

Configuration and Status Register. This bit is set to 0 at power on and Reset.

Bit 0: this bit is ignored by the CompactFlash Storage Card.

10) Card (Drive) Address Register(Address 3F7h[377h]; Offset Fh)

This register is provided for compatibility with the AT disk drive interface. It is recommended that this register not

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be mapped into the host’s I/O space because of potential conflicts on Bit 7. The bits are defined as follows:

D7

D6

D5

D4

D3

D2

D1

D0

X

-WTG

-HS3

-HS2

-HS1

-HS0

-nDS1

-nDS0

Card (Drive) Address Register

Bit 7: this bit is in High Imoedence..

Implementation Note:

Conflicts may occur on the host data bus when this bit is provided by a Floppy Disk Controller

operating at the same addresses as the CompactFlash Storage Card. Following are some

possible solutions to this problem for the PCMCIA implementation:

1) Locate the CompactFlash Storage Card at a non-conflicting address, i.e. Secondary

address (377) or in an independently decoded Address Space when a Floppy Disk Controller

is located at the Primary addresses.

2) Do not install a Floppy and a CompactFlash Storage Card in the system at the same time.

3) Implement a socket adapter, which can be programmed to (conditionally) tri-state D7 of I/0

address 3F7h/377h when a Compact Flash Storage Card is installed and conversely to tri-state

D6-D0 of I/O address 3F7h/377h when a floppy controller is installed.

4) Do not use the CompactFlash Storage Card’s Drive Address register. This may be

accomplished by either a) If possible, program the host adapter to enable only I/O addresses

1F0h-1F7h, 3F6h (or 170h-177h, 176h) to the CompactFlash Storage Card or b) if provided

use an additional Primary / Secondary configuration in the CompactFlash Storage Card

which does not respond to accesses to I/O locations 3F7h and 377h. With either of these

implementations, the host software must not attempt to use information in the Drive Address

Register.

Bit 6 (-WTG): this bit is 0 when a write operation is in progress, otherwise, it is 1.

Bit 5 (-HS3): this bit is the negation of bit 3 in the Drive/Head register.

Bit 4 (-HS2): this bit is the negation of bit 2 in the Drive/Head register.

Bit 3 (-HS1): this bit is the negation of bit 1 in the Drive/Head register.

Bit 2 (-HS0): this bit is the negation of bit 0 in the Drive/Head register.

Bit 1 (-nDS1): this bit is 0 when drive 1 is active and selected.

Bit 0 (-nDS0): this bit is 0 when the drive 0 is active and selected.

4. ATA COMMAND

CF-ATA Command Set

Table summarizes the CF-ATA command set with the paragraphs that follow describing the

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individual commands and the task file for each.

Table:CF-ATA Command Set

Class

1

COMMAND

Code

FR

-

SC

-

SN

-

CY

-

DH

D

Y

D

Y

D

Y

D

Y

D

Y

D

Y

LBA

-

Check Power Mode

E5h or 98h

1

Execute Drive Diagnostic 90h

-

2

Format Track

Identify Drive

Idle

50h

-

Y

-

Y

-

Y

-

1

ECh

-

1

E3h or 97h

E1h or 95h

-

Y

-

1

Idel Immediate

-

1

Initialize Drive Parameters 91h

-

Y

-

1

Read Buffer

E4h

-

1

Read Long Sector

Read Multiple

Read Sector(s)

Read Verify Sector(s)

Recalibrate

22h or 23h

C4h

-

Y

-

Y

-

Y

-

1

-

Y

-

1

20h or 21h

40h or 41h

1Xh

-

1

-

1

-

1

Request Sence

Seek

03h

-

1

7Xh

-

Y

-

Y

-

Y

-

1

Set Features

EFh

Y

-

1

Set Multiple Mode

Set Sleep Mode

Stand By

C6h

Y

-

1

E6h or 99h

E2h or 96h

E0h or 94h

87h

-

1

-

1

Stand By Immediate

Translate Sector

Wear Level

-

1

-

Y

-

Y

-

Y

-

Y

-

1

F5h

-

2

Write Buffer

E8h

-

--

Y

-

2

Write Long Sector

Write Multiple

WriteMultiple w/o Erase

Write Sector(s)

32h or 33h

C5h

-

Y

3

-

Y

3

CDh

-

2

30h or 31h

-

2

Write Sector(s) w/o Erase 38h

-

3

Write Verify 3Ch

-

Definitions:

--FR = Features Register

--SC = Sector Count Register

--SN = Sector Number Register

--CY = Cylinder Registers

--DH = Card/Drive/Head Register

--LBA = Logical Block Address Mode Supported (see command descriptions for use).

--Y - The register contains a valid parameter for this command. For the Drive/Head Register Y

means both the CompactFlash Storage Card and head parameters are used; D - only the CompactFlash

Storage Card parameter is valid and not the head parameter.

Check Power Mode – 98h or E5h

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Bit->

7

6

5

4

3

2

1

0

Command(7)

C/D/H(6)

98h or E5h

X

Drive

X

Cly High(5)

Cly Low(4)

Sec Num(3)

Sec Cnt(2)

Feature(1)

X

Check Power Mode

This command checks the power mode. f the CompactFlash Storage Card is in, going to, or recovering

from the sleep mode, the CompactFlash Storage Card sets BSY, sets the Sector Count Register to 00h,

clears BSY and generates an interrupt. If the CompactFlash Storage Card is in Idle mode, the

CompactFlash Storage Card sets BSY, sets the Sector Count Register to FFh, clears BSY and

generates an interrupt.

Execute Drive Diagnostic – 90h

Bit->

7

6

5

4

3

2

1

0

Command(7)

C/D/H(6)

90h

X

Drive

X

Cyl High(5)

Cyl Low(4)

Sec Num(3)

Sec Cnt(2)

Feature(1)

X

Execute Drive Diagnostic

This command performs the internal diagnostic tests implemented by the CompactFlash Storage Card.

If in PCMCIA configuration this command runs only on the CompactFlash Storage Card which is addressed by the

Drive/Head register when the diagnostic command is issued. This is because PCMCIA card interface does not

allows for direct inter-drive communication (such as the ATA PDIAG and DASP signals). If in True IDE Mode the

Drive bit is ignored and the diagnostic command is executed by both the Master and the Slave with the Master

responding with status for both devices.

The Diagnostic codes shown in Table 39 are returned in the Error Register at the end of the command.

Diagnostic Codes

Code

01h

ERROR TYPE

No Error Detected

Formatter Device Error

02h

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HANBit Electronics Co., Ltd.

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03h

04h

05h

8Xh

Sector Buffer Error

ECC Circuitry Error

Controlling Microprocessor Error

Slave Error in True IDE Mode

Erase Sector(s) – C0h

Bit->

7

6

5

1

4

3

2

1

0

Command(7)

C/D/H(6)

C0h

1

LBA

Drive

Head(LBA 27-24)

Cyl High(5)

Cyl Low(4)

Sec Num(3)

Sec Cnt(2)

Feature(1)

Cylinder High (LBA 23-16)

Cylinder Low (LBA 15-8)

Sector Number (LBA 7-0 )

Sector Count

X

Erase Sector

This command is used to pre-erase and condition data sectors in advance of a Write without

Erase or Write Multiple without Erase command. There is no data transfer associated with this

command but a Write Fault error status can occur.

Format Track - 50h

Bit->

7

1

6

5

1

4

3

2

1

0

Command(7)

C/D/H(6)

50h

LBA

Drive

Head(LBA 27-24)

Cyl High(5)

Cyl Low(4)

Sec Num(3)

Sec Cnt(2)

Feature(1)

Cylinder High (LBA 23-16)

Cylinder Low (LBA 15-8)

X (LBA 7-0 )

Count (LBA mode only)

X

Format Track

This command writes the desired head and cylinder of the selected drive with a vendor unique data pattern

(typically FFh or 00h).

To remain host backward compatible, the CompactFlash Storage Card expects a sector buffer of data from the

host to follow the command with the same protocol as the Write Sector(s) command although the information in the

buffer is not used by the CompactFlash Storage Card.

If LBA=1 then the number of sectors to format is taken from the SecCnt register (0=256). The use of this command

is not recommended.

Identify Drive - ECh

Bit->

7

6

5

4

3

2

1

0

Command(7)

C/D/H(6)

ECh

X

Drive

X

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Cyl High(5)

X

Cyl Low(4)

Sec Num(3)

Sec Cnt(2)

Feature(1)

X

Identify Drive

The Identify Drive command enables the host to receive parameter information from the

CompactFlash Storage Card. This command has the same protocol as the Read Sector(s)

command. The parameter words in the buffer have the arrangement and meanings defined in

Table . All reserved bits or words are zero. Table 40 is the definition for each field in the

Identify Drive Information.

Table: Identify Drive Information

Word

Default

Value

848Ah

xxxxh

0000h

00xxh

xxxxh

aaaa

Total

Data Field Type Information

Address

0

Bytes

2

General configuration – signature for the CompactFlash Storage Card

Default number of cylinders

1

2

Reserved

3

2

Default number of heads

4

2

Number of unformatted bytes per track

Number of unformatted bytes per sector

Default number of sectors per track

Number of sectors per card (Word 7 = MSW , word 8 = LSW)

Vendor Unique

5

2

6

2

7-8

9

4

2

10-19

20

2

Serial number in ASCII (Right Justified )

Buffer type

xxxxh

0004h

aaaa

21

2

Buffer size in 512 byte increments

# of ECC bytes passed on Read/Write Long Commands

Firmware revision in ASCII. Big Endian Byte Order in Word

Model number in ASCII (Left Justified) Big Endian Byte Order in Word

Maximum number of sectors on Read/Write Mutliple command

Double Word not supported

22

2

23-26

27-46

47

8

aaaa

40

2

xxxxh

0000h

xx00h

0000h

0x00h

0000h

0001h

Xxxxh

xxxxh

48

2

49

2

Capabilities

50

2

Reserved

51

2

PIO data transfer cycle timing mode

DMA data transfer cycle timing mode

Translation parameters are valid

52

2

53

2

54

2

Current numbers of cylinders

55

2

Current numbers of heads

56

2

Current sectors per track

57-58

4

Current capacity in sectors(LBAs)(Word 57 = LSW , Word 58 = MSW)

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HANBit Electronics Co., Ltd.

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59

010xh

xxxxh

0000h

xxxxh

0000h

xxxxh

0000h

2

4

Multiple sector setting

60-61

Total number of sectors addressable in LBA Mode

Reserved

62-127

128

138

2

Security status

129-159

160

64

2

Vendor unique bytes

Power requirement description

Reserved

161-255

170

Idle – 97h or E3h

Bit->

7

6

5

4

3

2

1

0

Command(7)

C/D/H(6)

97h or E3h

Drive

X

Cyl High(5)

Cyl Low(4)

Sec Num(3)

Sec Cnt(2)

Feature(1)

X

Timer Count (5 mess increments)

X

Idle

This command causes the CompactFlash Storage Card to set BSY, enter the Idle mode, clear

BSY and generate an interrupt. If the sector count is non-zero, it is interpreted as a timer count with each count

being 5 milliseconds and the automatic power down mode is enabled. If the sector count is zero, the automatic

power down mode is disabled. Note that this time base (5msec) is different from the ATA specification.

Idle Immediate – 95h or E1h

Bit->

7

6

5

4

3

2

1

0

Command(7)

C/D/H(6)

95h or E1h

Drive

X

Cyl High(5)

Cyl Low(4)

Sec Num(3)

Sec Cnt(2)

Feature(1)

X

Idle Immediate

This command causes the CompactFlash Storage Card to set BSY, enter the Idle mode, clear

BSY and generate an interrupt.

Initialize Drive Parameters – 91h

Bit->

7

6

5

4

3

2

1

0

Command(7)

C/D/H(6)

91h

X

0

X

Drive

Max Head(no. of heads-1)

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Cyl High(5)

X

Cyl Low(4)

Sec Num(3)

Sec Cnt(2)

Feature(1)

X

Number of Sectors

X

Initialize Drive Parameters

This command enables the host to set the number of sectors per track and the number of heads per cylinder. Only

the Sector Count and the Card/Drive/Head registers are used by this command.

Read Buffer – E4h

Bit->

7

6

5

4

3

2

1

0

Command(7)

C/D/H(6)

E4h

X

Drive

X

Cyl High(5)

Cyl Low(4)

Sec Num(3)

Sec Cnt(2)

Feature(1)

X

Read Buffer

The Read Buffer command enables the host to read the current contents of the CompactFlash

Storage Card’s sector buffer. This command has the same protocol as the Read Sector(s) command.

Read Multiple – C4h

Bit->

7

6

5

4

3

2

1

0

Command(7)

C/D/H(6)

C4h

1

LBA

1

Drive

Head(LBA 27 – 24)

Cyl High(5)

Cyl Low(4)

Sec Num(3)

Sec Cnt(2)

Feature(1)

Cylinder High (LBA 23 – 16)

Cylinder Low (15 – 8)

Sector Number (LBA 7 – 0)

Sector Count

X

Read Multiple

The Read Multiple command performs similarly to the Read Sectors command. Interrupts are not generated on

every sector, but on the transfer of a block which contains the number of sectors defined by a Set Multiple

command.

Command execution is identical to the Read Sectors operation except that the number of sectors defined by a Set

Multiple command are transferred without intervening interrupts. DRQ

qualification of the transfer is required only at the start of the data block, not on each sector.

The block count of sectors to be transferred without intervening interrupts is programmed by the Set Multiple Mode

command, which must be executed prior to the Read Multiple command.

When the Read Multiple command is issued, the Sector Count Register contains the number of sectors (not the

number of blocks or the block count) requested. If the number of requested

sectors is not evenly divisible by the block count, as many full blocks as possible are transferred, followed by a final,

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HANBit Electronics Co., Ltd.

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partial block transfer. The partial block transfer is for n sectors, where n = remainder (sector count / block count).

If the Read Multiple command is attempted before the Set Multiple Mode command has been executed or when

Read Multiple commands are disabled, the Read Multiple operation is rejected with an Aborted Command error.

Disk errors encountered during Read Multiple commands are posted at the beginning of the block or partial block

transfer, but DRQ is still set and the data transfer will take place as it normally would, including transfer of

corrupted data, if any Interrupts are generated when DRQ is set at the beginning of each block or partial block. The

error reporting is the same as that on a Read Sector(s) Command. This command reads from 1 to 256 sectors as

specified in the Sector Count register. A sector count of 0 requests 256 sectors.The transfer begins at the sector

specified in the Sector Number Register.

At command completion, the Command Block Registers contain the cylinder, head and sector number of the last

sector read. If an error occurs, the read terminates at the sector where the error occurred. The Command

Block Registers contain the cylinder, head and sector number of the sector where the error occurred. The flawed

data is pending in the sector buffer. Subsequent blocks or partial blocks are transferred only if the error was a

correctable data error. All other errors cause the command to stop after transfer of the block which contained the

error.

Read Long Sector – 22h or 23h

Bit->

7

6

5

4

3

2

1

0

Command(7)

C/D/H(6)

22h – 23h

Drive

1

LBA

1

Head(LBA 27 – 24)

Cyl High(5)

Cyl Low(4)

Sec Num(3)

Sec Cnt(2)

Feature(1)

Cylinder High (LBA 23 – 16)

Cylinder Low (15 – 8)

Sector Number (LBA 7 – 0)

X

Read Long Sector

The Read Long command performs similarly to the Read Sector(s) command except that it returns 516 bytes of

data instead of 512 bytes. During a Read Long command, the CompactFlash Storage Card does not check the

ECC bytes to determine if there has been a data error. Only single sector read long operations are supported. The

transfer consists of 512 bytes of data transferred in word mode followed by 4 bytes of ECC data transferred in byte

mode. This command has the same protocol as the Read Sector(s) command. Use of this command is not

recommended.

Read Sector(s) – 20h or 21h

Bit->

7

6

5

4

3

2

1

0

Command(7)

C/D/H(6)

20h – 21h

Drive

1

LBA

1

Head(LBA 27 – 24)

Cyl High(5)

Cyl Low(4)

Sec Num(3)

Sec Cnt(2)

Feature(1)

Cylinder High (LBA 23 – 16)

Cylinder Low (15 – 8)

Sector Number (LBA 7 – 0)

Sector Count

X

Read Sector(s)

This command reads from 1 to 256 sectors as specified in the Sector Count register. A sector count of 0 requests

256 sectors. The transfer begins at the sector specified in the Sector Number Register. When this command is

issued and after each sector of data (except the last one) has been read by the host, the CompactFlash Storage

Card sets BSY, puts the sector of data in the buffer, sets DRQ, clears BSY, and generates an interrupt. The host

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then reads the 512 bytes of data from the buffer.

At command completion, the Command Block Registers contain the cylinder, head and sector number of the last

sector read. If an error occurs, the read terminates at the sector where the error occurred. The Command Block

Registers contain the cylinder, head, and sector number of the sector where the error occurred. The flawed data is

pending in the sector buffer.

Read Verify Sector(s) – 40h or 41h

Bit->

7

6

5

4

3

2

1

0

Command(7)

C/D/H(6)

40h – 41h

Drive

1

LBA

1

Head(LBA 27 – 24)

Cyl High(5)

Cyl Low(4)

Sec Num(3)

Sec Cnt(2)

Feature(1)

Cylinder High (LBA 23 – 16)

Cylinder Low (15 – 8)

Sector Number (LBA 7 – 0)

Sector Count

X

Read Verify Sector(s)

This command is identical to the Read Sectors command, except that DRQ is never set and no data is transferred

to the host. When the command is accepted, the CompactFlash Storage Card sets BSY.

When the requested sectors have been verified, the CompactFlash Storage Card clears BSY and generates an

interrupt. Upon command completion, the Command Block Registers contain the cylinder, head, and sector

number of the last sector verified.

If an error occurs, the verify terminates at the sector where the error occurs. The Command Block Registers

contain the cylinder, head and sector number of the sector where the error occurred. The Sector Count Register

contains the number of sectors not yet verified.

Recablibrate – 1Xh

Bit->

7

6

5

4

3

2

1

0

Command(7)

C/D/H(6)

1Xh

1

LBA

1

Drive

X

Cyl High(5)

Cyl Low(4)

Sec Num(3)

Sec Cnt(2)

Feature(1)

X

Recalibrate

This command is effectively a NOP command to the CompactFlash Storage Card and is provided for compatibility

purposes.

Request Sense – 03h

Bit->

7

6

5

4

3

2

1

0

Command(7)

C/D/H(6)

03h

1

LBA

1

Drive

X

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Cyl High(5)

X

Cyl Low(4)

Sec Num(3)

Sec Cnt(2)

Feature(1)

X

Request Sense

This command requests extended error information for the previous command. Table 41 defines the valid extended

error codes for the CompactFlash Storage Card Series product. The extended error code is returned to the host in

the Error Register.

Extended Error Codes

Extended Error Code

Description

00h

No Error Detected

01h

Self Test OK ( No Error )

Miscellaneous Error

09h

20h

Invalid Command

21h

Invalid Address ( Requested Head or Sector Invalid )

Address Overflow ( address Too Large )

Supply or generated Voltage Out of Tolerance

Uncorrectable ECC Error

Corrected ECC Error

2Fh

35h , 36h

11h

18h

05h , 30-34h , 37h ,3Eh

Self Test or Diagnostic Failed

ID Not Found

10h , 14h

3Ah

Spare Sectors Exhausted

Data Transfer Error / Aborted Command

Corrupted Media Format

Write / Erase Failed

1Fh

0Ch , 38h , 3Bh , 3Ch , 3Fh

03h

22h

Power Level 1 Disabled

Seek –7X h

Bit->

7

6

5

4

3

2

1

0

Command(7)

C/D/H(6)

7Xh

1

LBA

1

Drive

Head(LBA 27 – 24)

Cyl High(5)

Cyl Low(4)

Cylinder High (LBA 23 – 16)

Cylinder Low (15 – 8)

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HFDOM40K3R

Sec Num(3)

X (LBA 7 – 0)

Sec Cnt(2)

Feature(1)

X

Seek

This command is effectively a NOP command to the CompactFlash Storage Card although it does perform a range

check of cylinder and head or LBA address and returns an error if the address is out of range.

Set Features - EFh

Bit->

7

6

5

4

3

2

1

0

Command(7) EFh

C/D/H(6)

Cyl High(5)

Cyl Low(4)

Sec Num(3)

Sec Cnt(2)

Feature(1)

X

Drive

X

Configure

Feature

Set Features

This command is used by the host to establish or select certain features. Table 45 defines all features that are

supported.

Feature Supported

Feature

01h

Operation

Enable 8 – bit data transfers

0Ah

55h

Enable Power Level 1 commands

Disable Read Look Ahead

66h

Disable Power on Reset(POR) establishment of defaults at Soft Reset

NOP – Accepted for backward compatibility

Disable 8 – bit data transfer

69h

81h

8Ah

96h

Disable Power Level 1 commands

NOP – Accepted for backward compatibility

Accepted for backward compatibility . Use of this Feature is not recommended

Set the host current source capability. Allows tradeoff between current drawn and

read/write speed.

97h

9Ah

BBh

CCh

4 bytes of data apply on Read/Write Long commands

Enable Power on Reset (POR) establishment of defaults at Soft Reset

Features 01h and 81h are used to enable and clear 8 bit data transfer modes in True IDE Mode. If the 01h feature

command is issued all data transfers will occur on the low order D7D0 data bus and the IOIS16 signal will not be

asserted for data register accesses.

Features 0Ah and 8Ah are used to enable and disable Power Level 1 commands. Feature 0Ah is the default

feature for the CompactFlash Storage Card with extended power.

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Features 55h and BBh are the default features for the CompactFlash Storage Card; thus, the host does not have to

issue this command with these features unless it is necessary for compatibility reasons. Feature code 9Ah enables

the host to configure the card to best meet the host system’s power requirements. The host sets a value in the

Sector Count register that is equal to one-fourth of the desired maximum average current (in mA) that the card

should consume. For example, if the Sector Count register is set to 6, the card would be configured to provide the

best possible performance without exceeding 24 mA. Upon completion of the command, the card responds to the

host with the range of values supported by the card. The minimum value is set in the Cylinder Low register, and the

maximum value is set in the Cylinder Hi register. The default value, after a power on reset, is to operate at the

highest performance and therefore the highest current mode. The card will accept values outside this

programmable range, but will operate either at the lowest power or highest performance as appropriate.

Features 66h and CCh can be used to enable and disable whether the Power On Reset (POR) Defaults will be

set when a soft reset occurs. The default setting is to revert to the POR defaults when a soft reset occurs.

Set Multiple Mode – C6h

Bit->

7

6

5

4

3

2

1

0

Command(7)

C/D/H(6)

C6h

X

Drive

X

Cyl High(5)

Cyl Low(4)

Sec Num(3)

Sec Cnt(2)

Feature(1)

X

Sector Count

X

Set Multiple Mode

This command enables the CompactFlash Storage Card to perform Read and Write Multiple operations and

establishes the block count for these commands. The Sector Count Register is loaded with the number of sectors

per block. Upon receipt of the command, the CompactFlash Storage Card sets BSY to 1 and checks the Sector

Count Register.

If the Sector Count Register contains a valid value and the block count is supported, the value is loaded for all

subsequent Read Multiple and Write Multiple commands and execution of those commands is enabled. If a block

count is not supported, an Aborted Command error is posted, and Read Multiple and Write Multiple commands are

disabled. If the Sector Count Register contains 0 when the command is issued, Read and Write Multiple

commands are disabled. At power on, or after a hardware or (unless disabled by a Set Feature command) software

reset, the default mode is Read and Write Multiple disabled.

Set Sleep Mode – 99h or E6h

Bit->

7

6

5

4

3

2

1

0

Command(7)

C/D/H(6)

99h or E6h

Drive

X

Cyl High(5)

Cyl Low(4)

Sec Num(3)

Sec Cnt(2)

Feature(1)

X

Set Sleep Mode

This command causes the CompactFlash Storage Card to set BSY, enter the Sleep mode, clear BSY and generate

an interrupt. Recovery from sleep mode is accomplished by simply issuing another command (a reset is permitted

but not required). Sleep mode is also entered when internal timer expires so the host does not need to issue this

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HANBit Electronics Co., Ltd.

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command except when it wishes to enter Sleep mode immediately. The default value for the timer is 1.6

milliseconds. Note that this time base (1.6 msec) is different from the ATA Specification.

Standby – 96h or E2h

Bit->

7

6

5

4

3

2

1

0

Command(7)

C/D/H(6)

96h or E2h

Drive

X

Cyl High(5)

Cyl Low(4)

Sec Num(3)

Sec Cnt(2)

Feature(1)

X

Standby

This command causes the CompactFlash Storage Card to set BSY, enter the Sleep mode (which corresponds to

the ATA “Standby” Mode), clear BSY and return the interrupt immediately.

Recovery from sleep mode is accomplished by simply issuing another command (a reset is not required).

Standby Immediate – 94h or E0h

Bit->

7

6

5

4

3

2

1

0

Command(7)

C/D/H(6)

94h or E0h

Drive

X

Cyl High(5)

Cyl Low(4)

Sec Num(3)

Sec Cnt(2)

Feature(1)

X

Standby Immediate

This command causes the CompactFlash Storage Card to set BSY, enter the Sleep mode (which corresponds to

the ATA “Standby” Mode), clear BSY and return the interrupt immediately.

Recovery from sleep mode is accomplished by simply issuing another command (a reset is not required).

Translate Sector – 87h

Bit->

7

6

5

4

3

2

1

0

Command(7)

C/D/H(6)

87h

1

LBA

1

Drive

Head(LBA 27 – 24)

Cyl High(5)

Cyl Low(4)

Cylinder High (LBA 23 – 16)

Cylinder Low (15 – 8)

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HFDOM40K3R

Sec Num(3)

Sector Number (LBA 7 – 0)

Sec Cnt(2)

Feature(1)

X

Translate Sector

This command allows the host a method of determining the exact number of times a user sector has been erased

and programmed. The controller responds with a 512 byte buffer of information containing the desired cylinder,

head and sector, including its Logical Address, and the Hot Count, if available, for that sector. Table 46 represents

the information in the buffer. Please note that this command is unique to the CompactFlash Storage Card.

Address Information

Information

ADDRESS

00h – 01h

02h

Cylinder MSB (00), Cylinder LSB (01)

Head

03h

Sector

04h – 06h

07h – 12h

13h

LBA MSB (04) – LSB (06)

Reserved

Erased Flag (ffh) = Erased; 00h = Not Erased

Reserved

14h – 17h

18h – 1Ah

1bh – 1ffh

Hot Count MSB (18) – LSB (1A)

Reserved

Note 1: A value of 0 indicates Hot Count is not supported.

Wear Level – F5h

Bit->

7

6

5

4

3

2

1

0

Command(7)

C/D/H(6)

F5h

X

Drive

Flag

Cyl High(5)

Cyl Low(4)

Sec Num(3)

Sec Cnt(2)

Feature(1)

X

Completion Status

X

Wear Level

For the CompactFlash Storage Cards that do not support security mode feature set, this

command is effectively a NOP command and only implemented for backward compatibility. The Sector Count

Register will always be returned with a 00h indicating Wear Level is not needed. If the CompactFlash Storage Card

supports security mode feature set, this command shall be handled as Security Freeze Lock.

Write Buffer – E8h

Bit->

7

6

5

4

3

2

1

0

Command(7)

E8h

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HFDOM40K3R

C/D/H(6)

X

Drive

X

Cyl High(5)

Cyl Low(4)

Sec Num(3)

Sec Cnt(2)

Feature(1)

X

Write Buffer

The Write Buffer command enables the host to overwrite contents of the CompactFlash Storage Card’s sector

buffer with any data pattern desired. This command has the same protocol as the Write Sector(s) command and

transfers 512 bytes.

Write Long Sector –32h or 33h

Bit->

7

6

5

4

3

2

1

0

Command(7)

C/D/H(6)

32h or 33h

Drive

1

LBA

1

Head(LBA 27 – 24)

Cyl High(5)

Cyl Low(4)

Sec Num(3)

Sec Cnt(2)

Feature(1)

Cylinder High (LBA 23 – 16)

Cylinder Low (15 – 8)

Sector Number (LBA 7 – 0)

X

Write Long Sector

This command is similar to the Write Sector(s) command except that it writes 516 bytes instead of 512 bytes. Only

single sector Write Long operations are supported. The transfer consists of 512 bytes of data transferred in word

mode followed by 4 bytes of ECC transferred in byte mode. Because of the unique nature of the solid-state

CompactFlash Storage Card, the four bytes of ECC transferred by the host may be used by the CompactFlash

Storage Card. The CompactFlash Storage Card may discard these four bytes and write the sector with valid ECC

data. This command has the same protocol as the Write Sector(s) command. Use of this command is not

recommended.

Write Multiple Command – C5h

Bit->

7

6

5

4

3

2

1

0

Command(7)

C/D/H(6)

C5h

X

LBA

X

Drive

Head

Cyl High(5)

Cyl Low(4)

Sec Num(3)

Sec Cnt(2)

Feature(1)

Cylinder High

Cylinder Low

Sector Number

Sector Count

X

Write Multiple Command

Note: The current revision of the CompactFlash Storage Card only supports a block count of 1 as indicated in the

Identify Drive Command information. This command is provided for compatibility with future products which may

support a larger block count.

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26 / 30

HANBit Electronics Co., Ltd.

Rev. 2.0 (October. 2004)

HANBit

HFDOM40K3R

This command is similar to the Write Sectors command. The CompactFlash Storage Card sets BSY within 400

nsec of accepting the command. Interrupts are not presented on each sector but on the transfer of a block which

contains the number of sectors defined by Set Multiple.

Command execution is identical to the Write Sectors operation except that the number of sectors defined by the

Set Multiple command is transferred without intervening interrupts.

DRQ qualification of the transfer is required only at the start of the data block, not on each sector. The block count

of sectors to be transferred without intervening interrupts is programmed by the Set Multiple Mode command,

which must be executed prior to the Write Multiple command.

When the Write Multiple command is issued, the Sector Count Register contains the number of sectors (not the

number of blocks or the block count) requested. If the number of requested

sectors is not evenly divisible by the sector/block, as many full blocks as possible are transferred, followed by a

final, partial block transfer. The partial block transfer is for n sectors, where:

n = remainder ( sector count / block count ). If the Write Multiple command is attempted before the Set Multiple

Mode command has been executed or when Write Multiple commands are disabled, the Write Multiple operation

will be rejected with an aborted command error.

Errors encountered during Write Multiple commands are posted after the attempted writes of the block or partial

block transferred. The Write command ends with the sector in error, even if it is in the middle of a block.

Subsequent blocks are not transferred in the event of an error. Interrupts are generated when DRQ is set at the

beginning of each block or partial block.

The Command Block Registers contain the cylinder, head and sector number of the sector where the error

occurred and the Sector Count Register contains the residual number of sectors that need to be transferred for

successful completion of the command, e.g., each block has 4 sectors, a request for 8 sectors is issued and an

error occurs on the third sector. The Sector Count Register contains 6 and the address is that of the third sector.

Write Multiple without Erase – CDh

Bit->

7

6

5

4

3

2

1

0

Command(7)

C/D/H(6)

CDh

X

LBA

X

Drive

Head

Cyl High(5)

Cyl Low(4)

Sec Num(3)

Sec Cnt(2)

Feature(1)

Cylinder High

Cylinder Low

Sector Number

Sector Count

X

Write Multiple without Erase

This command is similar to the Write Multiple command with the exception that an implied erase before write

operation is not performed. The sectors should be pre-erased with the Erase Sector(s) command before this

command is issued.

Write Sector(s) – 30h or 31h

Bit->

7

6

5

4

3

2

1

0

Command(7)

C/D/H(6)

30h or 31h

Drive

1

LBA

1

Head(LBA 27 – 24)

Cyl High(5)

Cyl Low(4)

Sec Num(3)

Sec Cnt(2)

Feature(1)

Cylinder High (LBA 23 – 16)

Cylinder Low (15 – 8)

Sector Number (LBA 7 – 0)

Sector Count

X

Write Sector(s)

URL:www.hbe.co.kr

27 / 30

HANBit Electronics Co., Ltd.

Rev. 2.0 (October. 2004)

HANBit

HFDOM40K3R

This command writes from 1 to 256 sectors as specified in the Sector Count Register. A sector count of zero

requests 256 sectors. The transfer begins at the sector specified in the Sector

Number Register. When this command is accepted, the CompactFlash Storage Card sets BSY,then sets DRQ and

clears BSY, then waits for the host to fill the sector buffer with the data to be written. No interrupt is generated to

start the first host transfer operation. No data should be transferred by the host until BSY has been cleared by the

host.

For multiple sectors, after the first sector of data is in the buffer, BSY will be set and DRQ will be cleared. After the

next buffer is ready for data, BSY is cleared, DRQ is set and an interrupt is generated. When the final sector of

data is transferred, BSY is set and DRQ is cleared. It will remain in this state until the command is completed at

which time BSY is cleared and an interrupt is generated.

If an error occurs during a write of more than one sector, writing terminates at the sector where the error occurs.

The Command Block Registers contain the cylinder, head and sector number of the sector where the error

occurred. The host may then read the command block to determinem what error has occurred, and on which sector.

Write Sector(s) without Erase – 38h

Bit->

7

6

5

4

3

2

1

0

Command(7)

C/D/H(6)

38h

1

LBA

1

Drive

Head(LBA 27 – 24)

Cyl High(5)

Cyl Low(4)

Sec Num(3)

Sec Cnt(2)

Feature(1)

Cylinder High (LBA 23 – 16)

LBA(15 – 8)

Sector Number (LBA 7 – 0)

Sector Count

X

Write Sector(s) without Erase

This command is similar to the Write Sector(s) command with the exception that an implied erase before write

operation is not performed. This command has the same protocol as the Write Sector(s) command. The sectors

should be pre-erased with the Erase Sector(s) command before this command is issued. If the sector is not pre-

erased with the Erase Sector(s) command, a normal write sector operation will occur.

Write Verify – 3Ch

Bit->

7

6

5

4

3

2

1

0

Command(7)

C/D/H(6)

3Ch

1

LBA

1

Drive

Head(LBA 27 – 24)

Cyl High(5)

Cyl Low(4)

Sec Num(3)

Sec Cnt(2)

Feature(1)

Cylinder High (LBA 23 – 16)

LBA(15 – 8)

Sector Number (LBA 7 – 0)

Sector Count

X

Write Verify

This command is similar to the Write Sector(s) command, except each sector is verified immediately after being

written. This command has the same protocol as the Write Sector(s) command.

Summaries of the valid status and error value for all the ATA Command set Error and Status Register

Error Register

Status Register

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28 / 30

HANBit Electronics Co., Ltd.

Rev. 2.0 (October. 2004)

HANBit

HFDOM40K3R

Command

CheckPowerMode

BBk UNC IDNF ABRT AMNF DRDY DWF DSC CORR ERR

V

ExecuteDriveDiagnostic

Erase Sector(s)

Format Track

V

Identify Drive

Idle

Idle Immediate

InitializeDriveParameter

Read Buffer

V

Read Multiple

V

Read Long Sector

Read Sector(s)

Read Verify Sectors

Recalibrate

V

Request Sense

Seek

V

Set Features

V

Set Multiple Mode

Set Sleep Mode

Stand By

Stand By Immediate

Translate Sector

Wear Level

V

Write Buffer

Write Long Sector

Write Multiple

V

Write Multiple w/o Erase

Write Sector(s)

Write Sector(s) w/o

Erase

Write Verify Sector(s)

Invalid Command Code

V = Valid on this command

V

Ordering Infomation

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29 / 30

HANBit Electronics Co., Ltd.

Rev. 2.0 (October. 2004)

HANBit

HFDOM40K3R

Media transfer

mode

Operation

Mode

NO

Parts

Capacity

16Mbyte

32Mbyte

64Mbyte

96Mbyte

128Mbyte

192Mbyte

256Mbyte

384Mbyte

512Mbyte

1Gbyte

1

2

3

4

5

DOM40K3R016

DOM40K3R032

DOM40K3R064

BYTE

True IDE

DOM40K3R096

DOM40K3R128

6

7

DOM40K3R192

DOM40K3R256

DOM40K3R384

8

9

DOM40K3R512

DOM40K3R1G

10

11

12

13

14

DOM40K3R1.5G

DOM40K3R2G

DOM40K3R3G

DOM40K3R4G

1.5Gbyte

2Gbyte

3Gbyte

4Gbyte

URL:www.hbe.co.kr

30 / 30

HANBit Electronics Co., Ltd.

Rev. 2.0 (October. 2004)


型号：	DOM40K3R016
厂家：	HANBIT ELECTRONICS CO.,LTD
描述：	40Pin Flash Disk Module Min.16MB ~ Max.4GB, True IDE Interface Mode, 3.3V / 5.0V Operating 40PIN闪存盘模块Min.16MB 〜 Max.4GB ，真正的IDE接口模式， 3.3V / 5.0V工作闪存
文件：	总30页 (文件大小：233K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

DOM40K3R016 [HANBIT]

相关型号：

DOM40K3R032

DOM40K3R064

DOM40K3R096

DOM40K3R1.5G

DOM40K3R128

DOM40K3R192

DOM40K3R1G

DOM40K3R256

DOM40K3R2G

DOM40K3R384

DOM40K3R3G

DOM40K3R4G