HMD1M32M2G-7

更新时间:2024-09-18 06:01:41
品牌:HANBIT
描述:4Mbyte(1Mx32) Fast Page Mode, 1K Refresh, 72Pin SIMM, 5V Design

HMD1M32M2G-7 概述

4Mbyte(1Mx32) Fast Page Mode, 1K Refresh, 72Pin SIMM, 5V Design 4Mbyte ( 1Mx32 )快速页面模式, 1K刷新, 72PIN SIMM , 5V设计 DRAM

HMD1M32M2G-7 规格参数

生命周期:Contact Manufacturer包装说明:,
Reach Compliance Code:unknown风险等级:5.75
Base Number Matches:1

HMD1M32M2G-7 数据手册

通过下载HMD1M32M2G-7数据手册来全面了解它。这个PDF文档包含了所有必要的细节,如产品概述、功能特性、引脚定义、引脚排列图等信息。

PDF下载
HANBit  
HMD1M32M2G  
4Mbyte(1Mx32) Fast Page Mode, 1K Refresh, 72Pin SIMM, 5V Design  
Part No. HMD1M32M2G  
DESCRIPTION  
The HMD1M32M2G is an 1M x 32 bits Dynamic RAM MODULE which is assembled 2 pieces of 1M x 16bit DRAMs in 42 pin  
SOJ package on single sides the printed circuit board with decoupling capacitors. The HMD1M32M2G is optimized for  
application to the systems, which are required high density and large capacity such as main memory of the computers and an  
image memory systems, and to the others, which are, requested compact size.  
The HMD1M32M2G provides common data and outputs.  
PIN ASSIGNMENT  
Features  
PIN SYMBOL PIN  
SYMBOL  
PIN SYMBOL  
1
2
Vss  
DQ0  
DQ16  
DQ1  
DQ17  
DQ2  
DQ18  
DQ3  
DQ19  
Vcc  
25  
26  
27  
28  
29  
30  
31  
32  
33  
34  
35  
36  
37  
38  
39  
40  
41  
42  
43  
44  
45  
46  
47  
48  
DQ22  
DQ7  
DQ23  
A7  
49  
50  
51  
52  
53  
54  
55  
56  
57  
58  
59  
60  
61  
62  
63  
64  
65  
66  
67  
68  
69  
70  
71  
72  
DQ8  
DQ24  
DQ9  
w 72 pins Single In-Line Package  
w Fast Page Mode Capability  
3
w Single +5V± 0.5V power supply  
w Fast Access Time & Cycle Time  
4
DQ25  
DQ10  
DQ26  
DQ11  
DQ27  
DQ12  
DQ28  
Vcc  
5
NC  
tRAC tCAC tRC  
tPC  
40  
6
Vcc  
HMD1M32M2G-6  
HMD1M32M2G-7  
w Low Power  
60  
70  
15  
18  
110  
130  
7
A8  
45  
8
A9  
9
NC  
Active: 1,870/1,650/1,430 mW(MAX)  
Standby: 11mW(CMOS level : MAX)  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
/RAS2  
NC  
NC  
w /RAS Only Refresh, /CAS before /RAS Refresh,  
Hidden Refresh Capability  
A0  
NC  
DQ29  
DQ13  
DQ30  
DQ14  
DQ31  
DQ15  
NC  
A1  
NC  
w All inputs and outputs TTL Compatible  
w 1,024 Refresh Cycles/16ms  
A2  
NC  
A3  
Vss  
A4  
/CAS0  
/CAS2  
/CAS3  
/CAS1  
/RAS0  
NC  
PRESENCE DETECT PINS (Optional)  
A5  
A6  
PIN  
PD1  
PD2  
PD3  
PD4  
60NS  
Vss  
Vss  
NC  
70NS  
NC  
PD1  
Vss  
Vss  
Vss  
NC  
DQ4  
DQ20  
DQ5  
DQ21  
DQ6  
PD2  
PD3  
NC  
PD4  
/WE  
NC  
NC  
NC  
Vss  
PIN DESCRIPTION  
PIN  
FUNCTION  
PIN  
FUNCTION  
Presence Detect  
A0 A9  
Address Inputs  
PD1 PD4  
DQ0 DQ31  
/RAS0, /RAS2  
/CAS0 - /CAS3  
/WE  
Data Input/Output  
Vcc  
Vss  
NC  
-
Power (+5V)  
Ground  
Row Address Strobe  
Column Address Strobe  
Read/Write Enable  
No Connection  
-
URL:www.hbe.co.kr  
REV.1.0 (August.2002)  
HANBiT Electronics Co., Ltd  
1
HANBit  
HMD1M32M2G  
FUNCTIONAL BLOCK DIAGRAM  
DQ0  
DQ1  
DQ2  
DQ3  
DQ4  
DQ5  
DQ6  
DQ7  
U0  
/RAS0  
/CAS0  
/CAS1  
/RAS  
/LCAS  
/UCAS  
/OE  
DQ0-DQ7  
DQ8  
DQ9  
DQ10  
DQ11  
DQ12  
DQ13  
DQ14  
DQ15  
DQ8-DQ15  
DQ0  
DQ1  
DQ2  
DQ3  
DQ4  
DQ5  
DQ6  
DQ7  
U1  
/RAS  
/LCAS  
/UCAS  
/OE  
/RAS2  
/CAS2  
/CAS3  
DQ16-DQ23  
DQ8  
DQ9D  
Q10  
DQ11  
DQ12  
DQ13  
DQ14  
DQ15  
DQ24-DQ31  
/WE  
A0-A9  
Vcc  
0.1uF Capacitor  
Vss  
ABSOLUTE MAXIMUM RATINGS*  
SYMBOL  
TA  
PARAMETER  
RATING  
0 ~ 70  
-55 ~ 125  
-1.0 ~ 7.0  
-1.0 ~ 7.0  
50  
UNIT  
C
Ambient Temperature under Bias  
Storage Temperature (Plastic)  
Voltage on any Pin Relative to Vss  
Power Supply Voltage  
TSTG  
VIN/VOUT  
VCC  
C
V
V
IOUT  
Short Circuit Output Current  
Power Dissipation  
mA  
W
PD  
2
*NOTE: 1. Stress greater than above absolute Maximum Ratings? May cause permanent damage to the device.  
URL:www.hbe.co.kr  
REV.1.0 (August.2002)  
HANBiT Electronics Co., Ltd  
2
HANBit  
HMD1M32M2G  
RECOMMENDED DC OPERATING CONDITIONS (TA = 0 ~ 70C)  
PARAMETER  
Supply Voltage  
SYMBOL  
Vcc  
MIN  
4.5  
0
TYP.  
MAX  
UNIT  
5.0  
5.5  
0
V
V
V
V
Ground  
Vss  
0
-
Input High Voltage  
VIH  
2.4  
-1.0  
Vcc+1  
0.8  
Input Low Voltage  
VIL  
-
*NOTE: All voltages referenced to Vcc  
DC AND OPERATING CHARACTERISTICS  
SYMBOL  
PARAMETER  
MIN  
MAX  
UNIT  
NOTE  
Output Level  
VOH  
2.4  
Vcc  
V
Output High Level Voltage (IOUT = -5mA)  
Output Level  
VOL  
0
0.4  
V
Output Low Level Voltage (IOUT = 4.2mA)  
60ns  
70ns  
-
-
-
-
340  
300  
-
Operating Current  
ICC1  
Average Power Supply Operating Current  
(/RAS,/CAS,Address Cycling : tRC = tRC min)  
mA  
1,2  
Standby Current (TTL)  
ICC2  
ICC3  
Power Supply Standby Current  
(/RAS,/CAS = VIH)  
-
-
4
mA  
mA  
/RAS Only Refresh Current  
Average Power Supply Current  
/RAS Only Mode  
60ns  
70ns  
340  
300  
2
(/RAS Cycling, /CAS = VIH,: tRC = tRC min)  
Fast Page Mode Current  
Average Power Supply Current  
Fast Page Mode  
60ns  
70ns  
-
-
340  
300  
mA  
mA  
1,3  
1,3  
ICC  
(/RAS = VIL, /CAS, Address Cycling : tPC = tPC min)  
ICC4  
Standby Current (CMOS)  
Power Supply Standby Current  
(/RAS,/CAS >= Vcc 0.2V)  
/CAS before /RAS Refresh Current  
(tRC = tRC min)  
ICC5  
ICC6  
-
2
mA  
mA  
60ns  
70ns  
-
-
340  
300  
URL:www.hbe.co.kr  
REV.1.0 (August.2002)  
HANBiT Electronics Co., Ltd  
3
HANBit  
HMD1M32M2G  
Standby Current /RAS = VIH  
/CAS = VIL  
DOUT = Enable  
ICC7  
-
10  
10  
10  
mA  
uA  
uA  
1
Input Leakage Current  
II(L)  
Any Input (0V<=VIN<=7V)  
-10  
-10  
All Other Pins Not Under Test = 0V  
Output Leakage Current  
IO(L)  
(DOUT is Disabled, 0V<=VOUT<=7V)  
Note: 1.Icc depends on output load condition when the device is selected.  
Icc (max) is specified at the output open condition.  
2. Address can be changed once or less while /RAS = VIL.  
3. Address can be changed once or less while /CAS = VIH  
CAPACITANCE ( TA=25oC, Vcc = 5V+/- 10%, f = 1Mhz )  
DESCRIPTION  
Input Capacitance (A0-A9)  
SYMBOL  
CI1  
MIN  
MAX  
UNITS  
NOTE  
1
-
-
-
-
-
35  
34  
27  
27  
20  
pF  
pF  
pF  
pF  
pF  
Input Capacitance (/WE)  
C I2  
1,2  
1,2  
1,2  
1,2  
Input Capacitance (/RAS0,/RAS2)  
Input Capacitance (/CAS0-/CAS3)  
Input/Output Capacitance (DQ0-31)  
CI3  
CI4  
CDQ1  
Note: 1. Capacitance measured with Boonton Meter or effective capacitance measuring method.  
2. /CAS = VIH to disable DOUT.  
o
o
AC CHARACTERISTICS ( 0 C £ TA £ 70 C , Vcc = 5V±10%, See notes 1,15.)  
The GMM731000CNS/SG writes data only in early write cycle (twcs>=twcs(min))  
Delayed write cycle is not available because of I/O common.  
READ, WRITE AND REFRESH CYCLE (Common Parameters)  
-6  
-7  
SYMBOL  
PARAMETER  
UNIT  
NOTE  
MIN  
110  
40  
60  
15  
0
MAX  
MIN  
130  
50  
70  
18  
0
MAX  
tRC  
tPR  
Random Read or Write Cycle Time  
/RAS Precharge Time  
-
-
ns  
ns  
ns  
ns  
ns  
ns  
ns  
-
-
tRAS  
tCAS  
tASR  
tRAH  
tASC  
/RAS Pulse Width  
10K  
10K  
/CAS Pulse Width  
10K  
10K  
Row Address Setup Time  
Row Address Hold Time  
Column Address Setup Time  
-
-
-
-
-
-
10  
0
10  
0
URL:www.hbe.co.kr  
REV.1.0 (August.2002)  
HANBiT Electronics Co., Ltd  
4
HANBit  
HMD1M32M2G  
tCAH  
tRCD  
tRAD  
tRSH  
tCSH  
tCRP  
tT  
Column Address Hold Time  
/RAS to /CAS Delay Time  
/RAS to Column Address Delay Time  
/RAS Hold Time  
10  
20  
15  
15  
60  
5
-
45  
30  
-
15  
20  
15  
18  
70  
5
-
52  
35  
-
9
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ms  
10  
/CAS Hold Time  
-
-
/CAS to /RAS Precharge Time  
Transition Time (Rise and Fall)  
Refresh Period (1024 Cycle)  
-
-
3
50  
16  
3
50  
16  
8
tREF  
-
-
READ CYCLE  
SYMBOL  
-6  
-7  
PARAMETER  
UNIT  
NOTE  
MIN  
MAX  
MIN  
MAX  
tRAC  
tCAC  
tAA  
Access Time from /RAS  
-
-
60  
15  
30  
-
-
-
70  
18  
35  
-
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
2,3  
3,4  
Access Time from /CAS  
Access Time from Column Address  
Read Command Setup Time  
Read Command Hold Time to /CAS  
Read Command Hold Time to /RAS  
Column Address to /RAS Lead Time  
Output Buffer Turn-off Time  
-
-
3,5,14  
tRCS  
tRCH  
tRRH  
tRAL  
tOFF  
0
0
0
30  
-
0
0
0
35  
-
-
-
6
6
-
-
-
-
15  
15  
7
WRITE CYCLE  
SYMBOL  
-6  
-7  
PARAMETER  
UNIT  
NOTE  
MIN  
MAX  
MIN  
MAX  
twcs  
tWCH  
tWP  
Write Command Setup Time  
Write Command Hold Time  
Write Command Pulse Width  
Write Command to /RAS Lead Time  
Write Command to /CAS Lead Time  
Data-in Setup Time  
0
-
-
-
-
-
-
-
0
-
-
-
-
-
-
-
ns  
ns  
ns  
ns  
ns  
ns  
ns  
11  
10  
10  
15  
15  
0
15  
10  
18  
18  
0
tRWL  
tCWL  
tDS  
12  
12  
tDH  
Data-in Hold Time  
10  
15  
REFRESH CYCLE  
SYMBOL  
-6  
-7  
PARAMETER  
UNIT  
NOTE  
MIN  
10  
MAX  
MIN  
10  
MAX  
/CAS Setup Time  
tCRS  
tCHR  
-
-
-
-
ns  
ns  
(/CAS-before-/RAS Refresh Cycle)  
/CAS Hold Time  
10  
10  
(/CAS-before-/RAS Refresh Cycle)  
URL:www.hbe.co.kr  
REV.1.0 (August.2002)  
HANBiT Electronics Co., Ltd  
5
HANBit  
HMD1M32M2G  
tRPC  
/RAS Precharge to /CAS Hold Time  
5
-
5
-
ns  
FAST PAGE MODE CYCLE  
SYMBOL  
-6  
-7  
PARAMETER  
UNIT  
NOTE  
MIN  
MAX  
MIN  
MAX  
tPC  
Fast Page Mode Cycle Time  
40  
10  
60  
-
-
45  
10  
70  
-
-
ns  
ns  
ns  
ns  
ns  
tCP  
Fast Page Mode /RAS Precharge Time  
Fast Page Mode /CAS Pulse Time  
Access Time from /CAS Precharge  
/RAS Hold Time from /CAS Precharge  
-
100K  
35  
-
100K  
40  
tRASP  
tACP  
tRHCP  
13  
14  
35  
-
40  
-
Note: 1. AC measurements assume tT = 5ns.  
2. Assumes that tRCD<=tRCD(max) and tRCD<=tRCD(max). If tRCD or tRCD is greater than the maximum  
recommended value shown in this table, tRCD exceeds the value shown.  
3. Measured with a load circuit equivalent to 2TTL loads and 100PpF.  
4. Assumes that tRCD >= tRCD (max) and tRCD<= tRCD (max).  
5.Assumes that tRCD <= tRCD (max) and tRCD>= tRCD (max).  
6.Either tRCH or tRRH must be satisfied for a read cycles.  
7. tOFF(max) defines the time at which the outputs achieve the open circuit condition and is not referenced to output  
voltage levels.  
8. VIH(min) and VIL(max) are reference levels for measuring timing of input signals.  
Also, transition times are measured between VIH and VIL.  
9. Operation with the tRCD (max) limit insures that tRAC (max) can be met, tRCD (max) is specified as a reference  
point only, if tRCD is greater than the specified tRCD (max) limit, then access time is controlled exclusively by tCAC .  
10. Operation with the tRAD (max) limit insures that tRAC (max) can be met, tRAD (max) is specified as a reference  
point only, if tRAD is greater than the specified tRAD (max) limit, then access time is controlled exclusively by tAA.  
11. TWCS is not restrictive operating parameter. It is included in the data sheet as electrical characteristics only.  
If twcs >= twcs (min), the cycle is an early write cycle and the data out pin will remain open circuit(high impe-  
dance) throughout the entire cycle.  
12. These parameters are referenced to /CAS leading edge in early write cycles.  
13. tRASP is defines /RAS pulse width in Fast Page Mode cycles.  
14. Access time is determined by the longer of tAA or tCAC or tACP .  
15. An initial pause of 200us is required after power up followed by a minimum of eight initialization cycle (eny  
combination of cycles containing /RAS clock such as /RAS only refresh).  
If the internal refresh count is used, a mnimum of eight /CAS before /RAS refresh cycle are required.  
URL:www.hbe.co.kr  
REV.1.0 (August.2002)  
HANBiT Electronics Co., Ltd  
6
HANBit  
HMD1M32M2G  
PACKAGING INFORMATION  
107.95  
101.19  
3.18  
R1.57 mm  
3.38 mm  
19.05  
6.35  
10.16  
6.35 mm  
2.03 mm  
6.35  
R1.57±1.0  
95.25 mm  
5.08  
MAX  
2.54 mm  
0.25 mm MAX  
MIN  
1.27 mm  
1.27±0.08 mm  
ORDERING INFORMATION  
Component  
Number  
Part Number  
Density  
Org.  
Package  
Vcc  
MODE  
SPEED  
HMD1M32M2G-6  
4MByte  
X32  
72 Pin-SIMM  
2EA  
5V  
FP  
60ns  
URL:www.hbe.co.kr  
REV.1.0 (August.2002)  
HANBiT Electronics Co., Ltd  
7
HANBit  
HMD1M32M2G  
HMD1M32M2G-7  
4MByte  
x 32  
72 Pin-SIMM  
2EA  
5V  
FP  
70ns  
URL:www.hbe.co.kr  
REV.1.0 (August.2002)  
HANBiT Electronics Co., Ltd  
8

HMD1M32M2G-7 相关器件

型号 制造商 描述 价格 文档
HMD1M32M2GL HANBIT 4Mbyte(1Mx32) Fast Page Mode, 1K Refresh, 72Pin SIMM, 5V Design 获取价格
HMD1M32M2GL-5 HANBIT 4Mbyte(1Mx32) Fast Page Mode, 1K Refresh, 72Pin SIMM, 5V Design 获取价格
HMD1M32M2GL-6 HANBIT 4Mbyte(1Mx32) Fast Page Mode, 1K Refresh, 72Pin SIMM, 5V Design 获取价格
HMD1M36M3EG HANBIT 4Mbyte(1Mx36) 72-pin SIMM EDO with Parity MODE, 1K Ref. 5V 获取价格
HMD1M36M3EG-5 HANBIT 4Mbyte(1Mx36) 72-pin SIMM EDO with Parity MODE, 1K Ref. 5V 获取价格
HMD1M36M3EG-6 HANBIT 4Mbyte(1Mx36) 72-pin SIMM EDO with Parity MODE, 1K Ref. 5V 获取价格
HMD1M4Z1 HANBIT 4Mbit(1Mx4bit) Fast Page Mode, 1K Refresh, 20Pin ZIP, 5V Design 获取价格
HMD1M4Z1-5 HANBIT 4Mbit(1Mx4bit) Fast Page Mode, 1K Refresh, 20Pin ZIP, 5V Design 获取价格
HMD1M4Z1-6 HANBIT 4Mbit(1Mx4bit) Fast Page Mode, 1K Refresh, 20Pin ZIP, 5V Design 获取价格
HMD2564Z1 HANBIT 1Mbit(256x4bit) Fast Page Mode, 1K Refresh, 20Pin ZIP, 5V Design 获取价格

HMD1M32M2G-7 相关文章

  • Bourns 密封通孔金属陶瓷微调电位计产品选型手册(英文版)
    2024-09-20
    6
  • Bourns 精密环境传感器产品选型手册(英文版)
    2024-09-20
    9
  • Bourns POWrTher 负温度系数(NTC)热敏电阻手册 (英文版)
    2024-09-20
    8
  • Bourns GMOV 混合过压保护组件产品选型手册(英文版)
    2024-09-20
    6