CA3028A [HARRIS]
Differential/Cascode Amplifiers for Commercial and Industrial Equipment from DC to 120MHz; 差分/共源共栅放大器用于商业和工业设备，从DC到120MHz的
| 型号： | CA3028A |
| 厂家： | 
HARRIS CORPORATION |
| 描述： | Differential/Cascode Amplifiers for Commercial and Industrial Equipment from DC to 120MHz |
| 文件： | 总12页 (文件大小：109K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
CA3028A, CA3028B,
CA3053
S E M I C O N D U C T O R
Differential/Cascode Amplifiers for Commercial
and Industrial Equipment from DC to 120MHz
November 1996
Features
Description
• Controlled for Input Offset Voltage, Input Offset
Current and Input Bias Current (CA3028 Series Only)
The CA3028A and CA3028B are differential/cascode
amplifiers designed for use in communications and industrial
equipment operating at frequencies from DC to 120MHz.
• Balanced Differential Amplifier Configuration with
Controlled Constant Current Source
The CA3028B is like the CA3028A but is capable of pre-
mium performance particularly in critical DC and differential
amplifier applications requiring tight controls for input offset
voltage, input offset current, and input bias current.
• Single-Ended and Dual-Ended Operation
Applications
The CA3053 is similar to the CA3028A and CA3028B but is
recommended for IF amplifier applications.
• RF and IF Amplifiers (Differential or Cascode)
• DC, Audio and Sense Amplifiers
• Converter in the Commercial FM Band
• Oscillator
Ordering Information
PART NUMBER
(BRAND)
TEMP.
RANGE ( C)
PKG.
NO.
o
PACKAGE
CA3028A
-55 to 125 8 Pin Metal Can
-55 to 125 8 Ld PDIP
-55 to 125 8 Ld SOIC
T8.C
• Mixer
CA3028AE
E8.3
• Limiter
CA3028AM
(3028A)
M8.15
• Related Literature
- Application Note AN5337 “Application of the
CA3028 Integrated Circuit Amplifier in the HF and
VHF Ranges.” This note covers characteristics of
different operating modes, noise performance,
mixer, limiter, and amplifier design considerations
CA3028AM96
(3028A)
-55 to 125 8 Ld SOIC Tape
and Reel
M8.15
CA3028B
-55 to 125 8 Pin Metal Can
-55 to 125 8 Ld PDIP
-55 to 125 8 Ld SOIC
T8.C
E8.3
CA3028BE
CA3028BM
(3028B)
M8.15
CA3053
-55 to 125 8 Pin Metal Can
-55 to 125 8 Ld PDIP
T8.C
E8.3
CA3053E
Pinouts
Schematic Diagram
(Terminal Numbers Apply to All Packages)
CA3028A/B, CA3053
(METAL CAN)
TOP VIEW
CA3028A/B, (PDIP, SOIC)
CA3053 (PDIP)
8
6
TOP VIEW
8
1
7
2
5
4
Q
Q
2
1
1
2
3
4
8
7
6
5
R
1
3
7
5
1
5kΩ
–
+
2
6
Q
3
R
2
4
2.8kΩ
R
3
500Ω
3
SUBSTRATE
AND CASE
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
File Number 382.3
Copyright © Harris Corporation 1996
7-6
CA3028A, CA3028B, CA3053
Operating Conditions
Thermal Information
o
o
o
o
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . -55 C to 125 C Thermal Resistance (Typical, Note 1)
Metal Can Package . . . . . . . . . . . . . . .
θ
( C/W)
θ
( C/W)
JA
JC
225
155
185
140
N/A
N/A
PDIP Package . . . . . . . . . . . . . . . . . . .
SOIC Package. . . . . . . . . . . . . . . . . . .
o
Maximum Junction Temperature (Metal Can Package) . . . . . . . 175 C
Maximum Junction Temperature (Plastic Package) . . . . . . . . 150 C
Maximum Storage Temperature Range . . . . . . . . . .-65 C to 150 C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300 C
o
o
o
o
(SOIC - Lead Tips Only)
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. θ is measured with the component mounted on an evaluation PC board in free air.
JA
o
Absolute Maximum Voltage Ratings T = 25 C
A
The following chart gives the range of voltages which can be applied to the terminals listed
horizontally with respect to the terminals listed vertically. For example, the voltage range of the
horizontal Terminal 4 with respect to Terminal 2 is -1V to +5V.
Absolute Maximum
Current Ratings
TERM
NO.
TERM
NO.
I
I
IN
OUT
mA
1
2
3
4
5
6
7
8
mA
0 to -15
0 to -15
0 to -15 +5 to -5
Note 3
Note 3
+20 to 0
(Note 5)
0.6
0.1
0.1
23
1
(Note 4) (Note 4) (Note 4)
+5 to -11 +5 to -1 +15 to 0
(Note 6)
1
2
3
4
5
6
7
8
Note 3
+15 to 0
(Note 6)
Note 3
4
2
3
+10 to 0 +15 to 0 +30 to 0 +15 to 0 +30 to 0
(Note 6) (Note 7) (Note 6) (Note 7)
0.1
20
0.6
20
4
(Note 2)
+15 to 0
(Note 6)
Note 3
Note 3
Note 3
Note 3
Note 3
Note 3
Note 3
Note 3
0.1
0.1
0.1
0.1
0.1
4
+20 to 0
(Note 5)
5
6
7
8
20
NOTES:
2. Terminal No. 3 is connected to the substrate and case.
3. Voltages are not normally applied between these terminals. Voltages appearing between these
terminals will be safe, if the specified voltage limits between all other terminals are not exceeded.
4. Limit is -12V for CA3053.
5. Limit is +15V for CA3053.
6. Limit is +12V for CA3053.
7. Limit is +24V for CA3028A and +18V for CA3053.
o
Electrical Specifications T = 25 C
A
CA3028A
CA3028B
CA3053
PARAMETER
SYMBOL
TEST CONDITIONS
MIN TYP MAX MIN TYP MAX MIN TYP MAX UNIT
DC CHARACTERISTICS
Input Offset Voltage
(Figures 1, 14)
V
V
V
V
V
V
V
V
V
= 6V, V = -6V
EE
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
0.98
0.89
0.56
1.06
16.6
36
5.0
5.0
5.0
6.0
40
80
-
-
-
-
-
-
-
-
-
-
-
-
mV
mV
µA
µA
µA
µA
µA
µA
IO
CC
CC
CC
CC
CC
CC
CC
CC
= 12V, V = -12V
EE
-
-
-
Input Offset Current
(Figures 2, 14)
I
= 6V, V = -6V
EE
-
-
-
-
-
-
IO
= 12V, V = -12V
EE
-
16.6
36
-
-
Input Bias Current
(Figures 2, 3, 15, 16)
I
= 6V, V = -6V
EE
70
106
-
-
-
I
= 12V, V = -12V
EE
-
-
= 9V
-
29
36
85
125
= 12V
-
-
-
-
-
7-7
CA3028A, CA3028B, CA3053
o
Electrical Specifications T = 25 C (Continued)
A
CA3028A
CA3028B
CA3053
PARAMETER
SYMBOL
I , I
TEST CONDITIONS
= 6V, V = -6V
MIN TYP MAX MIN TYP MAX MIN TYP MAX UNIT
Quiescent Operating
Current (Figures 2, 3, 17,
18, 19)
V
V
V
V
V
V
V
V
V
V
V
V
V
V
0.8
1.25
3.3
-
2.0
5.0
-
1.0
2.5
-
1.25
3.3
-
1.5
-
-
-
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mW
mW
mW
6
8
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
EE
= 12V, V = -12V
EE
2.0
4.0
-
-
-
= 9V
-
-
1.2
2.2
3.5
= 12V
-
-
-
-
-
-
2.0
3.3
5.0
AGC Bias Current
(Into Constant Current
Source Terminal 7)
(Figures 4, 20)
I
I
= 12V, V
= 12V, V
= 9V
= 9V
-
-
1.28
1.65
-
-
-
1.28
1.65
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
7
AGC
= 12V
-
-
-
AGC
-
-
-
-
1.15
-
= 12V
-
-
-
-
-
-
1.55
-
Input Current
(Terminal 7)
= 6V, V = -6V
EE
0.5
1.0
24
120
-
0.85
1.65
36
175
-
1.0
2.1
54
0.5
1.0
24
0.85
1.65
36
175
-
1.0
2.1
42
220
-
-
-
-
7
= 12V, V = -12V
EE
-
Power Dissipation
(Figures 2, 3, 21)
P
= 6V, V = -6V
EE
-
-
T
= 12V, V = -12V
EE
260 120
-
-
= 9V
-
-
-
-
50
100
80
= 12V
-
-
-
-
150 mW
DYNAMIC CHARACTERISTICS
Power Gain (Figures 5,
6, 7, 22, 24, 26)
G
f = 100MHz Cascode
= 9V Diff. Amp.
16
14
35
20
17
39
-
-
-
16
14
35
20
17
39
-
-
-
-
-
-
-
-
-
-
dB
dB
dB
P
V
CC
f = 10.7MHz Cascode
(Note 8)
35
39
V
= 9V
Diff. Amp.
(Note 8)
28
32
-
28
32
-
28
32
-
dB
CC
Noise Figure (Figures 5,
6, 7, 23, 25, 26)
NF
f = 100MHz, Cascode
= 9V
-
-
-
7.2
6.7
9.0
9.0
-
-
-
-
7.2
6.7
9.0
9.0
-
-
-
-
-
-
-
-
-
dB
dB
mS
V
CC
f = 10.7MHz, Cascode
= 9V
Diff. Amp.
Input Admittance
(Figures 27, 28)
Y
0.6 +
j1.6
0.6 +
j1.6
0.6 +
j1.6
11
12
21
22
V
CC
Diff. Amp.
-
-
-
-
-
-
-
-
0.5 +
j0.5
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
0.5 +
j0.5
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
0.5 +
j0.5
-
-
-
-
-
-
-
-
mS
mS
mS
mS
mS
mS
mS
µW
Reverse Transfer
Admittance
(Figures 29, 30)
Y
Y
Y
f = 10.7MHz, Cascode
= 9V
0.0003
- j0
0.0003
- j0
0.0003
- j0
V
CC
Diff. Amp.
0.01 -
j0.0002
0.01 -
j0.0002
0.01 -
j0.0002
Forward Transfer
Admittance
(Figures 31, 32)
f = 10.7MHz, Cascode
= 9V
99 -
j18
99 -
j18
99 -
j18
V
CC
Diff. Amp.
-37 +
j0.5
-37 +
j0.5
-37 +
j0.5
Output Admittance
(Figures 33, 34)
f = 10.7MHz, Cascode
= 9V
0 +
j0.08
0 +
j0.08
0 +
j0.08
V
CC
Diff. Amp.
0.04 +
j0.23
0.04 +
j0.23
0.04 +
j0.23
Output Power (Untuned)
(Figures 8, 35)
P
f = 10.7MHz, Diff. Amp.,
5.7
5.7
-
O
V
= 9V
50Ω Input-
CC
Output
AGC Range (Maximum
Power Gain to Full Cut-
off) (Figures 9, 36)
AGC
A
f = 10.7MHz, Diff. Amp.
= 9V
-
62
-
-
62
-
-
-
-
dB
V
CC
Voltage Gain
(Figures 10, 11, 37, 38)
f = 10.7MHz, Cascode
V = 9V,
-
-
40
30
-
-
-
-
40
30
-
-
-
-
40
30
-
-
dB
dB
CC
R = 1kΩ
Diff. Amp.
L
Differential Voltage Gain
at f = 1kHz (Figure 12)
A
V
R
= 6V, V = -6V,
EE
= 2kΩ
-
-
-
-
-
-
35
40
38
42
45
-
-
-
-
-
-
dB
dB
CC
L
V
= 12V, V = -12V,
EE
42.5
CC
R
= 1.6kΩ
L
7-8
CA3028A, CA3028B, CA3053
o
Electrical Specifications T = 25 C (Continued)
A
CA3028A
CA3028B
CA3053
PARAMETER
SYMBOL
TEST CONDITIONS
= 6V, V = -6V,
MIN TYP MAX MIN TYP MAX MIN TYP MAX UNIT
Max Peak-to-Peak
Output Voltage at f = 1kHz
(Figure 12)
V (P-P)
O
V
R
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
7.0
15
-
11.5
23
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
V
V
CC
EE
P-P
P-P
= 2kΩ
L
V
R
= 12V, V = -12V,
EE
CC
= 1.6kΩ
L
Bandwidth at -3dB Point
(Figure 12)
BW
V
R
= 6V, V = -6V,
EE
7.3
8.0
-
MHz
MHz
V
CC
= 2kΩ
L
V
R
= 12V, V = -12V,
EE
-
-
CC
= 1.6kΩ
L
Common Mode Input
Voltage Range
(Figure 13)
V
V
= 6V, V = -6V
EE
-2.5 -3.2 to
-4.5
4
7
CMR
CC
V
= 12V, V = -12V
EE
-5.0
-7 to
-9
V
CC
Common Mode Rejec-
tion Ratio (Figure 13)
CMRR
V
V
V
V
= 6V, V = -6V
EE
-
-
-
-
-
-
60
60
-
110
90
-
-
-
-
-
-
-
-
dB
dB
CC
CC
CC
CC
= 12V, V = -12V
EE
Input Impedance at
f = 1kHz
Z
= 6V, V = -6V
EE
-
-
-
5.5
3.0
4.0
6.0
-
-
-
-
kΩ
kΩ
mA
mA
IN
= 12V, V = -12V
EE
-
-
-
-
-
-
-
-
Peak-to-Peak Output
Current
I
f = 10.7MHz,
V
V
= 9V
2.0
3.5
4.0
6.0
7.0
10
2.5
4.5
6.0
8.0
2.0
3.5
4.0
6.0
7.0
10
P-P
CC
CC
e
=
IN
= 12V
400mV,
Diff. Amp.
NOTE:
8. Does not apply to CA3053.
Test Circuits
V
V
CC
CC
3µF
3µF
1kΩ
1kΩ
+
+
I
I
8
6
DC DIFF.
-
-
VOLTMETER
FLUKE TYPE
80 OR EQUIV.
270Ω
V
OUT
6
6
8
ICUT
7
8
2.7Ω
2.7Ω
2.7Ω
-
1
3V
1
+
R
10Ω
ICUT
1
2.7Ω
-
I
1
3
3
+
7
+
270Ω
NOTE 9
-
5
I
3
5
DC
VTVM
-
V
IO
-
7
+
I
NOTE 10
3µF
+
I
3µF
5
V
EE
V
EE
NOTES:
NOTE:
.
CC
Power Dissipation = I V + (I + I )V
3
EE
6
8
9. Adjust R for V
= 0V ±0.1V.
1
OUT
10. Record Input Offset Voltage.
FIGURE 1. INPUT OFFSET VOLTAGE TEST CIRCUIT FOR
CA3028B
FIGURE 2. INPUT OFFSET CURRENT, INPUT BIAS CURRENT,
POWER DISSIPATION, AND QUIESCENT
OPERATING CURRENT TEST CIRCUIT FOR
CA3028A AND CA3028B
7-9
CA3028A, CA3028B, CA3053
Test Circuits (Continued)
V
CC
I
7
1kΩ
I
7
8
8
6
I
1
1kΩ
5
7
1
5
V
CC
6
8
1
3
CA3053
2kΩ
ICUT
I
5
I
3
6
2kΩ
I
7
I
3
5kΩ
V
CC
NOTE: Power Dissipation = V I .
CC 3
FIGURE 3. INPUT BIAS CURRENT, POWER DISSIPATION AND
QUIESCENT OPERATING CURRENT TEST CIRCUIT
FOR CA3053
FIGURE 4. AGCBIAS CURRENT TEST CIRCUIT (DIFFERENTIAL
AMPLIFIER CONFIGURATION) FOR CA3028A AND
CA3028B
V
V
CC
CC
0.001
µF
7
1kΩ
8
1kΩ
L
2
L
2
7
C
1
470pF
5
2
1
3
6
8
6
C
C
C
2
1
2
ICUT
4
ICUT
L
1
50Ω RF
L
1
1
5
50Ω RF
VOLTMETER
(NOTE 11) OR
NOISE AMP
(NOTE 12)
VOLTMETER
(NOTE 14 OR
NOISE AMP
(NOTE 15)
3
50Ω SIGNAL
SOURCE
(NOTE 14) OR
NOISE DIODE
(NOTE 15)
0.001µF
50Ω SIGNAL
SOURCE
2kΩ
0.001µF
(NOTE 11) OR
NOISE DIODE
(NOTE 12)
0.001µF
2kΩ
f
C
C
(pF)
L
(µH)
L
2
(µH)
1
2
1
f
C
C
(pF)
L
(µH)
L
2
(µH)
1
2
1
(MHz) (pF)
10.7 30 - 60 20 - 50
100
(MHz) (pF)
10.7 20 - 60 20 - 60
100
3 - 6
3 - 6
3 - 5
3 - 5
2 - 15 2 - 15 0.2 - 0.5 0.2 - 0.5
3 - 30 3 - 30 0.1 - 0.25 0.15 - 0.3
NOTES:
NOTES:
11. For Power Gain Test.
14. For Power Gain Test.
12. For Noise Figure Test.
13. 10.7MHz Power Gain Test Only.
15. For Noise Figure Test.
16. 10.7MHz Power Gain Test Only.
FIGURE 5. POWER GAIN AND NOISE FIGURE TEST CIRCUIT
(CASCODE CONFIGURATION) FOR CA3028A,
CA3028B AND CA3053 (NOTE 3)
FIGURE 6. POWER GAIN AND NOISE FIGURE TEST CIRCUIT
(DIFFERENTIAL AMPLIFIER CONFIGURATION
AND TERMINAL 7 CONNECTED TO VCC) FOR
CA3028A, CA3028B AND CA3053 (NOTE 3)
7-10
CA3028A, CA3028B, CA3053
Test Circuits (Continued)
5kΩ
V
CC
1kΩ
7
L
2
8
C
1
1
3
6
C
2
ICUT
L
1
5
50Ω RF
VOLTMETER
(NOTE 17) OR
NOISE AMP
(NOTE 18)
50Ω SIGNAL
SOURCE
(NOTE 17) OR
NOISE DIODE
(NOTE 18)
V
CC
0.001µF
2kΩ
V
CC
1kΩ
7
5
f
C
C
(pF)
L
(µH)
L
2
(µH)
1
2
1
0.01
µF
8
6
(MHz) (pF)
10.7 30 - 60 20 - 50
100
2kΩ
50Ω
ICUT
0.01
µF
3 - 6
3 - 6
1
3
2 - 15 2 - 15 0.2 - 0.5 0.2 - 0.5
INPUT
0.01µF
50Ω
NOTES:
OUTPUT
0.01µF
17. For Power Gain Test.
18. For Noise Figure Test.
FIGURE 7. POWER GAIN AND NOISE FIGURE TEST CIRCUIT
(DIFFERENTIAL AMPLIFIER CONFIGURATION)
FOR CA3028A AND CA3028B
FIGURE 8. OUTPUT POWER TEST CIRCUIT FOR CA3028A
AND CA3028B
5kΩ
V
V
CC
CC
1kΩ
7
10Ω
L
2
8
C
1
C
2
1
3
6
50Ω
SIGNAL
SOURCE
1kΩ LOAD
50Ω RF
VOLTMETER
ICUT
L
1
8
5
7
OUTPUT
6
1
0.001µF
2kΩ
INPUT
2
3
5
ICUT
0.01µF
1kΩ
50Ω
f
C
C
(pF)
L
(µH)
L
2
(µH)
1
2
1
0.01µF
0.01µF
(MHz) (pF)
10.7 30 - 60 20 - 50
100
4
2kΩ
3 - 6
3 - 6
0.01µF
2 - 15 2 - 15 0.2 - 0.5 0.2 - 0.5
FIGURE 9. AGC RANGE TEST CIRCUIT (DIFFERENTIAL
AMPLIFIER) FOR CA3028A AND CA3028B
FIGURE 10. TRANSFER CHARACTERISTIC (VOLTAGE GAIN) TEST
CIRCUIT (10.7MHz) CASCODE CONFIGURATION FOR
CA3028A, CA3028B AND CA3053
7-11
CA3028A, CA3028B, CA3053
Test Circuits (Continued)
V
CC
OSCILLOSCOPE
WITH HIGH
V
R
CC
(NOTE)
3µF
GAIN DIFF. INPUT
(TEKTRONIX TYPE
530, 540, OR 580
WITH TYPE D
PLUG-IN
R
(NOTE)
10Ω
V
DIFF
(RMS)
TEKTRONIX
TYPE 502 OR
EQUIVALENT)
6
1kΩ LOAD
5µF
8
1
8
7
50Ω
ICUT
7
0.01µF
OUTPUT
INPUT
V
= 10mV
(RMS)
IN
6
1
3
50Ω
INPUT
SIGNAL
f = 1kHz
5
ICUT
1kΩ
3
5
3µF
0.01µF
10µH
2kΩ
V
EE
0.001µF
NOTE: For R = 1.6kΩ: V
For R = 2.0kΩ: V
= 12V, V = -12V
EE
CC
CC
= 6V, V = -6V.
EE
FIGURE 12. DIFFERENTIAL VOLTAGE GAIN, MAXIMUM PEAK-
TO-PEAK OUTPUT VOLTAGE AND BANDWIDTH
TEST CIRCUIT FOR CA3028B
FIGURE 11. TRANSFER CHARACTERISTIC (VOLTAGE GAIN)
TEST CIRCUIT (10.7MHz) DIFFERENTIAL
AMPLIFIER CONFIGURATION FOR CA3028A,
CA3028B AND CA3053
V
CC
OSCILLOSCOPE
WITH HIGH
3µF
1kΩ
1kΩ
GAIN DIFF. INPUT
(TEKTRONIX TYPE
530, 540, OR 580
WITH TYPE D
PLUG-IN
V
DIFF
(RMS)
6
TEKTRONIX
TYPE 502 OR
EQUIVALENT)
5µF
8
1
500Ω
ICUT
3
5
7
INPUT
SIGNAL
f = 1kHz
S
1
V
= 0.3V
IN
(RMS)
3µF
V
EE
V
RANGE
X
OF COMMON
MODE REJECTION
NOTES:
19. For CMR test: S to GND.
1
20. For Input Common Mode Voltage Range Test: S to V .
1
X
(A)(2)(0.3)
------------------------------------
DIFF
21. Common Mode Rejection Ratio = 20log
10
V
(RMS)
A = Single-Ended Voltage Gain.
FIGURE 13. COMMON MODE REJECTION RATIO AND COMMON MODE INPUT VOLTAGE RANGE TEST CIRCUIT FOR CA3028B
7-12
CA3028A, CA3028B, CA3053
Typical Performance Curves
POSITIVE DC SUPPLY VOLTS (V
CC
)
)
POSITIVE DC SUPPLY VOLTS (V
CC
)
)
NEGATIVE DC SUPPLY VOLTS (V
NEGATIVE DC SUPPLY VOLTS (V
EE
EE
75.0
62.5
50.0
37.5
25.0
12.5
0
OFFSET CURRENT
2.0
1.5
1.0
0.5
0
V
V
= +12V
= -12V
CC
EE
V
V
= +12V
= -12V
CC
EE
V
V
= +6V
= -6V
CC
EE
V
V
= +6V
= -6V
CC
EE
-75
-50
-25
0
25
50
75
100 125
-75
-50
-25
0
25
50
75
100 125
o
o
TEMPERATURE ( C)
TEMPERATURE ( C)
FIGURE 14. INPUT OFFSET VOLTAGE AND INPUT OFFSET
CURRENT FOR CA3028B vs TEMPERATURE
FIGURE 15. INPUT BIAS CURRENT vs TEMPERATURE FOR
CA3028A AND CA3028B
POSITIVE DC SUPPLY VOLTS (V
CC
)
DIFFERENTIAL AMPLIFIER CONFIGURATION
75.0
62.5
50.0
37.5
25.0
12.5
0
3.5
2.5
1.5
V
= -12V
= -9V
EE
V
= +12V
CC
V
= +9V
CC
V
EE
50
-75
-50
-25
0
25
50
75
100 125
-75
-50
-25
0
25
75
o
100 125
o
TEMPERATURE ( C)
TEMPERATURE ( C)
FIGURE 16. INPUT BIAS CURRENT vs TEMPERATURE FOR
CA3053
FIGURE 17. QUIESCENT OPERATING CURRENT vs
TEMPERATURE FOR CA3028A AND CA3028B
3.5
DIFFERENTIAL AMPLIFIER CONFIGURATION
V
= 6V
CC
3.0
2.5
2.0
1.5
1.0
0.5
0
V
= +12V
= +9V
3.5
CC
2.5
1.5
V
CC
50
0
-5
-10
-15
-75
-50
-25
0
25
75
o
100
125
-20
DC EMITTER SUPPLY (V)
TEMPERATURE ( C)
FIGURE 18. QUIESCENT OPERATING CURRENT vs
TEMPERATURE FOR CA3053
FIGURE 19. OPERATING CURRENT vs V VOLTAGE FOR
EE
CA3028A AND CA3028B
7-13
CA3028A, CA3028B, CA3053
Typical Performance Curves (Continued)
DIFFERENTIAL AMPLIFIER CONFIGURATION
o
T
= 25 C
A
180
170
160
150
40
35
30
25
V
V
= +12V
= -12V
CC
EE
2
1
0
V
V
= +6V
= -6V
CC
EE
-50
-25
0
25
50
o
75
100
125
0
2
4
6
8
10
12
TEMPERATURE ( C)
AGC BIAS, TERMINAL NO. 7 (V)
FIGURE 20. AGC BIAS CURRENT vs BIAS VOLTAGE
FIGURE 21. POWER DISSIPATION vs TEMPERATURE FOR
CA3028A AND CA3028B
(TERMINAL 7) FOR CA3028A AND CA3028B
CASCODE CONFIGURATION
o
CASCODE CONFIGURATION
o
T
= 25 C
T = 25 C, f = 100MHz
A
45
40
35
30
25
20
15
10
A
V
= +12V
= +9V
CC
9
8
7
6
5
V
CC
5
0
10
20
30
40
50 60 70 80 90 100
9
10
11
12
FREQUENCY (MHz)
DC COLLECTOR SUPPLY VOLTAGE (V)
FIGURE 22. POWER GAIN vs FREQUENCY (CASCODE
CONFIGURATION) FOR CA3028A AND CA3028B
FIGURE 23. 100MHz NOISE FIGURE vs COLLECTOR SUPPLY
VOLTAGE (CASCODE CONFIGURATION)
FOR CA3028A AND CA3028B
DIFFERENTIAL AMPLIFIER CONFIGURATION
DIFFERENTIAL AMPLIFIER CONFIGURATION
o
o
T
= 25 C, f = 100MHz
40
35
30
25
20
15
10
A
T
= 25 C
A
V
V
= +12V
= +9V
CC
CC
9
8
7
6
5
5
0
10
20
30
40
50 60 70 80 90 100
9
10
11
12
FREQUENCY (MHz)
DC COLLECTOR SUPPLY VOLTAGE (V)
FIGURE 24. POWER GAIN vs FREQUENCY (DIFFERENTIAL
AMPLIFIER CONFIGURATION) FOR CA3028A AND
CA3028B
FIGURE 25. 100MHz NOISE FIGURE vs COLLECTOR SUPPLY
VOLTAGE (DIFFERENTIAL AMPLIFIER
CONFIGURATION) FOR CA3028A AND CA3028B
7-14
CA3028A, CA3028B, CA3053
Typical Performance Curves (Continued)
o
CASCODE CONFIGURATION, T = 25 C
DIFFERENTIAL AMPLIFIER CONFIGURATION
o
A
I
= 4.5mA, V
= +9V
C(STAGE)
CC
T
= 25 C, V
= +9V, f = 100MHz
A
CC
7
6
5
4
3
2
1
0
20
POWER GAIN
15
10
b
11
NOISE FIGURE
g
11
5
0
9
8
7
6
5
4
3
2
1
10
FREQUENCY (MHz)
100
POSITIVE DC BIAS VOLTAGE (V)
FIGURE 26. 100MHz NOISE FIGURE AND POWER GAIN vs
FIGURE 27. INPUT ADMITTANCE (Y ) vs FREQUENCY
11
BASE-TO-EMITTER BIAS VOLTAGE (TERMINAL 7)
FOR CA3028A AND CA3028B
(CASCODE CONFIGURATION)
o
DIFFERENTIAL AMPLIFIER CONFIGURATION
o
CASCODE CONFIGURATION, T = 25 C
A
T
= 25 C, V
= +9V
I
= 4.5mA, V
= +9V
A
CC
C(STAGE)
CC
3
2
20
15
10
5
I
OF EACH TRANSISTOR = 2.2mA
C
g
b
12
0
b
11
12
-5
1
0
g
11
-10
-15
-20
1
10
100
1
10
FREQUENCY (MHz)
100
FREQUENCY (MHz)
FIGURE 28. INPUT ADMITTANCE (Y ) vs FREQUENCY
11
FIGURE 29. REVERSE TRANSADMITTANCE (Y ) vs
12
(DIFFERENTIAL AMPLIFIER CONFIGURATION)
FREQUENCY (CASCODE CONFIGURATION)
o
CASCODE CONFIGURATION, T = 25 C
A
C(STAGE)
DIFFERENTIAL AMPLIFIER CONFIGURATION
o
I
= 4.5mA, V
= +9V
CC
T
= 25 C, V
= +9V
CC
A
0.3
0.2
I
OF EACH TRANSISTOR = 2.2mA
100
80
C
g
g
21
12
60
0.1
40
20
0
-0.1
-0.2
-0.3
0
b
12
-20
-40
-60
-80
b
21
1
2
3
4
5 6 7 8910
100
10
20
30 40 50 60 80 100
FREQUENCY (MHz)
200
300
FREQUENCY (MHz)
FIGURE 30. REVERSE TRANSADMITTANCE (Y ) vs
12
FIGURE 31. FORWARD TRANSADMITTANCE (Y ) vs
21
FREQUENCY (DIFFERENTIAL AMPLIFIER
FREQUENCY (CASCODE CONFIGURATION)
CONFIGURATION)
7-15
CA3028A, CA3028B, CA3053
Typical Performance Curves (Continued)
o
CASCODE CONFIGURATION, T = 25 C
DIFFERENTIAL AMPLIFIER CONFIGURATION
o
A
I
= 4.5mA, V = +9V
T
= 25 C, V
= +9V
C(STAGE)
CC
A
CC
3
2
1
0
I
OF EACH TRANSISTOR = 2.2mA
C
30
20
b
g
22
b
21
10
0
0
-0.02
-0.04
-0.06
-0.08
22
-10
-20
-30
-40
g
21
1
10
FREQUENCY (MHz)
100
1
10
FREQUENCY (MHz)
100
FIGURE 32. FORWARD TRANSADMITTANCE (Y ) vs
21
FIGURE 33. OUTPUT ADMITTANCE (Y ) vs FREQUENCY
22
FREQUENCY (DIFFERENTIAL AMPLIFIER
(CASCODE CONFIGURATION)
CONFIGURATION)
DIFFERENTIAL AMPLIFIER CONFIGURATION,
o
DIFFERENTIAL AMPLIFIER CONFIGURATION
o
10
T
= 25 C, CONSTANT POWER INPUT = 2µW
T
= 25 C
A
A
I
OF EACH TRANSISTOR = 2.2mA, V
= +9V
C
CC
2
V
= +12V
CC
1.5
1.0
0.5
0.6
0.5
0.4
0.3
0.2
0.1
0
b
22
V
= +9V
CC
g
22
0
100
1
1
10
10
100
FREQUENCY (MHz)
FREQUENCY (MHz)
FIGURE 34. OUTPUT ADMITTANCE (Y ) vs FREQUENCY
22
FIGURE 35. OUTPUT POWER vs FREQUENCY - 50Ω INPUT
AND 50Ω OUTPUT (DIFFERENTIAL AMPLIFIER
CONFIGURATION) FOR CA3028A AND CA3028B
(DIFFERENTIAL AMPLIFIER CONFIGURATION)
CASCODE CONFIGURATION
o
DIFFERENTIAL AMPLIFIER CONFIGURATION
o
T
= 25 C, f = 10.7MHz
A
T
= 25 C, V
= +9V
A
CC
5
4
3
2
1
0
40
V
= +12V
CC
f = 10.7MHz
V
= +9V
CC
20
0
100MHz
-20
-40
9
8
7
6
5
4
3
2
1
0
0
0.05
0.1
0.15
DC BIAS VOLTAGE ON TERMINAL NO. 7 (V)
INPUT VOLTAGE (V)
FIGURE 36. AGC CHARACTERISTICS FOR CA3028A AND
CA3028B
FIGURE 37. TRANSFER CHARACTERISTICS (CASCODE
CONFIGURATION)
7-16
CA3028A, CA3028B, CA3053
Typical Performance Curves (Continued)
3.0
DIFFERENTIAL AMPLIFIER CONFIGURATION
o
T
= 25 C, f = 10.7MHz
A
2.5
2.0
V
= +12V
CC
1.5
1.0
V
= +9V
CC
0.5
0
0.05
0.1
0.15
INPUT VOLTAGE (V)
FIGURE 38. TRANSFER CHARACTERISTICS (DIFFERENTIAL AMPLIFIER CONFIGURATION)
Glossary of Terms
AGC Bias Current
Input Offset Voltage
The current drawn by the device from the AGC voltage The difference in the DC voltages which must be applied to
source, at maximum AGC voltage.
AGC Range
the input terminals to obtain equal quiescent operating
voltages (zero output offset voltage) at the output terminals.
Noise Figure
The total change in voltage gain (from maximum gain to
complete cutoff) which may be achieved by application of the The ratio of the total noise power of the device and a
specified range of dc voltage to the AGC input terminal of resistive signal source to the noise power of the signal
the device.
source alone, the signal source representing a generator of
zero impedance in series with the source resistance.
Common Mode Rejection Ratio
Power Gain
The ratio of the full differential voltage gain to the common
mode voltage gain.
The ratio of the signal power developed at the output of the
device to the signal power applied to the input, expressed in
dB.
Power Dissipation
The total power drain of the device with no signal applied
and no external load current.
Quiescent Operating Current
The average (DC) value of the current in either output
terminal.
Input Bias Current
The average value (one half the sum) of the currents at the
two input terminals when the quiescent operating voltages at
the two output terminals are equal.
Voltage Gain
The ratio of the change in output voltage at either output
terminal with respect to ground, to a change in input voltage
at either input terminal with respect to ground, with the other
input terminal at AC ground.
Input Offset Current
The difference in the currents at the two input terminals
when the quiescent operating voltages at the two output ter-
minals are equal.
7-17
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