HD74AC107RP-EL [HITACHI]
暂无描述;型号: | HD74AC107RP-EL |
厂家: | HITACHI SEMICONDUCTOR |
描述: | 暂无描述 触发器 时钟 |
文件: | 总10页 (文件大小:60K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
HD74AC107/HD74ACT107
Dual JK Flip-Flop (with Separate Clear and Clock)
Description
The HD74AC107/HD74ACT107 dual JK master/slave flip-flops have a separate clock for each flip-flop.
Inputs to the master section are controlled by the clock pulse. The clock pulse also regulates the state of the
coupling transistors which connect the master and slave sections. The sequence of operation is as follows:
1) isolate slave from master; 2) enter information from J and K inputs to master; 3) disable J and K inputs;
4) transfer information from master to slave.
Features
•
•
Outputs Source/Sink 24 mA
HD74ACT107 has TTL-Compatible Inputs
Pin Arrangement
J1
Q1
Q1
K1
Q2
Q2
1
2
3
4
5
6
14 VCC
13 CD1
12 CP1
11 K2
10 CD2
9
8
CP2
GND 7
J2
(Top view)
HD74AC107/HD74ACT107
Logic Symbol
3
2
8
9
1
12
4
J1
Q1
J2
Q2
6
5
CP1
K1
CP2
K2
11
Q1
Q2
CD1
CD2
13
10
VCC = Pin14
GND = Pin7
Pin Names
J1, J2, K1, K2
CP1, CP2
CD1, CD2
Data Inputs
Clock Pulse Inputs (Active Falling Edge)
Direct Clear Inputs (Active Low)
Q1, Q2, Q1, Q2 Outputs
Truth Table
Inputs
Outputs
@ tn
J
@ tn + 1
Q
K
L
L
Qn
L
L
H
L
H
H
H
H
Qn
H
:
:
:
:
High Voltage Level
Low Voltage Level
L
tn
Bit time before clock pulse.
Bit time after clock pulse.
tn + 1
2
HD74AC107/HD74ACT107
Logic Diagram
Q
CD
J
#CP
#CP
Q
K
CP
CP
#CP
#CP
CP
CP
CP
CP
CP
DC Characteristics (unless otherwise specified)
Item
Symbol Max
Unit
Condition
Maximum quiescent supply current
ICC
ICC
ICCT
80
µA
VIN = VCC or ground, VCC = 5.5 V,
Ta = Worst case
Maximum quiescent supply current
8.0
1.5
µA
VIN = VCC or ground, VCC = 5.5 V,
Ta = 25°C
Maximum additional ICC/input
(HD74ACT107)
mA
VIN = VCC – 2.1 V, VCC = 5.5 V
Ta = Worst case
3
HD74AC107/HD74ACT107
AC Characteristics: HD74AC107
Ta = +25°C
Ta = –40°C to +85°C
CL = 50 pF
CL = 50 pF
Item
Symbol VCC (V)*1
Min
125
150
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
Typ
Max
—
Min
100
125
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
Max
—
Unit
Maximum clock
frequency
fmax
tPLH
tPHL
tPLH
tPHL
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
—
MHz
—
—
—
Propagation delay
CP to Q or Q
Propagation delay
CP to Q or Q
Propagation delay
CD to Q
9.5
7.5
10.0
8.0
9.5
7.5
9.5
7.5
13.0
10.0
13.5
10.5
13.0
10.0
13.0
10.0
14.0
11.0
14.5
11.5
14.0
11.0
14.0
11.0
ns
ns
ns
ns
Propagation delay
CD to Q
Note: 1. Voltage Range 3.3 is 3.3 V ± 0.3 V
Voltage Range 5.0 is 5.0 V ± 0.5 V
Operating Requirements: HD74AC107
Ta = –40°C
to +85°C
Ta = +25°C
CL = 50 pF
CL = 50 pF
Item
Symbol VCC (V)*1 Typ
Guaranteed Minimum
Unit
ns
Setup time
J or k to CP
Hold time
CP to J or k
Pulse width
CP or CD
tsu
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
3.0
5.5
4.0
0.0
0.0
5.5
4.5
0.0
0.0
6.0
4.5
0.0
0.0
7.5
5.0
0.0
0.0
2.0
th
–1.5
–0.5
2.0
tw
2.0
Recovery time
CD to CP
trec
–2.5
–1.5
Note: 1. Voltage Range 3.3 is 3.3 V ± 0.3 V
Voltage Range 5.0 is 5.0 V ± 0.5 V
4
HD74AC107/HD74ACT107
AC Characteristics: HD74ACT107
Ta = +25°C
Ta = –40°C to +85°C
CL = 50 pF
CL = 50 pF
Item
Symbol VCC (V)*1
Min
Typ
Max
Min
Max
Unit
Maximum clock
frequency
fmax
tPLH
tPHL
tPLH
tPHL
5.0
5.0
5.0
5.0
5.0
100
—
—
80
—
MHz
Propagation delay
CP to Q or Q
1.0
1.0
1.0
1.0
9.5
10.5
8.5
8.5
12.5
13.0
11.0
11.0
1.0
1.0
1.0
1.0
13.5
14.0
12.0
12.0
ns
Propagation delay
CP to Q or Q
Propagation delay
CD to Q
Propagation delay
CD to Q
Note: 1. Voltage Range 5.0 is 5.0 V ± 0.5 V
Operating Requirements: HD74ACT107
Ta = –40°C
to +85°C
Ta = +25°C
CL = 50 pF
CL = 50 pF
Item
Symbol VCC (V)*1 Typ
Guaranteed Minimum
Unit
ns
Setup time
J or k to CP
tsu
5.0
5.0
5.0
5.0
2.5
0.0
4.5
—
7.0
1.5
7.0
3.0
8.0
1.5
8.0
3.0
Hold time
CP to J or k
th
Pulse width
CP or CD
tw
Recovery time
trec
CD to CP
Note: 1. Voltage Range 5.0 is 5.0 V ± 0.5 V
Capacitance
Item
Symbol
CIN
Typ
4.5
Unit
pF
Condition
VCC = 5.5 V
VCC = 5.0 V
Input capacitance
Power dissipation capacitance
CPD
35.0
pF
5
Unit: mm
19.20
20.32 Max
14
1
8
7
1.30
2.39 Max
7.62
+ 0.10
– 0.05
0.25
2.54 ± 0.25
0.48 ± 0.10
0° – 15°
Hitachi Code
DP-14
JEDEC
EIAJ
Conforms
Conforms
Weight (reference value) 0.97 g
Unit: mm
10.06
10.5 Max
8
14
1
7
+ 0.20
7.80
– 0.30
1.42 Max
1.15
0° – 8°
1.27
0.70 ± 0.20
*0.42 ± 0.08
0.40 ± 0.06
0.15
M
0.12
Hitachi Code
JEDEC
FP-14DA
—
EIAJ
Conforms
*Dimension including the plating thickness
Base material dimension
Weight (reference value) 0.23 g
Unit: mm
8.65
9.05 Max
8
14
1
7
+ 0.10
6.10
– 0.30
0.635 Max
1.08
0° – 8°
+ 0.67
1.27
*0.40 ± 0.06
0.60
– 0.20
0.15
M
0.25
Hitachi Code
JEDEC
EIAJ
FP-14DN
Conforms
Conforms
*Pd plating
Weight (reference value) 0.13 g
Unit: mm
5.00
5.30 Max
14
8
1
7
0.65
1.0
+0.08
*0.22
–0.07
0.13 M
0.20 ± 0.06
6.40 ± 0.20
0.83 Max
0° – 8°
0.50 ± 0.10
0.10
Hitachi Code
JEDEC
EIAJ
TTP-14D
—
—
*Dimension including the plating thickness
Base material dimension
Weight (reference value) 0.05 g
Cautions
1. Hitachi neither warrants nor grants licenses of any rights of Hitachi’s or any third party’s patent,
copyright, trademark, or other intellectual property rights for information contained in this document.
Hitachi bears no responsibility for problems that may arise with third party’s rights, including
intellectual property rights, in connection with use of the information contained in this document.
2. Products and product specifications may be subject to change without notice. Confirm that you have
received the latest product standards or specifications before final design, purchase or use.
3. Hitachi makes every attempt to ensure that its products are of high quality and reliability. However,
contact Hitachi’s sales office before using the product in an application that demands especially high
quality and reliability or where its failure or malfunction may directly threaten human life or cause risk
of bodily injury, such as aerospace, aeronautics, nuclear power, combustion control, transportation,
traffic, safety equipment or medical equipment for life support.
4. Design your application so that the product is used within the ranges guaranteed by Hitachi particularly
for maximum rating, operating supply voltage range, heat radiation characteristics, installation
conditions and other characteristics. Hitachi bears no responsibility for failure or damage when used
beyond the guaranteed ranges. Even within the guaranteed ranges, consider normally foreseeable
failure rates or failure modes in semiconductor devices and employ systemic measures such as fail-
safes, so that the equipment incorporating Hitachi product does not cause bodily injury, fire or other
consequential damage due to operation of the Hitachi product.
5. This product is not designed to be radiation resistant.
6. No one is permitted to reproduce or duplicate, in any form, the whole or part of this document without
written approval from Hitachi.
7. Contact Hitachi’s sales office for any questions regarding this document or Hitachi semiconductor
products.
Hitachi, Ltd.
Semiconductor & Integrated Circuits.
Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan
Tel: Tokyo (03) 3270-2111 Fax: (03) 3270-5109
URL
NorthAmerica
Europe
: http:semiconductor.hitachi.com/
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: http://www.hitachi.com.tw/E/Product/SICD_Frame.htm
Asia (HongKong) : http://www.hitachi.com.hk/eng/bo/grp3/index.htm
Japan
: http://www.hitachi.co.jp/Sicd/indx.htm
For further information write to:
Hitachi Semiconductor
(America) Inc.
Hitachi Europe GmbH
Hitachi Asia (Hong Kong) Ltd.
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7/F., North Tower, World Finance Centre,
Harbour City, Canton Road, Tsim Sha Tsui,
Kowloon, Hong Kong
Tel: <852> (2) 735 9218
Fax: <852> (2) 730 0281
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Hitachi Tower
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Tel: 535-2100
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Germany
Tel: <49> (89) 9 9180-0
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179 East Tasman Drive,
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Taipei Branch Office
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Tun-Hwa North Road, Taipei (105)
Tel: <886> (2) 2718-3666
Fax: <886> (2) 2718-8180
Telex: 40815 HITEC HX
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Electronic Components Group.
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Lower Cookham Road
Maidenhead
Berkshire SL6 8YA, United Kingdom
Tel: <44> (1628) 585000
Fax: <44> (1628) 778322
Copyright ' Hitachi, Ltd., 1999. All rights reserved. Printed in Japan.
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